SG10201407854XA - Error correction method and module for non-volatile memory - Google Patents

Error correction method and module for non-volatile memory

Info

Publication number
SG10201407854XA
SG10201407854XA SG10201407854XA SG10201407854XA SG10201407854XA SG 10201407854X A SG10201407854X A SG 10201407854XA SG 10201407854X A SG10201407854X A SG 10201407854XA SG 10201407854X A SG10201407854X A SG 10201407854XA SG 10201407854X A SG10201407854X A SG 10201407854XA
Authority
SG
Singapore
Prior art keywords
module
volatile memory
error correction
correction method
error
Prior art date
Application number
SG10201407854XA
Inventor
Kui Cai
Zhiliang Qin
Xueqiang Wang
Original Assignee
Agency Science Tech & Res
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency Science Tech & Res filed Critical Agency Science Tech & Res
Priority to SG10201407854XA priority Critical patent/SG10201407854XA/en
Publication of SG10201407854XA publication Critical patent/SG10201407854XA/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/45—Soft decoding, i.e. using symbol reliability information
    • H03M13/451—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/45—Soft decoding, i.e. using symbol reliability information
    • H03M13/458—Soft decoding, i.e. using symbol reliability information by updating bit probabilities or hard decisions in an iterative fashion for convergence to a final decoding result
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
SG10201407854XA 2013-11-26 2014-11-26 Error correction method and module for non-volatile memory SG10201407854XA (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SG10201407854XA SG10201407854XA (en) 2013-11-26 2014-11-26 Error correction method and module for non-volatile memory

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SG2013087523 2013-11-26
SG10201407854XA SG10201407854XA (en) 2013-11-26 2014-11-26 Error correction method and module for non-volatile memory

Publications (1)

Publication Number Publication Date
SG10201407854XA true SG10201407854XA (en) 2015-06-29

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201407854XA SG10201407854XA (en) 2013-11-26 2014-11-26 Error correction method and module for non-volatile memory

Country Status (2)

Country Link
US (1) US9454428B2 (en)
SG (1) SG10201407854XA (en)

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US9935659B2 (en) 2015-05-18 2018-04-03 SK Hynix Inc. Performance optimization in soft decoding for turbo product codes
US9742439B1 (en) * 2015-06-08 2017-08-22 Microsemi Solutions (U.S.), Inc. Method and device for forward error correction decoder system utilizing orthogonality of an H matrix
US10218388B2 (en) 2015-12-18 2019-02-26 SK Hynix Inc. Techniques for low complexity soft decoder for turbo product codes
US10395754B2 (en) * 2016-03-21 2019-08-27 Nandext Srl Method for decoding bits in a solid state drive, and related solid state drive
US10090862B2 (en) * 2016-03-23 2018-10-02 SK Hynix Inc. Hybrid soft decoding algorithm for multiple-dimension TPC codes
US10090865B2 (en) * 2016-03-23 2018-10-02 SK Hynix Inc. Performance optimization in soft decoding of error correcting codes
US10084485B2 (en) * 2016-03-23 2018-09-25 SK Hynix Inc. Soft decoder parameter optimization for product codes
CN107733444B (en) * 2016-08-11 2021-01-05 爱思开海力士有限公司 Soft decoder parameter optimization for product codes
US10205469B2 (en) * 2016-08-11 2019-02-12 SK Hynix Inc. Low latency soft decoder architecture for generalized product codes
US10283212B2 (en) * 2016-11-29 2019-05-07 International Business Machines Corporation Built-in self-test for embedded spin-transfer torque magnetic random access memory
US10673465B2 (en) * 2016-11-30 2020-06-02 Toshiba Memory Corporation Memory controller, memory system, and control method
US10250281B2 (en) * 2016-12-30 2019-04-02 Sandisk Technologies Llc ECC decoder having adjustable parameters
JP6882666B2 (en) * 2017-03-07 2021-06-02 富士通株式会社 Key generator and key generator
US10489245B2 (en) * 2017-10-24 2019-11-26 Spin Memory, Inc. Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them
US10481976B2 (en) * 2017-10-24 2019-11-19 Spin Memory, Inc. Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers
US10529439B2 (en) * 2017-10-24 2020-01-07 Spin Memory, Inc. On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects
US10656994B2 (en) * 2017-10-24 2020-05-19 Spin Memory, Inc. Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques
KR102415974B1 (en) * 2017-12-14 2022-07-04 삼성전자주식회사 Error correction device, operating method of error correction device, and controller including error correction device
CN109947678B (en) * 2019-03-26 2021-07-16 联想(北京)有限公司 Storage device, electronic equipment and data interaction method
US10915396B1 (en) * 2019-07-18 2021-02-09 SK Hynix Inc. Soft-input soft-output component code decoder for generalized low-density parity-check codes

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US5602858A (en) * 1993-09-20 1997-02-11 Kabushiki Kaisha Toshiba Digital signal decoding apparatus having a plurality of correlation tables and a method thereof
US6581179B1 (en) * 1996-06-25 2003-06-17 Ericsson Inc. Methods for generating side information in the presence of time-selective fading
US6161209A (en) * 1997-03-28 2000-12-12 Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communications Research Centre Joint detector for multiple coded digital signals
US6847760B2 (en) * 2001-10-23 2005-01-25 Georgia Tech Research Corporation Spatially resolved equalization and forward error correction for multimode fiber links
US7260762B2 (en) * 2004-07-26 2007-08-21 Motorola, Inc. Decoder performance for block product codes
US7310767B2 (en) * 2004-07-26 2007-12-18 Motorola, Inc. Decoding block codes
JP4655892B2 (en) * 2005-11-07 2011-03-23 ソニー株式会社 Recording / reproducing apparatus and recording method
US8108759B2 (en) * 2006-12-14 2012-01-31 Regents Of The University Of Minnesota Error detection and correction using error pattern correcting codes
US8176400B2 (en) * 2009-09-09 2012-05-08 Lsi Corporation Systems and methods for enhanced flaw scan in a data processing device
US8661324B2 (en) * 2011-09-08 2014-02-25 Lsi Corporation Systems and methods for non-binary decoding biasing control

Also Published As

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US20150149873A1 (en) 2015-05-28
US9454428B2 (en) 2016-09-27

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