SG102012A1 - Gigabit ethernet bridge with parallel fifo structure - Google Patents

Gigabit ethernet bridge with parallel fifo structure

Info

Publication number
SG102012A1
SG102012A1 SG200106755A SG200106755A SG102012A1 SG 102012 A1 SG102012 A1 SG 102012A1 SG 200106755 A SG200106755 A SG 200106755A SG 200106755 A SG200106755 A SG 200106755A SG 102012 A1 SG102012 A1 SG 102012A1
Authority
SG
Singapore
Prior art keywords
gigabit ethernet
ethernet bridge
fifo structure
parallel fifo
parallel
Prior art date
Application number
SG200106755A
Inventor
Pei Yi Shen
Amalroy Sivagami
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Priority to SG200106755A priority Critical patent/SG102012A1/en
Publication of SG102012A1 publication Critical patent/SG102012A1/en

Links

SG200106755A 2001-11-07 2001-11-07 Gigabit ethernet bridge with parallel fifo structure SG102012A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SG200106755A SG102012A1 (en) 2001-11-07 2001-11-07 Gigabit ethernet bridge with parallel fifo structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG200106755A SG102012A1 (en) 2001-11-07 2001-11-07 Gigabit ethernet bridge with parallel fifo structure

Publications (1)

Publication Number Publication Date
SG102012A1 true SG102012A1 (en) 2004-02-27

Family

ID=32653769

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200106755A SG102012A1 (en) 2001-11-07 2001-11-07 Gigabit ethernet bridge with parallel fifo structure

Country Status (1)

Country Link
SG (1) SG102012A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5132970A (en) * 1989-07-12 1992-07-21 U.S. Philips Corporation Bit rate adaptation circuit arrangement comprising a justification decision circuit
US5835496A (en) * 1996-04-30 1998-11-10 Mcdata Corporation Method and apparatus for data alignment
US6157659A (en) * 1997-12-19 2000-12-05 Nortel Networks Corporation Method of and apparatus for multiplexing and demultiplexing digital signal streams

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5132970A (en) * 1989-07-12 1992-07-21 U.S. Philips Corporation Bit rate adaptation circuit arrangement comprising a justification decision circuit
US5835496A (en) * 1996-04-30 1998-11-10 Mcdata Corporation Method and apparatus for data alignment
US6157659A (en) * 1997-12-19 2000-12-05 Nortel Networks Corporation Method of and apparatus for multiplexing and demultiplexing digital signal streams

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