SE9802297A0 - High speed optical transmission system for ATM traffic - Google Patents

Abstract

In summary, one embodiment of the present invention requires that each of the pieces of information be optically modulated using some of the addressing samples such as those illustrated in FIGURES 11, 13 or 15. As shown above, the use of the habit allows such setting of coding patterns to provide an exact resolution of images. created by Overlaying combinations of the basic coding patterns. Since the payload portion of a conventional ATM cell is usually directed to a single destination address, it may sometimes be impossible to modulate each of the payload bits in an ATM cell with the optical samples A, B, C or D illustrated in FIGURES 11, 13 or 15. Instead, it may be sufficient if a certain area of the basic pattern which is helpful for the black parts shown in FIGURES 17, 18 or 19 contains the destination address image. In such cases, such a combined image can be transmitted to all the optical decoders 931 to 934 through the optical image coupler 920. The ideal optical decoder on the landing page would also load the basic data and transmit it to the lamp multiplexer while the remaining optical decoders simply would ignore the data that was circulated to them. However, the use of this unmodulated transfer protocol would require that only one ATM cell be switched at the usual time. Although a preferred embodiment of the method and apparatus of the present invention has been illustrated in the accompanying drawings and described in the foregoing detailed description, it is to be understood that the invention is not limited to the embodiment (s) shown but may accommodate a variety of restructurings, modifications and substitutions. to depart from the spirit of the invention as set forth and defined by the following claims.

Description

TECHNICAL FIELD The invention relates to electronic data exchange systems, and more particularly to the use of optical techniques in the implementation of ultra-high speed ATM exchange systems.

RELATED TECHNOLOGY Demand for telecommunications services has grown at an ever-increasing rate. To meet this demand, operators and suppliers of telecommunications networks have had to continuously upgrade the traffic-carrying capacity of their circuits as well as of the exchange nodes connecting these circuits. Furthermore, the demand for ordinary voice telephony services tends to become a slightly smaller part of the total traffic in comparison with other telecommunication services such as data communication between computers, transmission of graphic images, video conferencing and similar broadband services.

Current and future telecommunications subscribers, both residential and business, will be connected, via shared access, to a web of broadband networks that operate at data rates of 150 megabits per second or more and that can support a wide range of different types of broadband services. Broadband networks can be broadly defined as those that support user services that require bit transfer rates substantially greater than one megabit per second.

In general, broadband networks are likely to be built using ATM (Asynchronous Transfer Mode) technology as the underlying type of transport and switching technology. Broadband Integrated Services Digital Networks (B-ISDN) using ATM technology can offer users the flexibility and capacity needed to support a variety of telecommunications services ranging from basic voice telephony service to high speed video telephony transmission, for high quality television. As described further below, ATM technology is based on the division of data into packets or cells that are transmitted and exchanged as individual units through the various nodes in the broadband network.

Current large telephone exchanges can serve up to 100,000 customers. Based on such a large number of terminals, a future B-ISDN station may need to operate with a switching capacity of up to one terabit per second (1012 bits per second) or more. Assuming that the customer is served by a B-ISDN line operating at the design flow rate of 155.52 megabits per second, an ATM switch needs to be able to handle a flow greater than 15 terabits per second.

Several proposals have been put forward to deal with such extremely fast switching requirements in the architecture for large data exchanges such as those used in ATM implementations. For example, U.S. Pat. No. 5,303,078 entitled "Apparatus and Method for Large Scale ATM Switching" issued to Brackett et al. a combination of electronic and optical waxing. The Brackett system utilizes a star-type multicircular optical network with pedigree lasers and fixed pedigree receivers to implement an ATM packet switch. However, Brackett's technology has a number of disadvantages because it is complex. The technology according to Brackett is also expensive and slow because it involves several conversions between electronic and optical representations of data.

It is also possible to use optical techniques together with code division multiple access (CDMA) to encode one optical image with another and then transfer a plurality of encoded images to a remote 3 place where they are decoded and separated from each other. See e.g. K. Kitayama, Novel Spatial Spread Spectrum Based Fiber Optic CDMA Networks for Image Transmission, 12 IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS 762-772 (May 1994). However, there have been no known techniques that have suggested the use of such optical techniques in the implementation of high speed data exchange systems as for any change in ATM switching environments.

The system of the present invention combines conventional high speed ATM shifting techniques with optical processing technology to produce a parallel shifting system which exhibits remarkably high data throughput rates in the range of 10 terabits per second for a shift configuration of 10 inputs and 10 outputs.

BRIEF SUMMARY OF THE INVENTION For this reason, it is a primary object of the present invention to increase the speed of telecommunication switches by adapting optical coding-decoding techniques to telecommunication applications. The use of an optical coding-decoding technique makes it possible to alternate multiple data streams in parallel.

In one aspect, the present invention relates to a system and method for parallel high-speed switching of digital data sequences using a sophisticated optical technique. The method includes separating the address portion of the habitual digital data sequence from the payload portion of the digital data sequence. The destination output port for each digital data sequence is then determined using the address portion of the digital data sequence. A unique optical pattern corresponding to the destination output port is then generated. This unique optical sample is used to modulate the payload portion of the digital data sequence and can be generated either initially or by selection from a pre-calculated list. An encoded optical sample comprising a plurality of cells is then constructed by encoding each of the digital data sequences using a preselected conversion protocol. Each cell of this encoded optical sample is then modulated using the unique modulating optical sample corresponding to the destination of the data sequence.

The modulated optical samples obtained from each of the digital data sequences are superposed to form a composite optical pattern which is circulated to a plurality of destination receivers. The composite optical sample is then demodulated in each of the destination receivers using the unique modulating optical sample corresponding to the recipient's address. Finally, the demodulated optical sample is decoded at the usual output port to obtain a waxed digital data sequence in the time domain which is routed to its destination by conventional means.

BRIEF DESCRIPTION OF THE DRAWINGS A complete understanding of the method and system of the present invention may be obtained by reference to the following detailed description of the preferred embodiments when read in conjunction with the accompanying drawings, in which: FIGURE 1 of a block diagram of an illustrative telecommunication work; within which the data exchange system of the present invention can be used; FIGURE 2 is a block diagram illustrating an illustrative structure of an ATM cell; FIGURE 3 is a block diagram illustrating a number of connected virtual scales and virtual channels within an ATM network; FIGURE 4 is a block diagram illustrating the cross-connection and switching of virtual scales and virtual connections Mom an ATM network; FIGURE 5 is a diagram illustrating the CCITT B-ISDN reference model showing the diversity of service classes met by the standard and the standard layer; FIGURE 6 is a diagram showing an illustrative ATM network providing the virtual leased line service; FIGURE 7 is a diagram illustrating a multilayer SDH-based transport network that includes ATM cross-connectors; FIGURE 8 is a high level block diagram of an embodiment of a high speed optical shifting system; FIGURE 9 is a detailed block diagram of the optical axis depicted in FIGURE 8; FIGURE shows an illustrative example of the modulation and demodulation processes for the simple case of an 8-bit payload segment modulated with a 4-bit address segment; FIGURE 11 shows four symmetric non-overlapping coding patterns that can be used to reversibly modulate data to be converted to four distinct destinations; FIGURE 12 shows twelve of the sixteen optical samples resulting from the superposition of various combinations of the four basic coding patterns shown in FIGURE 11; ••• ••• ••• • • •••: ••• • • • • •• • • ••• • ••• •••• •• • •• • • • •••• •• • • • •• • •• • •••• • • •• • • ■ •• •• • ••• •• 6 FIGURE 13 shows four asymmetric non-overlapping coding patterns that can be used to reversibly modulate data to be swapped to four distinct destinations; FIGURE 14 shows twelve of the sixteen optical samples resulting from the superposition of various combinations of the four basic coding samples shown in FIGURE 13; FIGURE 15 shows four asymmetric partially overlapping coding patterns that can be used to reversibly modulate data to be switched to four distinct destinations; FIGURE 16 shows twelve of the sixteen optical samples resulting from the superposition of various combinations of the four basic coding samples shown in FIGURE 15; FIGURE 17 shows an arrangement of a 384-bit data sequence in a contiguous rectangular 16 by 24 base grid; FIGURE 18 shows another arrangement of a 384-bit data sequence in a square 20 times 20 base grid; and FIGURE 19 shows an arrangement of a 384-bit data sequence in a contiguous axially symmetrical and relatively circular 22 times 22 base grid.

DESCRIPTION OF THE PREFERRED EMBODIMENT Telecommunication Network Referring first to FIGURE 1, there is shown an illustrative schematic diagram of a conventional public telecommunications network comprising a plurality of local exchange stations 21 to 26 each having a plurality of connected local subscribers. by telephone instrument 27. Two of the local exchange stations 21 and 24 are represented by associated disconnected subscriber multiplex stages 28 and 29 which in turn have local customers 27 connected to them. The network according to FIGURE 1 also comprises a plurality of interurban stations 31 to 34 which primarily act to interconnect different local exchange stations with each other and to provide routes between different parts of the network. The interurban station 31 is shown as connected to a mobile exchange station 35 which comprises a pair of illustrative base stations 36 and 37 which serve a plurality of mobile radio telephone subscribers represented at 38.

In addition, other telecommunication services such as databases and intelligent networks can also be connected to various of the exchange stations shown. Between each of the exchange stations 21 to 35 in the network, a plurality of communication paths 30 are shown, each of which may comprise a plurality of communication circuits comprising cables, optical links or radio links for only voice and / or data communication between the various exchange stations within the network.

The network according to FIGURE 1 also comprises a network control system 40 which is connected to each of the switching stations 21 to 35. The network through communication tanks 41 (represented by dashed lines) for the transmission of control signals to each exchange station and for the reception of traffic data from the exchange station. The network control system 40 executes commands to dynamically reconfigure the communication paths within the various traffic routes in the network network as well as to control the alarm systems in the network exchange stations in order to fine-tune the reduction of the power supply mode of the network.

The principles of ATM systems As discussed above, a number of changes are currently taking place in the implementation of the public transport networks for telecommunications. Operators of public telecommunications networks have long sought to use a •: .0.

• O .. • oe: • • • • • 811. ee. O. • •••• • • • • 'es. • .0 • • • • • • e: •• • 600 • 8 single type of technology for managing the transport and switching of all types of telecommunications services within a common infrastructure. One such technology is ATM (Asynchronous Transfer Mode) technology.

ATMs are currently being implemented in an attempt to meet these needs by creating a child network for telecommunications that has significant "bandwidth granularity" and can handle very high bandwidth connections. The term "bandwidth granularity" refers to a pitch of a network that can handle calls whose bandwidth requirements continuously vary over a wide range over the duration of the call.

The use of ATM technology in the public telecommunications network provides opportunities for common switching and transport for related services, increased bandwidth granularity, support for services with variable bit rate and stood for multimedia services. Because of these features, ATM has been selected by the International Telegraph and Telephone Consultative Committee (CCITT ') as the core technology for broadband ISDN services (B-ISDN). This is despite the disadvantages of ATM, including transition delays for isochronous low-speed services, increased complexity within a network and the introduction of new parameters for performance (such as cell loss and span), which the system of the present invention depends on, which will be further described below.

An ATM network can be implemented using either Plesichronous Digital Hierarchy (PDH) or Synchronous Digital Hierarchy (SDH), or both. Furthermore, pure ATM can be used as the bearer for a network whenever one can handle the constraints that originate in multiple conversions between ATM and STM (Synchronous Transfer Mode) and the resulting performance mergers. : ••• 0 0 • • • • • • • 000 • f •• 4 • 0. • • 00.0 ..0 0 .. • GOO • * 0 SO 0 • 00 .0 • •. At the heart of ATM technology is the ATM cell structure shown in FIGURE 2. An ATM cell has a fixed length of 53 bytes, or octets, which are divided into a head of four octets and an information field of 48 octets (d.ven ' The main function of the ATM cell header is the identification of the virtual connection. Path Selection Information The Mom ATM cell is housed in two facets: a virtual wave identifier (VPI) that determines which virtual CEO the ATM cell belongs to, and a virtual connection identifier (VCI) that determines which virtual connection in the virtual wave the cell belongs to.

A virtual connection is a dynamically allocable end-to-end connection. Optical transmission links can carry hundreds of megabits per second while virtual connections can occupy only a fatal kilobit per second of a link. Thus, a large number of simultaneous virtual connections can be supported on a single transmission link.

A virtual vague on the other hand is a semi-permanent connection between two points of view. Each virtual vague can transport a large number of simultaneously connected virtual connections. Since a large group of virtual connections are handled and exchanged together as a single unit, the total processing requirements for a virtual connection are smaller than those for a virtual connection and consequently there is faster processing per (virtual) connection, which results in a • 4. • • eel. : • • .8. • • • ••• • 041o. .00. SO • • • .0 .. • • edo • .00. • • • 0: 4. • 0.0 00 significantly more efficient use of network resources. Network management of virtual scales is relatively simple and efficient.

As illustrated in FIGURE 2, the ATM cell header differs slightly at the User-Network Interface (UNI) compared to the Network-Node Interface (NNI). UNI contains four pieces for generic flow control (JRC) and is used to ensure the correct and efficient use of available capacity between a terminal and the network. A field for a payload type indicator (Free) is used to indicate whether an ATM cell contains user information or special network information, e.g. for under-hall. A cell failure priority field (CLP) encodes a two-level priority and is used when it becomes necessary to discard cells due to network condition. The information in the header is protected by a checksum that is contained in the header error checking field (HEC).

The use of ATM cells allows the information transfer rate to be adapted to the actual service requirements. Depending on the required capacity, the number of cells per unit time can be increased up to the limit of the transfer bit rate of the physical medium used for data only. In addition to data cells, there are also cells for signaling and maintenance as well as free cells. Signaling cells al-wands between an end user in the network, or between nodes in the network and their function is to set up a service, e.g. a compound. Maintenance cells provide monitoring of the ATM layer while free cells are used to fill the transfer capacity up to the speed of the transfer medium.

Referring to FIGURE 3, a block diagram illustrating the switching and cross-linking of virtual connections and virtual scales within an ATM link is shown. From the point of view of a gear unit designer, "VP switching" refers to the switching of an ATM cell using only the upper part of the identification field, •• • • •• •••• •••• •• •• • • • • • • • • • • •• • • ••• • ••• •••. •• •• ••• • • • 1. . : •••••• •••••••••••• •• 11 d.v.s. the shorter field (VPI). In "VP / VC switching", on the other hand, the entire identification field (i.e. both VPI and VCI) is used to switch an ATM cell.

A VP / VC wave consists of a number of connected VP / VC lengths. Shifting and cross-coupling can be performed at either the VP or VC level. The virtual vague identifier (VPI) and the virtual connection identifier (VCI) define a two-level handling and wavelength selection Mom ATM circuit. From the network architectural point of view, a virtual vague is a bunch of individual connections, a kind of "motor vogue" in an ATM network's map of vior. An important task in network operation is to allocate the right amount of transmission capacity to each such motorway (i.e. a virtual scale) in order to optimize network performance. This optimization task is the purpose of bandwidth management or techniques for dimensioning virtual scales.

FIGURE 4 illustrates the concepts of cross-coupling and switching for virtual scales and virtual connections. The virtual path identifier (VPI) values and the identifier (VCI)! Or virtual connection are only valid for a particular link. In each crossover or gearbox, new VPI / VCI values are assigned to the cell, where the combination of physical port and VPI / VCI value provides the identification for the ATM cell. The routing of an illustrative ATM cell is then performed using conversion tables such as that illustrated in TABLE 1.

CONNECTED FROM PORT VPI VCI CONNECTED TO PORT VPI VCI A 1 - C - A 2 - D 6 - B 3 C 7 4 B 2 D 3 ••• • • ••• TABLE 1 •• •• •• 06 •• 0.41 • • • 00 004 •• 004 • • • • • • • •• • • 12 • • • • •• • ••• * • • I • • I • • IS * • • • • •• • •• •. . ••• • • • • • 0 0 An ATM cell is the basic multiplexing unit Mom an ATM transport system where the habit cell or information unit contains its own switching and wobble selection information. This feature allows direct multiplexing or demultiplexing of service connections where each connection can have different bit rates. Each ATM cell is identified and routed through information contained in the header Mom field of the identifier (VPI) for virtual vdg and the identifier (VCI) for virtual connection. As mentioned above, a virtual vdg (VP) is a set of multiplexed connections between two termination points, e.g. vaxelsystem, gateways for lokal ndt (LAN) or gateways for privata nat. A VP provides a direct logical link between terminations of virtual scales, where the VPI value identifies the particular virtual scale.

As also mentioned above, the concept of "virtual space" used by Mom ATM technology allows multiple virtual connections (VCs) to be handled as a single device. Virtual connections with common features, such as those with the same quality of service (QoS), can be grouped together in bundles that can be transported, processed and managed as a unit. This flexible connection simplifies the operation and maintenance of an ATM system.

Both virtual scales and virtual connections can be used to provide semi-permanent scales to the Mom ATM network. Vior are drawn and released from an operating system by inserting "wall coupling tables" in the cross-coupling equipment or in the multiplexers a key is forced. Virtual connections can also be used for "switching on demand" where connections are picked up by signaling either between a user and the network or within the network.

An important feature of ATM technology concerns its protocol architecture and is built around the so-called "core-and-edge" principle. The protocol functions that are specific to the type of information being transported, such as retransmissions, river control and displacement equalization, are performed in terminals at the "edges" of the 13 ATM network. This provides an efficient, service-independent "core" network that only includes simple cell transport and switching functions. Within the ATM nodes in this "karna" there is no error control of the information field and no flock control. The cell information is simply read, the HEC is then used to correct errors in individual bits that can affect the address and the cell is then switched to its destination.

An ATM Adaptation Layer (AAL) is used at the "edge" of the network to enhance the services provided. As shown in FIGURE 5, the reference model for B-ISDN services according to CCITT thinks that AAL includes service-dependent functions. As depicted in FIGURE 5, there are three layers in the ATM standard. The first layer is the physical layer that defines the physical branches and frame protocols. The second ATM layer is independent of the physical medium selected and defines cell structure, provides multiplexing and demultiplexing as well as VPI / VCI conversion to control the flow of cells within the logical network. The third layer is AAL, which provides the important adaptation between the service and the ATM layer and thereby allows service-independent ATM transport. AAL performs mapping between the original service format and the information field in an ATM cell. Illustrative features provided by AAL include variable-length packet delineation, sequence numbering, clock reset, and performance monitoring.

Utilization of ATM in telecommunications networks An application of ATM technology can be used within customer premises to support high-speed data communication within and between local customer networks. In addition, ATM can be used as an infrastructural resource that is common to all services within a customer premises network, including voice and video communication, data transfers and multimedia applications. ••• ".::. •• .. ••.. •• ..". ••• • ••• • • • ••• • •• • • • • • •• • • • ••• • • • • • • •• • •• • • •• • •• • • •••• • •• 14 An illustrative service for which ATM nodes are inserted into a public telecommunications network is to provide the virtual leased line (VLL) service. The VLL service is based on the virtual wave concept and allows line capacity to be tailored directly to customer needs and others easily without modifying the interface structure. A large number of logical connections can be offered to a user through a user network interface (UNI).

In addition, a customized service quality can be offered to a customer, which meets the user's needs. Thus, several service classes, service quality classes and performance parameters can be selected. For example, voice services require small transmission delays but can tolerate high bit errors, while data communications on the other hand are more tolerant of network delays but more likely against bit errors. Thus, the level of service quality for a particular application can be contractually agreed between a service provider and a customer and revised manually or automatically to ensure that the agreement is fulfilled.

FIGURE 6 shows an illustrative "virtual connection" -based VLL service implemented in an ATM network. Network terminals A to E are each connected by respective flow enforcement nodes 601 to 605 to ATM cross-connection nodes 611 to 614. The ATM network consists of a plurality of ATM cross-connectors 611 to 614 which can provide wave control both on "virtual vag" - saval as "virtual connection" level. The river support functions 601 to 605 are located at the edge of the ATM network to protect the network from possible overloads. When the connections are established, this function causes no connection to violate the conditions set up.

Additional services can be implemented by adding services to one or more of the cross-connect nodes 611 to 614. Within the network according to FIGURE 6, an illustrative virtual wave is illustrated by the wavy line 621 between terminals ••• ••• •:: ••••: • .. "••: ••: • .. • ••••: L.

••• ••• • • ••• •• In: •. • • ••• ••• ••• •• •• •••••• C and D. A first virtual connection between terminals A and B is illustrated by the dashed line 631 while a second virtual connection is illustrated by the dotted line 632 between terminals C and E.

In addition to the virtual leased line network shown in FIGURE 6, other services such as SMDS / CBDS and frame relay can be easily added depending on demand by connecting servers to the ATM nodes within the network. In residential areas, ATM technology can be used to provide new and improved entertainment services such as order video to the end user. The flexibility of an ATM network makes it possible to support a number of services at the same time, such as long-distance education, home shopping and games.

FIGURE 7 illustrates an ATM network that has been laid over an SDH-based layered transport network. The layers comprise a layer 701 for customer local area networks, a layer 702 for local transport networks, a layer 703 for regional transport networks and a layer 704 for national transport networks. A plurality of ATM corporate network nodes 711 to 714 control the flow of data from customer premises terminals 715 and LAN 716 to a plurality of add-drop multiplexers (ADMs) 721, respectively, serving SDH cross-connect nodes 722 within the local the transport network 705. The local cross-connect nodes 722 are in turn connected by regional cross-connect nodes 731 in the regional transport network, two of which are connected by lag-to-take-away multiplexers 732. Within the layer 702 for local transport networks, a pair of ATM 723 services serve and SDH rings, including the add-to-remove multiplexers 721, cross-connectors 722 and used for subscriber access with a capacity of up to a full 155 megabits per second, the standardized STM-1 access rate for B-ISDN services.

Existing traffic such as Plain Old Telephone Service (POTS) can also be carried on this ring network where tar multiplexers and other access nodes provide the final subscriber line connection 0000 ..0: 0..0 0..0 • • • • 0000 • •: '.. "..' 4 .. '.. 16 (local-loop connection). The ATM access nodes 723 are shared for access to different services from one location and can include both numbers and data using different VP / VC In the ATM access nodes 723, ATM traffic is concentrated to use the transport capacity more efficiently.

The size of an ATM access node can vary, depending on the required capacity, from a small multiplexer to a large cross-coupler. In the regional transport layer 703, ATM cross-connectors 733 are used to direct traffic between local areas. The use of ATM technology is not visible in layer 704 for national transport networks, illustrated in FIGURE 7. In an ATM Overloading Network, such as that illustrated in FIGURE 7, services such as frame relay and SMDS / CBDS can be easily added. Functionality for B-ISDN can also be added to both access nodes and regional nodes by adding appropriate software and hardware. As also illustrated in FIGURE 7, a network operation system 750, such as one operating in accordance with the CCNT TMN standard, can be implemented to provide the necessary network operation functionality to both SDH and ATM elements in the network.

The operation of the ATM network through the subsystem 750 can be implemented in accordance with the family of telecommunications Management and Operations Support (TMOS) networks provided by Telefonaktiebolaget LM Ericsson, the applicant in the present patent application. Such network operation may include various functions such as weight selection algorithms and ratchet control.

High Speed Optical Switching Referring to FIGURE 8, there is shown a high level block diagram of a high speed ATM switching system which is constructed in accordance with an embodiment of the present invention for switching data such as ATM cells, or fixed size data packets. It should be noted that for simplicity, they have various control and clock signals as well as associated circuit blocks which are apparent to those skilled in the art deliberately omitted from this and other figures in this patent application.

As discussed above, each ATM cell is typically 53 octets long and consists of a 5-octet header which contains a virtual connection identifier, a priority field, and other information not relevant to the present invention. the remaining pieces. These bits are typically referred to as "payload" data or user data bits and are only transported unchanged through the weighting system of the present invention.

The VCI identifies a special virtual connection which is to transport the cell and which extends between a node within an ATM network such as a B-ISDN network to the next subsequent node. The particular connection identified by the VCI and thus its corresponding VCI designation varies from one node to the next as the cell is transported through successive network nodes. The value of the priority field is determined during call-negotiating negotiations and, as a result, it is conveniently generated by the user terminal that originally produced the cell being waxed. This value indicates the priority, relative to that associated with other cells being handled, with which the cell is to be transported through the network. The value of the priority field remains constant as the cell propagates through the various nodes in the network.

.. • • • •• • It is important to note in this case that the reference to ATM cells is for illustrative purposes only. One skilled in the art will appreciate that the gear according to the present invention. •• • •• ning works just as well with other electronic data structures. Data structures should be preferably in the form of packets of the same size and have the main • • • • • • one that can be converted to a designation number or an address for a switch • • • • •• • •• • exit port. • • ••• • • • • • • ••• • • • • •• • • 00 • • O. • 0.0 O. ••• • • • • • •• • 18 As shown in FIGURE 8 includes The ATM switching system 800 comprises a plurality of input interface modules 801 - 804, each of which receives a plurality of input lines from the network, e.g. 128 data lines for habit ingInput interface. The outputs of each of the input interface circuits 801 - 804 are connected to the inputs of a waveguide circuit 805 whose output is connected to the inputs of a plurality of multiplexers 806 - 809. The outputs of the various multiplexers 806 - 809 are optically connected to the inputs 8 of the wax inputs.

Similarly, the outputs of the optical switch 810 are connected through a plurality of demultiplexers 811 - 814 to a router 815 and thence to a plurality of output interface circuits 816 - 819. The outputs of each of the output interface circuits 816 - 819 are interconnected to connected interconnected wires. . A control system 820 is connected to the routers 805 and 815, the optical switch 810 and the input and output interfaces 801 - 804 and 816 - 819, respectively, to coordinate the activities thereof. User terminals or switching stations that are selectively known within the line are connected to the external spirits of each of the user lines within the network to deliver and receive ATM cells in a bit-serial manner.

Each of the input interface circuits 801 - 804 may include a number of network functions including the termination of a plurality of associated data lines, whether they originate directly from a user or from the network; protection of the network by maintaining incoming data in a form that is suitable for \ Taxiing and transport through the network; limiting the data rate or connection bandwidth of the person for whom the user has specifically signed a contract; concentration and sorting of packages when necessary; and performing cell head conversions for each incoming ATM cell.

Each ATM cell typically consists of a main segment of 5 octets followed by a payload segment of 48 octets. The main segment of 5 octets typically contains vagal selection information pertaining to the destination of the ATM cell. However, if an ATM cell can be identifiablely related to a connection that has already been established, then the wobble information will be displayed as follows: •• • • 00 • • 00 • 000 00 •• loos • • • • • • • • • housed in the head of the ATM cell is sometimes redundant. In such a situation, the wall selection head which draws part of the usual ATM cell before the entry of that cell into the switching system 800 can then be removed from the ATM cell before the cell is fed to the virtual output connection of the hub. In one embodiment, the rocker head of an ATM cell contains one or more facts indicating the physical address of a particular output port to which that ATM cell is to be routed. In vdxel 800, habit ATM cell can be treated as data to be routed to a particular destination address.

Each of the input interface circuits 801 - 804 communicates with the switching system 800 by providing incoming cells at a specified data rate. Each of the output ground circuit circuits 816 - 819 receives outgoing cells at approximately the same data rate. Each of the input and output interface circuits is also connected to the gear control system 820 and is monitored and controlled appropriately by this unit. Special inputs and special outputs (not specifically shown) are provided to perform packet tests and switch functions and maintenance connections to switch 800 under the control of the control system 820.

With continued reference to FIGURE 8, the gear control system 820 performs a number of essential control tests and administrative functions for the gear 800. To perform these functions effectively, the control system 820 is designed to two-way communicate with and control each of the units comprising the gear 800 including input and output garden interface modules 801 - 804 respectively. 816 - 819, incoming and outgoing routers 805 resp. 815 and the optical switch 810.

For example. The exchange control system 820 handles incoming calls by establishing and disassembling virtual connections through the exchange 800 for habitual such calls, selecting routes through the routers 805 and 815 for incoming and outgoing ATM cells constituting each call handled by the exchange 800 ••• 41. • • • • 00 • O. • • 00 • .0 • • .0 • O. • • •• • 00 • • • • 004 • 0.

• • • • • O. • • • • .00 •: 0.0 ..0 O ... • • • • • and determination of the specific transformation of the head to be performed within each of the input and output interface modules.

In addition, the control system 820 also performs network maintenance functions and administrative functions such as locating and resolving problems within the network and maintaining data regarding the performance and status of vaxeM 800 and its interaction with the network. Vdxel control system 820 also distributes traffic between vdxel 800 and other parts of the network in order to use existing network resources efficiently. In addition, the control system 820 responds to various user requests as well as requests from users for changes in the service.

The control system 820 performs periodic routine diagnostic tests of the entire \ Taxel 800. In particular, the control system performs a sequence of diagnostic functions from time to time to apply predefined ATM test cells and test the resulting function, on a spirit-to-spirit basis, by whole gear 800 saval as to test the function of each of the component blocks described above Mom gear 800 and the optical gear 810.

Through such a diagnosis, the gear control system 820 can detect fault conditions and, in the event of such a fault, initiate appropriate corrective actions to counteract such faults. In the preferred embodiment, the gear control system 820 may include any of the many optional relatively large programmed computers and peripherals and memory devices associated therewith.

With continued reference to FIGURE 8, routers 805 and 815 are computer-controlled switching matrices that provide circuit-switched connections between input interface modules 801-804 and multiplexers 806-809. The connections through routers 805 and 810 are established by the control system 820 and are capable of dynamically varying the optical switch 810 or in one of the input or output interface circuits 801 - 804 and 816 - 818, respectively. 21 This flexibility provides a more fault-tolerant switching function. High-speed trunk lines connected by flexible specialized circuit circuits interconnect switch 800 with other switching nodes arranged by Mom in an ISDN-ATM network. Since these trunks are not particularly relevant to the present invention, they are not shown in FIGURE 8.

In the optical switching system of the present invention, incoming electronically encoded time domain signals are converted, e.g. ATM cells, to one or more optical monsters in the space domain. For example. the payload information in an ATM cell is converted into a first input image sample and the address information of the same ATM cell is converted into a second address input image sample. Depending on the type of switching, virtual wave or virtual connection performed in switch 800, different parts of an ATM cell can be converted to the first and second images. In the case of VP conversion, the VC address is interpreted as part of the payload information and can thus be converted to the first image representation.

A further aspect of the exchange system according to the present invention is that the optical exchange 810 is spatially compact (since it is not a distributed exchange) and a manifestation of the optical image information is realized in free space in the exchange itself and does not require a transmission channel. It should be noted that this switching system can be reconfigured to operate in distributed mode where the input and output stages of the switch are not in spatial proximity to each other. However, such a distributed arrangement would require a fiber optic cable with several cores to link the various stages of such a switching system.

The electronically encoded signal that is represented in the time domain, i.e. The contents of the ATM cell are transformed into two spatial monsters. The payload information of an ATM cell is converted into a first data input image sample and the relevant address information of the ATM cell is converted into a second address image sample. The first data input image containing the payload information is combined with the address image sample through an optical room encoder.

Since there are many input ports to the switch 800, the information coming into each input port is encoded analogously to what is described above where different destination addresses are assigned different address image samples. Furthermore, each of the address image monsters is said to be orthogonal in relation to all the Others. This requirement allows all encoded images to be stored spatially on top of each other, i.e. summed or multiplexed into a single image without affecting the information contained in them. The optical multiplexing function is performed by an optical image coupler and the image output produced there is a spatially superimposed coded image that can be considered as a single combined spatial monster.

An identical copy of the combined spatial image sample, which is a sum of each of the encoded image samples, is sent to each of the output space decoders in the switch 810. In conventional decoders, the combined spatial image sample is decoded using the address image sample corresponding to the address of the exit port. By utilizing the orthogonality property of the address image patterns and by threshing the optical image in an image regenerator, the image with Matching Address Samples can be restored. This image can then be converted from the space domain representation back to the time domain representation used in ATM cells.

Referring to Figure 9, there is shown an illustrative block diagram of an embodiment of the optical drive shaft 810 depicted in FIGURE 8. The ••• • •. The optical switch 810 shown in FIGURE 8 further includes a plurality of input ports 901 to 904 each comprising a packet buffer 911 for receiving ATM data packets coming from the multiplexers. 806 to 809 shown in. •• • •. •• FIGURE 8. • •. •. Incoming ATM cells are first received and stored in packet buffers 911. The address portion of each packet is deleted at 912 and the payload portion of the ATM packet is formatted at 913. Thereafter, the address data of the packets in the time domain is converted to an image in the space domain in an electronic / optical converter 914 (E / O) while the payload representation in the time domain is converted to an image in the space domain in a similar E / 0 converter 915. Each E / O converter contains a table with address image sample corresponding to the row of possible destination addresses .

An optical packet encoder 916 in each of the input ports 901 to 904 combines the address image from the E / O converter 914 and the data image from the E / O converter 915 into a merged optical image representation by modulating the data image with the address image. The modulation and demodulation processes are illustrated in FIGURE 10 for the simple case of a payload segment of 8 bits which is modulated with an address segment of 4 bits.

An 8-bit payload equal to 111001102 displayed in digital form at 1001 can be converted from binary digital representation to binary optical representation. In one embodiment of the present invention, the conversion from electronic to optical form is performed by representing each non-zero bit with an illuminated (ie a white) square and a habit bit containing a zero value with an undelivered (ie a black) square, as shown at 1002.

The optical representation of this 8-bit payload data is then arranged in a light-weight geometric sample optimized for transmission as shown at 1003. In the illustrative arrangement illustrated in FIGURE 10, the 8 squares of the optically coded payload segment are arranged around the periphery of a tree. -aisles-three-grids. As will be explained later in this patent application, an arrangement of the payload segment is considered to be axially symmetrical as a quarter of practical shells. The non-zero peripheral squares of the three-by-three grating shown at 1003 are then modulated using the coding / decoding sample 1010 to give the modulated optically coded sample illustrated at 1005. As can be seen from FIGURE 10, the black squares of 1003 are not modulated using the coding / decoding pattern 1010. As will be explained in more detail later in this patent application, the coding / decoding pattern 1010 needs to meet a number of conditions, including the fact that habitual monsters must correspond to a unique destination address.

The outputs of the optical encoder 916 in each of the input ports 901 to 904 are then multiplexed using an optical image switch 920 and rounded to a plurality of grinding sensors each corresponding to a separate destination address. The circular optical signal received by optical decoders 931 to 934 is then demodulated by a process which is in reverse order in relation to the modulation process set forth in detail above. The optical representation regenerated by one or more of the decoders 931 to 934 is converted back into electronic form by optical / electronic converters 941 to 944. The switched payload received at each destination scanner is then repackaged in payload packers 951 to 954 and fed to the corresponding demultiplexer. 811 to 814.

Similar processing of other ATM packets is performed in the circuitry of the input ports 902 to 904, and all the merged optical images from the four separate data input ports shown in FIGURE 9 are stored on top of each other to create a single composite Mid in the optical image switch 920. The single composite the image from the image switch 920 is projected to the inputs of a set of optical packet decoders 931 to 934.

Each of the decoders 931 to 934 contains the address image sample corresponding to its address and uses this address image sample to decode the optical signal received from the optical image encoder 920. Since the optically encoded data streams are orthogonal to each other, all the data streams can be exchanged in parallel simultaneously. . This function allows extremely fast \ Taxiing, potentially in the range of 10 terabits per second or more. The optical image coupler 920 may include selectable devices such as optical star couplers, either individually or in the form of an array.

Thus, the encoded image corresponding to each ATM data packet is actually projected into free space to the usual optical space decoder in the output port of the switch and decoded using the corresponding address image sample associated with that destination data port.

Non-Interfering Optical Encoding Samples An understanding of the optical encoding and decoding techniques contemplated in this invention can be obtained by referring to the four patterns illustrated in FIGURE 11. For convenience, the four patterns shown in FIGURE 11 will be described below. referred to as Sample A, Sample B, Sample C and Sample D and these are identified by the designations FIGURE 11A, FIGURE 11B, FIGURE 11C and FIGURE 11D in FIGURE 11.

Assume that the four optical encoders shown in FIGURE 9 can each encode each piece of information into any of the four optical samples shown in FIGURE 11. In this way, the optical encoders can indicate the destination of the usual piece of information. For example, the optical encoders may use sample A to direct data through an optical decoder toward the demultiplexer 811 or use sample B to direct data toward the demultiplexer 812, or use sample C to direct data toward the demultiplexer 813, or use sample D to directing data to the demultiplexer 814.

It is assumed that a binary data stream, which is composed of a stream of zeros and ones, will be coded using samples A, B, C or D depending on the destination of each bit, the coding sample being used about the value of 26 a particular bit where one and a zero sample or a blank sample is used if the value of the bit is zero. As previously described, the outputs of the four optical encoders shown in FIGURE 9 are superimposed and circulated to the four optical decoders of FIGURE 9 through the optical image switch 920.

FIGURE 12 shows the effects of superimposing monsters A, B, C and D. It can be shown that there are 16 different monsters that can be created by superimposing different combinations of four monsters. These 16 different monsters are listed in TABLE 2 below.

TAB ELL 2 MOnsternummer Cellinnehall 1 A 2 B 3 C 4 D - 6 A + B + C + D 7 A + D 8 B + C 9 A + B C + D 11 A + C 12 B + D 13 B + C + D 14 A + C + D A + B + D 16 A + B + C •• ••• • • •• •••• •••• •• • • •• • • • • • • • •• • • • • •• • • ••• • ••• ••• •• ••• •• ••• • • • •• •. •: •••••• ••••••• ••••••• •• 27 Samples 1 to 4 are the same as those shown in FIGURES 11A to 11D. Samples 5 to 16 are illustrated in FIGURES 12A to 12L. As can be seen from a comparison of the 16 monsters shown in FIGURES 11 and 12, no pair of the 16 monsters is identical to each other. This shows that the usual combination of the four patterns A, B, C and D can be resolved or decoded into their basic component patterns.

It is not necessary that the four monsters used for coding be symmetrical as shown in FIGURE 11. Such monsters may also be asymmetrical as shown in FIGURE 13. Referring to the four monsters shown in FIGURE 13 as monsters A, B, C and D, the superimposition of different combinations of these four patterns is illustrated in FIGURES 13 and 14. The 16 combinations possible with the four samples A, B, C and D are identical to those listed in Table 2. Patterns 1 to 4 according to Table 2 is shown in FIGURES 13A to 13D. The patterns 5 to 16 according to Table 2 are shown in FIGURES 14A to 14L. As can be seen, no pair of the 16 monsters shown in FIGURES 13 and 14 are identical to each other. Thus, it can be seen that the use of asymmetric monsters can also make perfect decoding of superimposed image monsters possible. The advantages of asymmetric basic monsters in comparison with symmetrical ones are discussed later.

It is not necessary that the basic samples used are non-overlapping. FIGURE 15 shows four patterns A, B, C and D that partially overlap. The effects of Overlay of Different Combinations of Samples A, B, C and D shown in FIGURE 15 can be seen in the 16 samples shown in FIGURES 15 and 16. As previously illustrated, Figures 1 to 4 are illustrated in Table 2 in FIGURES 15A to 15D and the samples 5 to 16 according to Table 2 are illustrated in FIGURES 16A to 16L. As before, it can be seen that no pair of the 16 patterns shown in FIGURES 15 and 16 are identical. Consequently, the dissolution of each of the 16 samples back into the basic component samples A, B, C and / or D is thus technically feasible. •• • • •• •••• _ •••• •• •• • • • •• • • •• • • •• • • ••• • ••• ••• •• •• •• • • • • • • • • •• • • • • • • • • • ••• • ••• •••• •• •••• •• 28 28 One of the disadvantages of using symmetrical monsters is the probability to obtain Elver-stored monsters that are identical to other superimposed monsters that have been rotated. Thus, e.g. the monster formed in FIGURE 12E may be identical to that formed in FIGURE 12F or may be identical to the monster shown in FIGURE 12F by an 1800 rotation. The same grid for the superimposed patterns shown in FIGURES 12G and 12H. FIGURE 12J can be obtained by a 90 ° clockwise rotation of FIGURE 121, and FIGURE 12L can be obtained by a 90 ° counterclockwise rotation of FIGURE 12K, while FIGURE 12D can be obtained by a 90 ° clockwise rotation of FIGURE 12C.

Thus, it can be seen that the use of symmetrical base monsters can thus be seen as likely to give rise to superimposed monsters that are identical if rotated. As can be seen from FIGURES 13 and 14, the use of asymmetric base samples significantly reduces the likelihood that these superimposed samples are rotationally symmetrical. However, even the use of the four asymmetric patterns shown in FIGURE 13 can still occasionally result in superimposed samples that may be identical if rotated. This can be seen by comparing FIGURE 14E with FIGURE 14F. FIGURE 14F can be obtained by a 180 ° rotation of FIGURE 14E.

As can be seen by a comparison of the 16 monsters shown in FIGURES 15 and 16, the use of the partially overlapping asymmetric monsters shown in FIGURE 15 leads to unique superimposed monsters, among which no pair of superimposed monsters are identical, although the rotated 90 °, 180 ° or 270 °. This observation can be used to prevent in a preventive manner transmission errors that result in free distortion or transformation of the image being circulated. It should be noted that none of the basic patterns A, B, C or D can completely overlap or be overlapped by any of the other basic patterns in the set because this would lead to at least two of the superimposed patterns being identical, ie. non-distinguishable. 29 Optical coding of the payload in an ATM cell As stated in detail earlier in the description, an ATM cell consists of 53 octets, which further consists of a main segment of four octets followed by a payload segment of 48 octets. In order to use the optical switching technique and the system described in the present invention for exchanging ATM cells, the conventional ATM cell of 53 octets is first divided into a main part and a payload part.

The fifth octet of the 5 octet ATM cell head contains the cyclic redundancy check code (CRC). It is common in a telecommunication system to ignore the CRC code yid the internal processing of the contents of an ATM cell. This is due to the fact that the probability of errors inside a treatment system is law in comparison with the probability of bit losses etc. in the transfers between a sanding and a receiving system. The remaining part of the head of an ATM cell contains addressing information which provides details about the destination of that ATM cell. This digital destination address can be used to optically modulate the usual piece of payload information to accommodate the non-interfering multiplexed rotation described in detail.

There are 384 binding pieces of information in the payload section of 48 octets in each ATM cell. In one embodiment of the present invention, the payload E / O converters 915 combine the payload portion of each ATM cell into a 16 x 24 cell grid as shown by the black portion of the 24 x 24 cell grid in FIGURE 17. Where and one of the cells in the 16 x 24 cell grid is modulated with the addressing samples A, B, C, D etc. depending on the destination of the ATM cell. The modulated samples generated by each of the optical encoders 916 are superimposed on the optical image switch 920 and circulated to all the optical decoders 931 to 934. Each of the decoders analyzes the modulated sample of each grating cell to determine if the grating cell contains a bit intended for that decoder. The presence of a modulated sample corresponding to the decoder's address is interpreted as a separate binary value (0 or 1) at that position of the ATM cell.

In some situations it may be useful to have a symmetrical payload grid, e.g. if you want to minimize the physical size of the systems for coupling and broadcasting optical images. Such an embodiment is illustrated in FIGURE 18 in which an ATM payload package of 384 bits is imaged on a 20 x 20 cell grid that does not use the 16 cells in the center.

A further refinement of the 384 bit ATM payload can be obtained by using the third embodiment of the base sample shown in FIGURE 19, which has the additional advantage of being relatively axially symmetrical. Such axial symmetry can reduce edge dispersion and further reduce the cost of the optical equipment used to encode and decode the images.

Other embodiments of assembling the payload portion of an ATM cell other than those shown in FIGURES 17 to 19 are also possible. An ATM cell can be circulated in several steps and thus a 384 bit ATM cell can be transmitted as 6 packets of 64 bits ddr each of the 64 bits encoded into a base grid of 8 x 8 cells, etc.

It is also possible, depending on the availability of suitable optical encoders and decoders, to transmit more than one ATM cell through each optical encoder 916 at a given time. Thus, if more than one ATM cell is going to the same destination, it is possible to group the payload sections of all such ATM cells in a combined package and transfer all these ATM cells at the same time to the same destination. In some situations, it may be unreasonable to insist that multicell-type ATM packets are all the same size.

The present invention also allows individual transmission of different pieces of information to different addresses and can consequently be used in future applications which are not limited to the principles of ATM systems. In summary, one embodiment of the present invention requires that each of the pieces of information be optically modulated using some of the addressing samples such as those illustrated in FIGURES 11, 13 or 15. As shown above, the use of the habit allows such setting of coding patterns to provide an exact resolution of images. created by Overlaying combinations of the basic coding patterns.

Since the payload portion of a conventional ATM cell is usually directed to a single destination address, it may sometimes be impossible to modulate each of the payload bits in an ATM cell with the optical samples A, B, C or D illustrated in FIGURES 11, 13 or 15. Instead, it may be sufficient if a certain area of the basic pattern which is helpful for the black parts shown in FIGURES 17, 18 or 19 contains the destination address image. In such cases, such a combined image can be transmitted to all the optical decoders 931 to 934 through the optical image coupler 920. The ideal optical decoder on the landing page would also load the basic data and transmit it to the lamp multiplexer while the remaining optical decoders simply would ignore the data that was circulated to them. However, the use of this unmodulated transfer protocol would require that only one ATM cell be switched at the usual time.

Although a preferred embodiment of the method and apparatus of the present invention has been illustrated in the accompanying drawings and described in the foregoing detailed description, it is to be understood that the invention is not limited to the embodiment (s) shown but may accommodate a variety of restructurings, modifications and substitutions. to depart from the spirit of the invention as set forth and defined by the following claims.

Claims (19)

A method for high-speed switching of electronic data packets from one of a plurality of input ports of a switch to a selection of a plurality of output ports, the method comprising the steps of: dividing a signal packet received at the usual port into a first electronic representation of the time domain. the data-carrying part of the signal and an electronic representation of the address-carrying part of the signal second in the time domain; converting the electronic representations in the time domain of each of the data parts and the address parts into separate first and second spatial image representations thereof, respectively; combining the first and second image representations into a merged image that can be associated with a separate packet received at each of the plurality of input ports; multiplexing each of the merged images associated with each of the input ports into a single composite image; broadcasting the single composite image to a plurality of template sensors, the habitual sensor being associated with a particular destination address for the incoming signal packet; demultiplexing the composite image into a plurality of different merged images, each associated with a separate output port, the demultiplexing being performed by superimposing the address image portion corresponding to each destination data port for the incoming signal packet; and 2. • 3. • 4. conversion of the merged image received at the usual output •. • 5. • 6. •• port back to electronic time domain form including an address part and a 7.. • 8. • • 9 9 . • 10. data part. 11. • ••. •••• 12. • • 13. • • 14. •• 15. • 16. • • 17. • 18. • 19. • • 20. • • 21. • • 22. • • 2. A procedure for parallel high-speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, the method comprising the steps of: separating the address portion of each digital data sequence from the payload portion of the digital data sequence; determining the destination output port for each digital data sequence using the address portion of the digital data sequence, generating a unique modulating optical sample corresponding to the destination output port for modulating the payload portion of the digital data sequence; generating an encoded optical sample comprising a plurality of cells by encoding each of the digital data sequences using a preselected conversion protocol; modulating each cell of the encoded optical sample using the unique modulating optical sample to obtain a corresponding modulated optical sample; Overlaying the modulated optical samples obtained from each of the digital data sequences to form a composite optical sample; broadcasting the composite optical sample to a plurality of destination receivers; demodulating the composite optical sample in each of the destination receivers using the unique modulating optical sample corresponding to the destination receiver's address; and decoding the demodulated optical sample at each output port to obtain a waxed digital data sequence in the time domain. •• • 1. • • 2. • 3. The method of claim 2 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a phage of multiple output ports, in which the digital data sequences are ATM cells. •• ••• 5. •. • • • 6. ••. The method of claim 2 for parallel high-speed switching of a plurality of digital data sequences from one of the a plurality of input ports for a selection of a plurality of output ports, further comprising the step of: 34 assembling the payload portion of the conventional digital data sequence into one or more frames suitable for optical switching. The method of claim 2 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, further comprising the steps of: repackaging all or part of the address portion of the original digital data sequence with the payload portion of the original digital data sequence; and feeding the repackaged digital data sequence to an output processor for further transmission. The method of claim 2 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the step of generating a unique modulating optical sample is performed by selecting one of a plurality of symmetrical non-overlapping sample samples. so that habit selected modulating monster is associated with no more than a single destination output port. The method of claim 2 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the step of generating a unique modulating optical sample is performed by selecting one of a plurality of asymmetric non-overlapping sample samples. said that habit selected modulating monster is associated with no more than a single destination output port. The method of claim 2 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the step of generating a unique modulating optical sample is performed by selecting one of a plurality of asymmetric partially Over 1. • • • •• • • 00 • • 00 • SOO ••• 0 .. • •• to0 • • • • • • • •• • • patching modulating monsters said that each selected modulating monster is associated with no more to a single destination exit port. The method of claim 2 for parallel high speed validation of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, wherein the step of generating an encoded optical pattern comprising a plurality of cells further comprises the steps of: converting the information housed in the payload portion of the digital data sequence in binding form; and associating habit binary was about 0 or 1 with a particular state of a cell in the encoded optical sample. The method of claim 9 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the coded optical sample draws a rectangular grid with 384 cells arranged in 16 rows and 24 columns. The method of claim 9 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the coded optical sample is a square grid with 384 cells arranged in 20 rows and 20 columns therefor. The 16 cells in the middle remain unused. •• • 1. • • 2. • 12. The method according to claim 9 for parallel high-speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the coded optical pattern is a bilateral sym- ••• 7. • •. • • 8. metric grid with 384 cells, of which each quadrant has a row of 3 co- 9. • 10. • • 11. •• 12. • lumens, a row of 6 columns, a row of 7 columns, a row with 8 columns 13. • 14. • • 15. •• 16. • ••• ner, a row with 9 columns, a row with 10 columns and a row with 11 columns 17. • 18. • •• • 19. .lumner. 20. • • 21. • • 22. • ••• 23. • • 24. • • 00. 25. • 26. • • O. • • .0 • 600 00. •••: 0.0 • ••• • ..0 0 ... • 27. • • • • 00 • • 0O 28. • • • • 0. • 1. • 00 36 13. A system for high-speed switching of electronic data packets from one of a plurality of input ports of a switch to a selection of a plurality of output ports, the system comprising: means for dividing a signal packet received at the usual port into a first electronic representation of the data-bearing part of the signal in the time domain and an electronic representation of the address-bearing part of the signal second in the time domain. ; means for converting the electronic representations in the time domain of each of the data parts and the address parts into separate first and second spatial image representations thereof, respectively; means for combining the first and second image representations into a merged image that can be associated with a separate packet received at each of the plurality of input ports; means for multiplexing each of the merged images associated with each of the input ports into a single composite image; means for circulating the single composite image into a plurality of flour sensors, each sensor being associated with a particular destination address of the incoming signal packet; means for demultiplexing the composite image into a plurality of different merged images, each associated with a separate output port, the demultiplexing being performed by superimposing the address image portion corresponding to the usual destination data port for the incoming signal packet; and means for converting the merged image received at the usual output port back to electronic time domain form comprising an address portion and a data portion. A system for parallel high-speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, the system comprising: ••• ••• 1. • • 2. • •• 3. • •• • • •• • •• • • •• e • •• • •• 4. • ••• 5. • • • ••• • •• • • 6. • • • •• • 7. • • • ••• 8. •: ••• ••• •••• •••• •••• 9. ■ •• •••• 37 means for separating the address portion of each digital data sequence from the payload portion of the digital data sequence ; means for determining the destination output port for each digital data sequence using the address portion of the digital data sequence; means for generating a unique modulating optical sample corresponding to the destination output port for modulating the payload portion of the digital data sequence; means for generating an encoded optical sample comprising a plurality of cells by encoding each of the digital data sequences using a preselected conversion protocol; means for modulating each cell of the encoded optical pattern using the unique modulating optical pattern to obtain a corresponding modulated optical sample; means for superimposing the modulated optical samples obtained from each of the digital data sequences to form a composite optical sample; means for circulating the composite optical sample to a plurality of destination receivers; means for demodulating the composite optical sample in each of the destination receivers using the unique modulating optical sample corresponding to the address of the destination receiver; and means for decoding the demodulated optical sample at each output port to obtain a switched digital data sequence in the time domain. The system of claim 14 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the digital data sequences of ATM cells. The system of claim 14 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, further comprising: 0.. 00 • • • • 1. • 0. 1. • 00 • • 00 2. • 0. • • 00 • 00 • 3. • • • 4. • • • 5. • • • 6. • • • • 7. • • 8. • 00 • • • • 0. 0 1. • 38 means for assembling the payload part of the usual digital data sequence into one or more frames suitable for optical switching. The system of claim 14 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a plurality of output ports, further comprising: means for repackaging all or part of the address portion of the original digital data sequence with the payload portion of the original digital data sequence; and means for advancing the repackaged digital data sequence to an output processor for further transfer. The system according to claim 14 for parallel! high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, wherein the means for generating a unique modulating optical sample further comprises means for selecting one of a plurality of symmetrical non-overlapping modulating samples. to habit selected modulating pattern an associated with no more than a single destination output port. The system of claim 14 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, wherein the means for generating a unique modulating optical sample further comprises means for selecting one of a plurality. • • 1. • • 2. • asymmetric non-overlapping modulating monsters said that each selected modulating monster is associated with no more than a single destination output. •• 5. • 6. •• 7. gait sport. 8.. •. • • 9. • • 10. • 11. • • 12. •• 13. • 14. • 15. •. 16. O. 17. • ••• 18. • 19. • ••• 20. • 21. • • 22. • • 23. • ••• 24. • • 25. • • 20. The system according to claim 14 for parallel high-speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the means for generating a unique modulating optical sample further comprises means for selecting one of a plurality of 1. • • • •• • • 41O • • 00 0041 0941 •• 41410 •• • •• •• ••: 39 asymmetric partially overlapping modulating monsters so that each selected modulating monster is associated with no more than a single destination output port. The system of claim 14 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a plurality of output ports, wherein the means for generating an encoded optical pattern comprising a plurality of cells further comprises: means for converting the information contained in the payload portion of the digital data sequence in binding form; and means for associating each binary species were 0 or 1 with a particular state of a cell in the encoded optical sample. The system of claim 21 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a selection of a plurality of output ports, in which the coded optical sample is a rectangular grid with 384 cells arranged in 16 rows and 24 columns. The system of claim 21 for parallel high speed switching of a plurality of digital data sequences from one of a plurality of input ports to a plurality of output ports, in which the coded optical sample is a square grid with 384 cells arranged in 20 rows and 20 columns where the The 16 cells in the middle remain unused. The system of claim 21 for parallel high speed switching of a plurality of di. •• 1. digital data sequences from one of a plurality of input ports to a selected one 2. •• ••• 3. • • several output ports, in which the coded optical pattern is a bilateral sym 4. - 5. •. 6.. 7. • • 8. •• metric grid with 384 cells, of which each quadrant has a row of 3 co- • 9. • • 10. • 11. • • 12. •• 13. • ••• 14. • ••• columns, a row of 6 columns, a row of 7 columns, a row of 8 columns 15. • 16. • down, a row with 9 columns, a row with 10 columns and a row with 11 columns • •• • 17. • • 18. •• • lumner. 19. • •