SE9601119L - Method of making substrate contacts - Google Patents

Method of making substrate contacts

Info

Publication number
SE9601119L
SE9601119L SE9601119A SE9601119A SE9601119L SE 9601119 L SE9601119 L SE 9601119L SE 9601119 A SE9601119 A SE 9601119A SE 9601119 A SE9601119 A SE 9601119A SE 9601119 L SE9601119 L SE 9601119L
Authority
SE
Sweden
Prior art keywords
substrate
component
shielding
components
metal
Prior art date
Application number
SE9601119A
Other languages
Swedish (sv)
Other versions
SE9601119D0 (en
Inventor
Tomas Jarstad
Hans Norstroem
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9601119A priority Critical patent/SE9601119L/en
Publication of SE9601119D0 publication Critical patent/SE9601119D0/en
Priority to US08/821,880 priority patent/US6472723B1/en
Priority to JP9533415A priority patent/JP2000507045A/en
Priority to EP97914739A priority patent/EP0888636A1/en
Priority to AU21873/97A priority patent/AU2187397A/en
Priority to KR1019980707362A priority patent/KR20000064650A/en
Priority to CNB971945144A priority patent/CN1143386C/en
Priority to CA002248141A priority patent/CA2248141C/en
Priority to PCT/SE1997/000487 priority patent/WO1997035344A1/en
Priority to TW086103708A priority patent/TW320770B/zh
Publication of SE9601119L publication Critical patent/SE9601119L/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Low resistant contacts (205) are made from surface of semiconductor component (201), down into the substrate (203), by etching a hole down into the substrate, which by CVD - deposition is filled with a metal, such as tungsten. A good electrical shielding against other components or blocks of components located on the same substrate is obtained by locating - substrate contacts at close distances around a component or a block or a group of components. - Shielding can be obtained vertically upwards by applying a metal layer on top of the component. Metal plugs obtained in this manner can be used for shielding electrical signal conductors in a semiconductor structure. The upper ends of plugs are interconnected by electrically conducting material, of particular material having good electrical conductivity.
SE9601119A 1996-03-22 1996-03-22 Method of making substrate contacts SE9601119L (en)

Priority Applications (10)

Application Number Priority Date Filing Date Title
SE9601119A SE9601119L (en) 1996-03-22 1996-03-22 Method of making substrate contacts
PCT/SE1997/000487 WO1997035344A1 (en) 1996-03-22 1997-03-21 Semiconductor device shielded by an array of electrically conducting pins and a method to manufacture such a device
AU21873/97A AU2187397A (en) 1996-03-22 1997-03-21 Semiconductor device shielded by an array of electrically conducting pins and a method to manufacture such a device
JP9533415A JP2000507045A (en) 1996-03-22 1997-03-21 Semiconductor device shielded by conductive pin array and method of manufacturing the same
EP97914739A EP0888636A1 (en) 1996-03-22 1997-03-21 Semiconductor device shielded by an array of electrically conducting pins and a method to manufacture such a device
US08/821,880 US6472723B1 (en) 1996-03-22 1997-03-21 Substrate contacts and shielding devices in a semiconductor component
KR1019980707362A KR20000064650A (en) 1996-03-22 1997-03-21 Semiconductor components arranged on the surface of a semiconducting substrate, a method of manufacturing the same, and an electrical signal conductor shielded in a semiconductor structure and a method of manufacturing the same
CNB971945144A CN1143386C (en) 1996-03-22 1997-03-21 Semiconductor device shielded by an array of electrically conducting pins and manufacture thereof
CA002248141A CA2248141C (en) 1996-03-22 1997-03-21 Semiconductor device shielded by an array of electrically conducting pins and a method to manufacture such a device
TW086103708A TW320770B (en) 1996-03-22 1997-03-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9601119A SE9601119L (en) 1996-03-22 1996-03-22 Method of making substrate contacts

Publications (2)

Publication Number Publication Date
SE9601119D0 SE9601119D0 (en) 1996-03-22
SE9601119L true SE9601119L (en) 1997-09-23

Family

ID=20401917

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9601119A SE9601119L (en) 1996-03-22 1996-03-22 Method of making substrate contacts

Country Status (1)

Country Link
SE (1) SE9601119L (en)

Also Published As

Publication number Publication date
SE9601119D0 (en) 1996-03-22

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