SE8902165D0 - Krypteringskrets - Google Patents
KrypteringskretsInfo
- Publication number
- SE8902165D0 SE8902165D0 SE8902165A SE8902165A SE8902165D0 SE 8902165 D0 SE8902165 D0 SE 8902165D0 SE 8902165 A SE8902165 A SE 8902165A SE 8902165 A SE8902165 A SE 8902165A SE 8902165 D0 SE8902165 D0 SE 8902165D0
- Authority
- SE
- Sweden
- Prior art keywords
- encryption
- circuit
- standard
- memory
- encryption algorithm
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/24—Key scheduling, i.e. generating round keys or sub-keys for block encryption
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Storage Device Security (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8902165A SE464991B (sv) | 1989-06-16 | 1989-06-16 | Krypteringskrets uppbyggd med grindmatristeknik |
DE1990622780 DE69022780T2 (de) | 1989-06-16 | 1990-05-18 | Verschlüsselungsschaltung. |
EP19900850188 EP0403456B1 (en) | 1989-06-16 | 1990-05-18 | Encryption circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8902165A SE464991B (sv) | 1989-06-16 | 1989-06-16 | Krypteringskrets uppbyggd med grindmatristeknik |
Publications (3)
Publication Number | Publication Date |
---|---|
SE8902165D0 true SE8902165D0 (sv) | 1989-06-16 |
SE8902165L SE8902165L (sv) | 1990-12-17 |
SE464991B SE464991B (sv) | 1991-07-08 |
Family
ID=20376293
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE8902165A SE464991B (sv) | 1989-06-16 | 1989-06-16 | Krypteringskrets uppbyggd med grindmatristeknik |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0403456B1 (sv) |
DE (1) | DE69022780T2 (sv) |
SE (1) | SE464991B (sv) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1102310C (zh) * | 1994-07-14 | 2003-02-26 | 林仙坎 | 一种文件加密处理方法 |
US6243469B1 (en) * | 1997-09-18 | 2001-06-05 | Matsushita Electric Industrial Co., Ltd. | Information transmission method and apparatus |
KR100377176B1 (ko) | 2000-06-12 | 2003-03-26 | 주식회사 하이닉스반도체 | 데이터 암호화 표준 알고리즘을 이용한 암호화 장치 |
KR100377172B1 (ko) * | 2000-06-13 | 2003-03-26 | 주식회사 하이닉스반도체 | 데이터 암호화 표준 알고리즘을 이용한 암호화 장치의 키스케쥴러 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4274085A (en) * | 1979-06-28 | 1981-06-16 | Motorola, Inc. | Flexible mode DES system |
DE3631992A1 (de) * | 1986-03-05 | 1987-11-05 | Holger Sedlak | Kryptographie-verfahren und kryptographie-prozessor zur durchfuehrung des verfahrens |
US4771462A (en) * | 1987-02-18 | 1988-09-13 | Hannan Forrest A | Communication port encryption/decryption method and apparatus |
-
1989
- 1989-06-16 SE SE8902165A patent/SE464991B/sv not_active IP Right Cessation
-
1990
- 1990-05-18 DE DE1990622780 patent/DE69022780T2/de not_active Expired - Fee Related
- 1990-05-18 EP EP19900850188 patent/EP0403456B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
SE8902165L (sv) | 1990-12-17 |
EP0403456B1 (en) | 1995-10-04 |
SE464991B (sv) | 1991-07-08 |
EP0403456A3 (en) | 1991-01-16 |
DE69022780D1 (de) | 1995-11-09 |
EP0403456A2 (en) | 1990-12-19 |
DE69022780T2 (de) | 1996-03-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2401459B1 (sv) | ||
DE69428215D1 (de) | Verfahren zur digitalen Unterschrift die eine Beglaubigung der digitalen Zeit beim digitalen Unterschreiben verwendet | |
TW371324B (en) | Pattern generator with extended register programming | |
ATE139633T1 (de) | Speicher mit programmierbarem zugang | |
TW350956B (en) | Semiconductor memory testing device | |
GB2222461B (en) | On chip testing of semiconductor memory devices | |
TW328595B (en) | Integrated circuit memory using fusible links in a scan chain | |
DE69527867D1 (de) | Verfahren und Vorrichtung zum Authentifizieren eines Datanträgers, bestimmt zum Zulassen einer Transaktion oder des Zuganges zu einer Dienstleistung oder zu einem Ort; und entsprechender Datenträger | |
EP0262867A3 (en) | Integrated circuit with memory self-test | |
PT1181424E (pt) | Dispositivo de chave e fechadura | |
DE68924639D1 (de) | Matrixspeicher, der Standardblöcke, Standard-Unterblöcke, einen redundanten Block und redundante Unterblöcke beinhaltet, und integrierter Kreis, der eine Vielzahl solcher Matrixspeicher beinhaltet. | |
DE69326654T2 (de) | Einbrennprüfeingabeschaltung eines Halbleiterspeichergeräts und Einbrennprüfverfahren dafür | |
MY108976A (en) | Multiport memory with test signal generating circuit controlling data transfer from ram port to sam port | |
DE69517072D1 (de) | Halbleiter-Speichereinrichtung-Prüfschaltung mit Datenverschlüsslungfunktion | |
EP1251520A3 (en) | Random access memory | |
KR100199545B1 (en) | Circuit arrangement for testing a semiconductor store by means of parallel tests with different test bit pattern | |
KR910008730A (ko) | 반도체 기억장치 | |
SE8902165L (sv) | Krypteringskrets | |
DE69831918D1 (de) | Speicherschaltung mit DMA Prüfung und sein Prüfverfahren | |
DE50211514D1 (de) | Verfahren zur Erhöhung der Sicherheit von Schaltkreisen gegen unbefugten Zugriff | |
ATE54379T1 (de) | Einen schnellen stabilen speicher bildende elektronische vorrichtung. | |
SE8605381D0 (sv) | Manoverenhet for datakommunikation | |
DE69027545D1 (de) | Vorrichtung und Verfahren zum Frequenzwechsel | |
TW374176B (en) | Input/output circuit of high-speed semiconductor memory device requiring less time for testing | |
JPS55140960A (en) | Memory device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
NAL | Patent in force |
Ref document number: 8902165-3 Format of ref document f/p: F |
|
NUG | Patent has lapsed |
Ref document number: 8902165-3 Format of ref document f/p: F |