SE460723B - ELEVATOR CONSTRUCTION INCLUDING A REVERSE CONTROLLER FOR POWER SUPPLY AND CONTROL OF A MULTIPhASE ENGINE - Google Patents

Description

460 723 10 15 20 25 30 35 2 depending on the design of the engine and whether it works as an engine or generator or as a brake. In order to develop maximum torque and maximize engine efficiency, the lag under load-A conditions must be kept at that figure. If, for example, a two-pole motor is driven from a source of 60 Hz during motor operation, the speed at nominal torque would be approximately 3540 rpm, which is a positive lag of + 1 Hz.

According to a reverse mindset but using the same criteria, if the motor is operating at a higher speed than that frequency, current can be emitted from the motor or regenerated back to the source. The lag should also be maintained within those limits in this case, but for regeneration or braking, the engine speed can, for example, be 3660 at nominal torque.

In this case, the lag is negative, -l Hz.

It is therefore not surprising that many techniques have been tried for precise control of the lag, but most have not achieved the desired results, as they are too expensive, too complicated or do not provide good properties.

In a unit for controlling the lag in a lift, it is particularly important and necessary, since the characteristics of the motor in that case must be superior to those of most other applications. For a comfortable ride, for example, the engine must accelerate and decelerate smoothly without vibration and noise, but the system speed must still be high. It must also be efficient, which means that it must regenerate current and it must of course work in such a way that it provides precise basket positioning at the floor level. Of paramount importance is that the motor often has to operate at or near speed zero, ie a condition in which accurate frequency control is critical for smooth behavior.

An object of the present invention is to provide a lift driven by a multiphase motor with speed and torque control. According to one aspect of the present invention, a multiphase motor is fed by an inverter which is powered by a direct current source, for example a battery which is charged by a battery charger. The inverter is controlled in such a way that the engine lag is regulated to achieve maximum torque and also maximum regeneration for charging the battery. The inverter's output frequency and output size are also controlled to control the motor speed and torque.

According to another side, this inverter is controlled by a device which leaves signals representing a calculated motor speed and lag. Using these signals, the inverter is driven to follow a sine wave pattern which has the desired frequency of the calculated lag and a desired size to achieve the desired engine work with that lag. These signals are generated digitally by sensing the shaft position of the motor as well as constantly accumulating a count and increasing that count in proportion to the desired lag. The accumulated count occurs in any particular time period corresponding to a quarter of the time for that sine curve; Taking into account the characteristic relationship between the different phases of the signals supplied to the motor, the relative, instantaneous Y-value of the sine curve signal at each phase is produced from that count. The Y value is adjusted up and down to reflect the instantaneous levels of each phase driving the inverter. This provides a signal which is applied to each phase input of the inverter of a switching device. The magnitude of that signal is scaled up or down to control motor current or voltage. Starting from a simple arithmetic number, which represents motor speed and axle position, and by adding some numbers to that arithmetic number, a multiphase drive to gear -, -> -, -; f, is thus achieved. Uwv fl u fl. wwww fl .. 10 15 l2O -25 30 35 460 723 4 the rectifier for controlling engine speed, lag and torque. A feature of the invention is that the lag control achieved is very accurate, since the shaft is coded at a very high frequency, substantially higher than the speed of the motor or in other words many times during each revolution.

The control is universal; it can be used on all multi-phase motors and by increasing the motor speed count together with different pole configurations and by the fact that it is not in itself frequency limited, it can control a motor over very wide speed ranges, especially near zero speed and low speed, which makes it very attractive for lifts. By simultaneously providing a very accurate lag control, the invention optimizes the regeneration of current back to the battery, and this is a feature that is particularly useful in an elevator system, where regeneration takes place approximately 30% of the time due to a counterweight to the load.

Other objects, advantages and features of the invention will become apparent to those skilled in the art from the following description, taken in conjunction with the accompanying drawings. Fig. 1 is a block diagram of an elevator system utilizing an inverter for driving a three-phase motor, which inverter is powered by a battery and controlled in accordance with the present invention. Fig. 2 is a block diagram of an amplitude and frequency control unit used in the plant of Fig. 1 to drive the inverter to achieve lag, torque and speed control. Pig 3 consists of several waveforms, which have a common time base. Fig. 1 shows an elevator control system which comprises a number of functional components which are well known and whose construction is not critical to the invention. These components are therefore not described in detail except in the 2nd; Extent required for the description of the invention.

These components comprise a motion control unit, according to a profile generator and a speed and torque control unit together with other units, hereinafter identified.

In Fig. 1, an elevator car 10 is connected by means of a cable 11 to a counterweight 12. The basket is connected to the multiphase induction motor 13 which receives three-phase current from an inverter 14. The motor drives a tachometer 15 (shaft encoder) which generates a tachometer output signal TACH 1 on a line 15a, which signal reflects the instantaneous speed of the motor. The inverter receives direct current from a battery 16, and the battery is charged by a charger 17, which is connected to a power source. The direct current can flow to and from the battery via the inverter. Current can flow to the battery by regeneration from the motor as a result of the movement of the basket in one direction (eg downwards) and this charges the battery next to the charger. The battery leaves most of the shock or peak power to the inverter, which means that the system is in fact isolated from the power source, which eliminates a source of radio frequency interference and other electrical interference that can build up in the power system and interfere with other equipment. A system control unit 18 receives basket control signals and demand signals and communicates in response thereto with a motion control unit 19 via a plurality of lines 19a. The motion control unit sends signals from lines 19b to a profile generator 20, which in a predetermined or programmed manner determines a particular movement or speed profile, after which the elevator car is to be moved in response to the motion control unit. This idea is shown in countless patents. The profile generator generates an output signal EROF 1 on a line 20a, which is connected to a speed and torque control unit 21; This speed and torque control unit leaves in response. on the signal PROF l a first direct current signal SLIP l v: “ywwr v; 'w p, W. 460 723 10 15 20 25 30 v ww' “fi üwyvv - .Wmix-VJ * Mvh” W. Ill / w; : h vw »» the movement in a certain way. The signals PHASES 1-3 are phased (7,120, 240 for a three-phase motor, as the example shows) and from the signal AMPLITUD 1, the AFCL circuit is fed to a current regulator (CR) 23, which then generates CR outputs. which are also sine waves, have their output lines 23a, these signals 6 on a line 21a, which signal SLIP 1 reflects a desired lag for the particular signal PROF1 generated by the profile generator. The control unit 21 also transmits on a line 21k: a second direct current amplitude AMPLITUD 1, which represents the desired amplitude of the current (or voltage) to the motor winding for moving the basket as desired.

The connection between the signals SLIP 1 and AMPLITUD 1 determines the torque and speed of the motor, and the connection is established by feedback control, which control is centered on sensing the signal TACH 1, which is supplied from the tachometer, and feeding it to the motion control unit, profile generator, speed and the torque control unit, which use it to generate its respective signals, as well as the signals SLIP 1 and AMPLITUD 1 to obtain a desired motor property characteristic at any time for regulating the basket movement as required.

The signal TAÖH 1 is also supplied to an amplitude and frequency control circuit (AFCL) 22, which also receives the signal S SLIP 1 and the signal AMPLITUD 1. The AFCL circuit uses these signals to generate signals PHASES 1, 2, 3 on three output lines 22a. , each of these signals consisting of a high-resolution step sine wave, the sine wave size varying in the selected ratio to the AMPLITUD 1 signal for controlling basket slides as required by the phase of the engine (e.g. 0, their frequency reflects the desired motor speed and lag for a selected signal SLIP 1. Their magnitude reflects the desired motor current, which is controlled These signals PHASES 1-3 which constitute the output signal from 10 15 20, 25 30, 35i 460 723 7 'are output to a pulse width modulator (PWM The pulse width modulator outputs the corresponding PWM outputs, each of which comprises a pulse, the duration of which varies in proportion to the magnitude of the corresponding CR signal. The PWM signals are fed to the inverter p to a line 24a. The current regulator provides a closed loop control of the motor current to ensure that it closely follows the signals PHASES 1-3. This type of control is well known in the art. ^ The PWM signals supplied from the pulse width modulator to the inverter switch on and off special sections or parts of the inverter in direct proportion to the duration of the pulses in the PWM signal. The inverter switches the battery voltage on and off in proportion to the duration of the pulses that form the PWM signals, this voltage being applied to the motor windings via lines 14a. Due to the fact that the duration of the pulses driving the inverter is in a sinusoidal relationship due to the AÉCL circuit, the average values of the pulses at the output of the inverter are also sinusoidal. However, even if the output signal on each of the lines 14a from the inverter is voltage pulses, the inductive property of the motor results in a sinusoidal current (I) through the motor across each of the lines 14a, the frequency of that current being the prime frequency of the signals. PHASES 1, 2, 3. The harmonic harmonics are dramatically suppressed due to the inductance of the motor and thus the inverter actually leaves a sinusoidal three-phase current to the motor, which current corresponds to digital pulses, which reflect the frequency, magnitude and phase ratio of the current among the motor windings. the ings. This current I is adjustable to its frequency and magnitude, whereby the motor speed, torque and lag are regulated. This adjustment is accomplished by the AFCL circuit 22, which will be described in detail in the following.

Fig. 2 shows the AFCL circuit 22. The AFCL circuit receives the signal SLIP 1 and also the signal AMPLITUD 1. The signal SLIP 1 is applied to a voltage controlled oscillator (VCO) 30, which generates a VCO output signal on a line 30a. The VCO signal applied to a flip-flop 32 consists of a chain of pulses, the frequency (VCO frequency) F1 of which varies in proportion to the direct current level of the signal SLIP 1, which may be set between predetermined positive and negative values, these levels defining a motor speed range over which the voltage controlled oscillator frequency can vary to control the motor lag. The flip-flop 32 also receives a CLK output signal from a clock 33, which signal senses the signal from the voltage controlled oscillator to the flip-flop output, where a flip-flop signal is generated, which is also a chain of pulses of the frequency F1, which pulses are applied across a line 32a. lag counter 34, which counts these pulses. The lag counter counts continuously upwards and restarts when it reaches its maximum count (eg N bits). Its output signal is thus in fact a signal COUNT 1, which reflects the count at any given time.

Fig. 3 shows this type of recurring count over time, with the Y coordinate representing the digital output signal or COUNT 1 and the X coordinate representing the time. The signal SLIP 1 is also fed to a second flip-flop 36. This flip-flop, which is also strobeed by the CLK signal, responds to the polarity of the signal SLIP 1, changing state from high to low level depending on that polarity to provide a counting direction. signal CD, which controls the lag counter to count up or count down. The signal COUNT 1 from the lag counter is fed on lines 34a to a motor speed adder 35, which also receives the output signal from another counter, namely the speed counter 40, g over lines 40a. 10 15 20 30- k _35, V Supplied on line l5a. That line includes the dvantingen high or low level. This signal is fed to this to count up or down with respect to high or low level pulses. Like the lag counter Ölen from rocker 42d. The result is an output signal COUNT 2 460 723 9 The speed counter receives the output signal from a circuit 42, which includes a flip-flop 42a. This rocker 42a y leaves on its output lines 42b a train of square-wave wave pulses. These are emitted in response to the output signal from a sub-circuit 42e, which receives the signal TACH, which in fact two wires, each of which emits a square wave pulse relative to the other, the pulses on these wires being 900 phase shifted.

The divider circuit 42e receives the square wave pulses ¿on one of these lines and emits as its output signal 3 trigger pulses, which have a repetition frequency which is equal to or lower than the repetition frequency of the square wave pulses applied to its input. The output signal É from the flip-flop 42a is output to the input of the speed counter 40. Both the signals constituting the signal TACH are also supplied to a comparator circuit 42c and this circuit generates in response an output signal which, depending on the relationship between these two pulses , (ie which is behind and which is behind in phase) represents the direction in which the motor turns. The output signal from the comparator 42c is then fed to a flip-flop 42d, which in response generates an output signal with the count control connection to the counter 40 to control the signals from the flip-flop 42a depending on whether that signal also continues the speed counter to count upwards, to be reset and to then count up again. It can also count down depending on the output of the counter 46. This signal is also shown in Fig. 2, The repetition rate of COUNT 2 is F2, which is proportional to the motor speed, since they are generated by the rotation of the motor. The pulses constituting the signal TACH 1 _ ¿¿460 723 10 15 20 _25 30 _, 10 are generated very quickly during each rotational revolution of the motor, the effect of which is that the rotational position is sensed very accurately. The purpose of the divider will then be to correlate that count to the motor operating frequency, which is necessary to take into account the number of poles in the motor, since the number of poles determines the speed of the motor. bone correlation is significant because the repetition frequency F2 should correspond to the drive frequency. If, for example, a four-pole motor and a two-pole motor are compared, the shaft position in the four-pole motor must be sensed so that COUNT 2 is generated faster per revolution. The signal TACH must thus be divided by two for a two-pole motor, otherwise F2 would be too high, ie the motor would not be synchronized within the lag range. (This presupposes that the same tachometer is used, and furthermore the count per revolution must be the same regardless of engine speed.) The reason for this will become clearer from the following parts of this description, which will show that from the fundamental frequency F2 a higher or lower frequency is determined from the signal COUNT 1 for varying the driving frequency from that of the actual motor speed, which is done to control the lag.

The motor speed adder 35 adds COUNT 1 and COUNT 2, generating on its output lines 35a an output signal COUNT 3 (waveform A), which constitutes the sum of the two. The effect of adding COUNT 1 and COUNT 2 is a shortening of the time it takes to obtain a special COUNT 3 and thus shortening Ti fig 3. As the lag counter counts upwards, in other words, the inclination of the waveform will increase. due to 't getting smaller. As it counts more slowly, the slope will be smaller because T will increase. Thus, by changing the VCO frequency, * ss T can be increased and decreased in proportion to COUNT 1, where the area is the lag area or At, which defines a change in frequency between F1, which is the frequency V of COUNT 1, and F2, which is the frequency of COUNT 2. 10 15 20 25 ao 460 723 11 As explained in detail below, to maintain a certain lag COUNT 1 is controlled to be higher or lower than COUNT 2 by an amount equal to the lag desired (eg specified for the engine). The total effect of the AFCL circuit on engine operation is represented by this equation (1).

F (SYNC) ß f F (ENGINE) I F (DELAY) (l) Here F (S ¥ NK) is also the frequency P3 for the signals PHASES 1-3, which is the drive frequency of the inverter. F (MoTOR) is the engine speed and COUNT 2 is a function of it but can be 3 depending on the direction of rotation, since COUNT 2 can be a downward pull or an unpaired. Fzßrwsnsnxpnxwc), which is the same as the vco frequency, may be I dependent on the signal SLIP, which may be 1 to cause lag. A smooth transition between motor functions is thus achieved, which is important for equalization at speeds close to zero.

In addition to COUNT 3, the adder 35 also leaves a digital output QC, which represents the number (0-4) of cycles made by COUNT 2. Each cycle is a quadrant, nom 90 ° 1 represents a complete 360 ° cycle.

To do this, the output signal of the motor speed bit adder may have N bits but in fact use N-X bits for COUNT 3, and the remainder of the N bits to indicate the quadrant and the sign of the sine curve in that quadrant.

The signal COUNT 3 from the motor speed adder is applied to a second adder, namely the phase adder 44.

The float adder 44 also receives on lines 46a a phase identification signal PC from a ring counter.46, which ring signal is emitted in response to the CLK signal. The signal Pc Mr¿35t_ identifies at each time one of the desired fa-} '¿s, ie the lines tt ex 0 °. 120 °, 240 °> - This lf¶PC signal is a number which, if added to COUNT 3 460 723 10 15 20 25 30 12, would reflect what COUNT 3 would be in that phase, ie a mode shifted by the same amount phase reflected 1 PC signalßx The ring counter emits! in other words, continuously a "circulating, digital" number, which when added to COUNT 3 reflects a count for one of the phases. The signal PC is also added to the signal QC in the phase adder, whereby a signal PQ is generated, which * represents the right quadrant of that phase of the PC signal, since the quadrant may be different for another phase. The output signal from the facadder 44 comprises the array (1) a momentary digital representation couuæ 4 for raxnßcaißt for a particular point x or count for a phase, and (2) a digital representation of the quadrant for the signal PQ and its characters.

COUNT 4 represents the coordinates of any point on the sine curve in Fig. 3, but only between 0 ° and 90 °.

From these two, the correct point on the sine curve for that coordinate at each time point is formed. This happens in the “AFCL circuit” for each phase, each time the signal PC ¿å changes, which cuts at the CLK rate. The signal COUNT 4 and the signal PQ are fed to a subtraction unit 48 via the lines 44a. In response to the signal PQ, the subtractor outputs an output signal IC, which is the correct coordinate value of the quadrant indicated in the signal P0 for COHNT 3. The subtrahrax counts I downward from the signal COUNT 4 for other quadrants in the presence of a signal PQ, which identifies the kvndrant, as if it is not present disable: the subtractor. ; It then appears that the effect of the signal PC is a displacement of the signal IC between 0 °, 120 ° and 240 °. The signal IC from the subtractor is a coordinate 1 (axis X) and it is output on lines 48a to a storage memory 1 in the form of memory memory. man Ic signal - _fi a I I V yvadxesneran a special number in the look-up table; In the sine curve between 0 ° and 90 °. Läsminnnt thus generates which number corresponds to the ninus value for a point on »_ fjpå sina utçàngsledningar 50a en digital utsignai SIG _, n .. ___ / H” ... q- .fníl Ewe vw I wy \ _m «- ~ fr ~ fi wn, w. (_, Jul, _ 10 15 * X3.: D 25 30 35 »the identifier identifies the switch DRIV 460 723 13 1, which is the sine value of the coordinate identified by COUNT 3 but still uncorrelated for the polarity of The signal SIG 1 is fed to a digital-to-analog converter 52, which generates an analog output signal DRIV 1 on a line 52a. This signal DRIV 1 it is output to a switch circuit 54, which also receives the M signal PQ and depending on which quadrant the l between a positive and a negative value, which gives the signal DRIV l the correct polarity for that quadrant, the signal SIG 1 (and also DRIV 1) would for example be negative in the quadrants 3 and 4, as shown by the etreoked sine curve , which contains SIG 1 '(where SIG 1' is SIG 1 on the true sine curve), a complete ß sine curve is thus generated by the four quadrants shown over time as different signals SIG 1 are produced and given the correct polarity.S From switch In the circuit, the signal DRIV 1 is fed on a line 54a to an amplifier 56, the gain of which is controlled under the influence of the magnitude of the signal AMPLITUß I to produce an output signal DRIV 2, the magnitude of which is proportional to the signal AMPLITUD 1.

This output signal DRIV 2 is fed simultaneously to three switches 60, 62 and 64, each of which corresponds to a phase drive of the inverter, each of which passes through one of the signals PHASES 1, 2 and 3. These three switches receive The PC signal from the ring counter 46, which signal identifies the phase of the signal DRIV 2, and depending on what that signal is, one of these switches is actuated, which transmits the signal DRIV 2 to the right of sample and hold circuits 55, which generates a step sine signal over time as the DRIV 2 signal is generated.

The output signals of the circuits 55 are the signals FAS 1, FAS 2 and FAS 3. in accordance with the signal PC and have the common frequency F (S ¥ NK) (see Equation 1).

I ~ ll The signals PHASE 1, PHASE 2, PHASE 3 are thus phased »Ä w; I 460 723 10 '15 20 25 30 35 i _, Vr, 14 To demonstrate this lag control, this example is given. A two-pole AC motor at 3600 rpm is assumed, which is operated with variable frequency drive using the invention. What are then the frequencies of the VCO output signal (F1) and the signals TACH as well as the required lag characteristics for (case l) zero torque, (case 2) positive driving torque and (case 3) negative regeneration or braking while using a constant signal AMPLITUD l ji Fall 1; F (MoToR> = eo az ÅÉ F (DELAY) = OF (SINK) = so Hz VCO frequency = If _ TACH frequency = 1024 pulses / s Ä Case 2: - “É F (MoToR) = so Hz F ( DELAY) = + 1 Hz »P (syNK) = 61 Hz VCO frequency = + l70 TACH frequency = 1024 pulses / s Case 3: F (MOTOR) = 60Hz F (DELAY) = -l Hz F (syNx) = 59 Hz VCO ~ frequency = -170 TACH frequency = 1024 pulses / s With this system the basket can thus be moved .Ü from speed zero to full speed at a regulated 'f pace and with a controllable lag by regulating ¿the signals SLIP l and AMPLITUD l. I A variety of operations can obviously be performed in this system with computer-based equipment Discrete parts have been used in this specification for illustrative purposes to demonstrate a way of realizing the invention. There are modifications and variations that can be made in the embodiment described herein without departing from the scope and spirit of the invention; some of these variations may be made. Include the use of a computer to perform the discrete circuits and devices which have described adders, counters and flip-flops which easily provide a convenient, comparatively inexpensive way of performing certain functions which may be performed. performed on the computer, for example using a microprocessor. 460 725 functions, which are performed in the discrete system including the AFCL circuit.

Needless to say, there are other uses for the invention. It can, for example, be used to drive a cyclic inverter instead of an inverter to drive the motor. In other words, the AFCL circuit can be used to provide sine-related signals for operating the cyclic converter to provide alternating current to a multiphase motor.

The use of the invention for controlling a three-phase motor has been shown and described, as it facilitates an understanding of the invention. Nevertheless, it is obvious to those skilled in the art that it could be used to control other motors, such as a two-phase motor, simply by using the correct phase signal ratio in order to identify the phase windings and in order to generate the correct coordinate of M the sine curve of the winding and establishing the correct I bf polarity for it. Although the invention has been shown for use in controlling motor current, it could be used to control motor voltage. By correlating the amplitude and the lag, different motor and lag controls can also be obtained, for example a signal § can determine the torque of the motor.

From the above it appears that there are many. applications of the invention for controlling induction motors and that the invention can be carried out in many ways, possibly by using a computer for performing various types of calculation functions performed by _vits. This can in fact be an economically attractive alternative to the use of such devices

Claims (5)

-fs _, \ n -__ ~. . v _---- «~ -.-- ~~~ ¿-MÜM-IVW-Wff. _, ïemaym fl a fl v flfi rwwàe-.ym fi wïf-fwvw fi w_qwmfqqfeff. ._ _ -, \ <¿, ..-, -,>, k. 1.41 »10 Ils 20 25 30 46o 72z 1 6 PATENTKRAV An elevator system comprising an inverter (14), which is fed from a direct current source (16, 17) for - supplying power to a multiphase motor (13) with N phases and a corresponding number of windings, where N is greater than or equal to two, a position encoder (15) for providing a tachometer signal (TACH), which identifies the position of the motor shaft; and - inverter control means (24) for controlling the operation of the inverter (14) for generating N-phase alternating current or voltage for the stator windings of the motor (13) for controlling the rotational speed, lag and direction of the motor, comprising a unit ( 21) for providing an amplitude signal (AMPLITUD) in response to the tachometer signal (TACH) for controlling the rotational speed of the motor, and for providing a lag signal (SLIP) in response to the tachometer signal (TACH) for controlling the difference between the rotational speed of the motor and the frequency (F SYNK) of the alternating current or voltage supplied to the motor (13) by the inverter (14), characterized by first means (22) arranged in response to the lag signal (SLIP) ) and the tachometer signal (TACK) to produce a first signal (IC), which is repeated with the frequency of the alternating current or voltage (F SYNK) and which identifies an angular position on a sine curve, and to produce N second signals (SIG ), each representing the Y-coordinate of the sine curve at different angular positions thereof, which positions are equally spaced apart by 360 ° / N, the other N signals being produced in a successive sequence during each motor revolution, which sequence in a motor direction is opposite to the sequence »gi in the opposite direction; other means (56) for varying the size of 10 15 20 »25 30 35. .Uw- »-wv Wu .f m., V» wwawnw-wr- www »Mwy-w I-wuy- fl w - w- ,, H» f-. ._, WN r I v; Each second signal as a function of the amplitude signal (AMPLITUD) means (60, 62, 64) for supplying each second signal to each of the inverter inputs in accordance with the successive sequence; and that the first means (22) comprise a unit (40) for providing a shaft position signal which in direct relation to the shaft position and successively increases to a first level during shaft rotation in a quadrant and decreases from that level in the next quadrant, a unit (34) for providing a lag size signal in response to the lag signal, the lag size signal representing the lag frequency and the lag direction, and - a unit (35) for summing the axis position signal and the lag signal first. _ Elevator system according to claim 1, characterized in that the operating signal (IC) indicates a motor shaft position within one of four possible quadrants, when the motor has the lag associated with the lag signal, and the operating signal is repeated during each shaft revolution four times the number of motor poles. Elevator system according to claim 2, characterized in that the unit (35) for producing the first signal (IC) is also arranged to provide a quadrant signal (QC), which indicates the instantaneous motor shaft quadrant, and that the first means (22) also comprises a phase adder (44) for receiving a phase signal (PC), which identifies the angular position of one of the N phases and decreases or increases the first signal to produce a signal indicating an adjusted magnitude for the first signal on a sine curve at said angular position, the frequency of the sine curve being equal to the repetition frequency of the first signal. Elevator installation according to claim 1, 2 or 3, characterized in that said second means (56) for ,,. ,,,. “. ,, .._, _ \ 1,, .. ._ w. W, ~ _. fwf ~~ ~ v - f - v - vq ww.; _ «- -11 L» -fi w - * v '-' i .wf - ~~~ 'rr' ~. The variation of the magnitude of each second signal comprises an amplifier (G) which receives an analog signal, the gain of the amplifier being adjustable as a function of the amplitude signal, and that the means for supplying each second signal to one of the N windings consists of a switch circuit (60, 62, 64) with a controllable switch, each of which is connected to the output lf of the amplifier, each of which is sensitive to Å a particular control signal among the N control signals which simultaneously is fed to the switches, whereby a special control signal is supplied for every other signal. Elevator system according to one of Claims 1 to 4, characterized in that the direct current source comprises a battery (16) for supplying the inverter (14) and a battery charger (17).