SE444730B - LJUDSYNTETISATOR - Google Patents

Description

_zo sooesso-5 »p_2 FL ~ Flanagan, ÜSpeech analysis, Synthesis and Perception", pp {339-347; Springer-Verlag, 1972. This system synthesizes speech using the formant frequencies and their intensity as parameters. This is advantageous in view of that the amount of information for the parameters can be small and that it is easy to achieve concordance between the parameters and the spectral properties.However, in order to obtain the formant frequency and its intensity, it is necessary to use general dynamic features and statistical properties of the parameters, and fully automatic retrieval of the formant frequency and its intensity is therefore difficult.Therefore, it is difficult to automatically obtain high quality synthesized speech, and a marked deterioration of the quality of the synthesized speech is likely due to errors in the formation of the parameters. An object of the present invention is to provide a sound synthesizer which is capable of Another object of the invention is to provide a sound synthesizer which allows relatively easy extraction of the characteristic parameters and which works stably, and the differences between the spectral sensitivity of the parameters should be small. and the quantization accuracy of the parameters is the same at the same number of quantization bits. Yet another object of the invention is to provide an audio synthesizer which has excellent interpolation properties for the parameters used and which can thus produce high quality synthesized sound from a small amount of information.

A further object of the invention is to provide a sound synthesizer which can be realized in the form of a relatively simple construction.

E In linear prediction analysis, the envelope of the t-spectrum is approximated by the transfer function of a filter with only poles, which function is given by the following expression (1): H (Z) =, =. l _. G _ (13 »Apízj 1 + üqZ_ + åäZ2 + ... + QbZp 'where Za = efjaå and where azär the normalized angular frequency _ 2¶4f¿LT, where AI is the sampling period, f the sampling frequency, p the degree of analysis, mi (i = 1, 2, ... p) the prediction coefficients, which constitute parameters for checking the resonance properties of the filter, and where 6 is the gain of the filter, here A (Z) is represented by the sum of two polynomials, which can be expressed as follows: 1 / zzPcz> + Qczui L f AA cz) jApcz1 = Pczn = Apczj - z zPApcz "> f ~ Q (Z) = APLZ) + _z-zPAp (z" 1) (4) (a ) When the degree of analysis p is even, the expressions (3) and (4) can be divided into factors as follows: P (Z) = (1 TZ) àÉ: (1 f Zcosa fi z + Zz) _ 1 ", (5) _ 2 t Q (ZI) _., (1 + (l ~ 2cos fl iZ + 22) '(b) When the degree of analysis p is odd, the expressions (3) and (4) are divided into factors as follows:' P (Z) = (1 - Z2 ) (pñâ) / 2 '(l -Zcoswí Z + zz) i = lr' _., (6) Q (Z) = (p + l) / 2 (1 ~ 2c0s0í Z + Z2) ißí I express (S) and (6) the quantities cdi AND are called Qi (Qi line sp ectrums (hereinafter referred to as LSP), and in the present invention these quantities are used as parameters for the representation of spectral envelope information.

With A (Z) given by the expression (2), the transfer function H (Z) can be written mn = fsfíï = 1 + Åbdz I-1I = P r P, _IH O '_.1 +.% - [1> (z) - 1 + Q (z) '- 1J (7) The transfer function H (Z) is designed as a filter with two feedback loops, the transfer functions of which are P (Z) -1 resp. Q (Z) -1. The transfer functions P (Z) and Q (Z) are parallel resonant circuits and their output becomes zero at (di and Qi).

The ap frequency (F) of the expression Ap (Z) is as follows: i,. , __ i _._ .. l _._, _.__, ...... (..... vw -... w-af. i, _, _ soo6aso ~ saf P / 2 I '-1 1 ...

| Ap (Z) | 2 = 2p fi cosz å) (cosqf- coS9i) 2 2- (cosaø- eosaq) 2] - (8) + sin 2 '2 wp / 1: where Z = eujaå From the expression (8) it appears that in an area where adjacent line spectral frequencies are close to each other, | Ap (Z) | 2 is small, and the transmission function H (Z) exhibits pronounced resonant properties. By changing the LSP parameters Gå and Qi which describe the resonant characteristics of the transmission functions, an arbitrary speech spectrum envelope can be obtained.

The procedure for obtaining the LSP parameters is as follows. As a first measure, the autocorrelation coefficients of the speech wave are formed at intervals of, for example, 10 to 20 ms, and as a second measure, the prediction coefficients Mi of the transmission function H (Z) are extracted from these autocorrelation coefficients. As a third operation, the solutions of the two polynomials P (Z) and QCZ) are formed from the prediction coefficients based on the expression (2), thus obtaining the LSP parameters ha and Gi. By setting the coefficients of the synthesis filter using the parameters representing the spectral envelope information of the number, a filter can be obtained whose transfer function H (Z) is equivalent to this spectral envelope. The transfer function of the feedback loop of the synthesis filter is achieved in the form of a cascade of quadratic filters, the zeros of which lie on a unit circle in the Z-plane, as indicated by the expressions (S) and É (6). Since these two quadratic filters have an identical structure, the construction can be simplified by multiple use of a quadratic filter using time division, ie so-called pipeline operation. It is also possible to carry out the filtration procedure by means of a computer without performing the second-hand filters .._ ... sy f. As circuits. As described above, in the present invention the properties of the synthesis filter are checked by the parameters go and Gi, but in addition to these two LSP parameters are used, as is the case with hitherto used speech synthesizers of this kind, also a fundamental frequency parameter and an amplitude parameter. By means of the basic frequency parameter, a toned sound source is controlled so that it generates a pulse or a group of pulses with the .20 40A pS 8.0685 @ .5 frequency given by the parameter. Depending on whether the reconstructed sound is toned or voiceless, the output of the toning sound source or the output of a noise source is selected. The selected output signal is fed to the sound synthesizing filter, and the magnitude of a signal at the input or output of this filter is controlled by the amplitude parameters. The LSP parameter 01 odi9i_ is subjected to cosine transformation by means of I parameter transformation means in order to generate ~ 2cos then and -2cos 9í which are used as control parameters for controlling the coefficients of the sound synthesis filter's quadratic filter in accordance with the parameters. By means of interpolation means inter- Apolate the control parameters in the form of the cosine-transformed LSP parameters -Zcos then and -Zcos Qi; The interpolation means can also be used to interpolate the amplitude parameter.

The LSP parameters wa and Gi 'have excellent interpolation properties, and the interpolation is performed at time intervals equal to the sampling period or double the sampling period of the original sound in the generation of the parameters; for example, the lSP parameters ¿u & and Gi are updated at each frame of 20 ms, and the parameters within each frame are further interpolated every 125 ps. It is also possible to perform the interpolation on the LSP parameters aa and Qi and convert them to the control parameters.

The LSP parameters »hä ochv 9- have a small amount of information per frame compared to the control parameters for previous speech synthesis filters and have excellent interpolation properties. Consequently, it is convenient to transfer or store the LSP parameters nä and Gi as they are, and it is also possible to convert the received or reconstructed LSE parameters .ak cch- Gi to control parameters for synthesis filters used in other speech synthesis systems¿ for example to PÄRCOR coefficients or linear prediction coefficients.In this way, the LSP parameters aa and Qi can also be used in existing speech synthesizers. The speech synthesizer made in accordance with the present invention can be used not only in synthesizing ordinary speech but also pre-synthesizing other sounds such as a time signal tone, an alarm tone, the sound of a musical instrument and the like. In the invention is described in more detail below with reference to the accompanying drawing. Pig. 1 is a block diagram illustrating the basic structure of an embodiment of the sound synthesizer according to the invention. Pig. Fig. 2 is a block diagram of a particular embodiment of the sound synthesizer according to the present invention; Fig. 3 is a circuit diagram showing examples of first and second degree filters included in the synthesis filter section. Fig. 4A is a block diagram. diagram 4B is a diagram illustrating an example of the synthesis filter unit in case the degree of analysis is odd. Fig. 5 is a graph showing the relationship. - that between the LSP parameters .ak and Qí and the envelope of the speech spectrum.

Fig. 6 is a circuit diagram illustrating a particular embodiment of the synthesizing filter unit when the degree of analysis is 4. Figs. 7 is a circuit diagram illustrating a particular embodiment of the synthesizing filter unit obtained by equivalent conversion of the circuit shown in FIG. Fig. 8 is a circuit diagram showing a certain example of the synthesis filter unit when the degree of analysis is 5. Figs. 9 is a circuit diagram showing a particular embodiment of the synthesizing filter unit obtained by equivalent conversion of the circuit shown in FIG. Fig. 10 is a block diagram showing an example of the synthesizing filter unit using time division calculation. Figs. 11A-111 are timing charts showing the signal variations at different points during operation of the filter unit shown in Fig. 10. Fig. 12 is a circuit diagram showing the case where the filter function achieved according to Fig. 11 is achieved by means of a series connection of filters. Pig. 13 is a block diagram illustrating an example of the synthesis filter using a microcomputer. Pig. 14A is a graph showing the variation of the effect with time in producing the "ba ku o N ga" sound sequence.

Pig. 14B is a graph showing the da and Gi change of the LSP parameters over time in producing the sound sequence g "ba-ku o N ga". Fig. 15 is a graph showing the relative frequency distribution of the LSI parameters dai and Gi. Fig. 16 is a graph showing the relationship between the number of quantization bits per frame and the spectral distortion caused by the quantization. Pig. 17 is a graph showing the relationship between the spectral distortion caused by the interpolation and the frame length in the event that the parameters are interpolated. Fig. 18 is a block diagram showing an example of synthesizing speech by converting the LSP parameters yy and Gi to o9 parameters.

In the device according to Fig. 1, the characteristic parameters of the number to be synthesized are fed to the input terminal __20 so_Ao '. _ ._ .._.... ..... . -f «w -.« - A -... a.qeuww. fl wf -.-. w _ __: f _ .. _ W fi vwfwa? __? _V _ ,, ._ 7 ,: ..,. fwïçwwwmwgwnrm al. 11 8006350-5 _11 on an interface 12 at regular intervals (hereinafter referred to as "frame period"), for example every 20 ms, and is retained or stored in this interface 121 Of the parameters entered in this way, the LSP parameters aa and Qi are applied, which indicate spectral envelope information, to a parameter conversion unit 13, while the amplitude information of the sound source information indicating parameters is fed to a parameter interpolation unit 14 and other parameters - ie information regarding the fundamental fundamental period (pitch) of the speech and information indicating whether the speech is tonal or voiceless - to an audio source signal generator unit 15. A '_ Aj In the parameter conversion unit 13, the input LSP parameters_aa and Gi are transformed into control parameters -Zcos aa and -Zcos Gi for a synthesizing filter unit 16 and these control parameters are fed to the parameter interpolation unit 14. In the latter 14 is calculated with regular time intervals interpolation v the values of the control parameters and the amplitude parameter so that the spectral envelope can undergo an even change. The control parameters interpolated in this way are fed to the synthesizing filter unit 16, while the amplitude parameter is supplied to the generator unit 15. In this a sound source signal is generated depending on speech characteristics on the basis of information regarding pitch and whether sound is toned or toneless. The sound source signal thus obtained is fed to the synthesizing filter unit 16 together with the interpolated sound source amplitude parameter.

In the filter unit 16, synthesized speech from the sound source signal and the control parameters is provided. The output signal from the filter unit 16 is fed to a digital / analog converter unit 17 and gives rise to an analog signal at its output terminal 18. A control circuit 19 generates various clock signals for correct activation. the speech synthesizer and feeds these signals to the various units. Fig. 2 shows in more detail each circuit unit in Fig. 1.

During each frame period, information regarding the toning or voiceless sound of the speech is supplied from the interface 12 to a register 23 for toning sounds and a register 24 for voiceless sounds, and a speech frequency parameter indicating the pitch of the speech is stored in a pitch zs register. the latter registers zsinnehåil fa; set a down-counting counter 27. This is counted down by means of a terminal 26 fed pulses of a certain sampling frequency, and each time its content becomes zero the counter is again preset to the equivalent j 10 240 240 ........ .........-._ ~ @. »_ .:. . .. «._» - àossso-s A r g_8 'to the content of the pitch register 25 and at the same time it supplies a pulse to a gate 31. To this gate 31 the output signal from the register 23 for toning sounds and one or more pulses from a pulse generator is fed Z8, and when these pulses coincide, the contents of a sound source amplitude register 34 are fed via the gate 31 to an adder 32. In other words, when a toned sound is to be synthesized, the amplitude information is fed to the adder 32 from the amplitude register 34 at each period of the fundamental frequency in the pitch register 25. When the sound to be synthesized is toneless, the output signal of the register 24 and a pseudo-random series pulse are fed from a pseudo-random generator 36 to a gate 37, and each time these two input signals are amplified. coincides, the amplitude information in the amplitude register 34 is supplied to the adder 32 via the gate 37. This is obtained from the adder 32. The audio source signal is amplified if required by an amplifier 39 and then fed to the speech synthesis filter unit 16. The IVI parameter conversion unit 13 is input during each ramp period the LSP parameters Må and Qi and the amplitude parameter in a register_21 from the interfaces 12. The LPi parameter and Gi is applied to a parameter converter 22, in which they are converted to the control parameters -Zcos qâ and -Zcos Si. The converter 22 consists, for example, of a conversion table in a read-only memory, which is designed such that access by means of addresses corresponding to ¿Qi and Gi results in reading of -Zcos then and -Zcos Gi. A shift register 20 is alternately applied to the output signal of the parameter converter 22 and the amplitude parameter stored in the register 21 and converts them into a series signal which is fed to the parameter interpolation unit 14; In the embodiment shown, the parameter interpolation unit 14 is arranged to perform linear interpolation. When a switch 29 is switched on, the parameters belonging to a frame are fed to a subtractor 30, in which the difference is formed between the current parameter and the parameter of the previous frame, which is supplied from an adder 33. This difference is transmitted via a switch 91 to a difference value register 38 for storage. The switch 91 is then reversed to the output of this register 38 so that the register contents are circulated. At this time, the contents of the register 38 are taken from bit positions over a predetermined bit position and fed to the adder 33, where said contents ~ @ §_ _ ~. ~, ..,: .._, =. » ,, ._ 1. '_ d; _20 40 * 19- 4 h 4 sooss5o-5 'is added to the contents of an interpolation result register 92.- -If the parameter update period is, for example, 16 ms; is it you; required to generate interpolation parameters 128 times during a frame update period. The width of the interpolation step is in this case the value obtained by dividing the difference value by 128, which is achieved by shifting the difference value in the register 38 seven bits to the less significant side. The result of the addition in the adder 33 is applied to the interpolation result register 92 and is also used at the same time as an output signal from the parameter interpolation unit 14. In this way, the values obtained by sequentially adding at each circulation in the register 38, values corresponding to end time, twice, three times, .. the difference value of the difference register 38 to the parameter of the previous frame, which is stored in the register 92. In this example, the parameter interpolation unit 14 is used on a time division basis for the controller parameter and the amplitude parameter; thus - although not shown - the control parameter and the amplitude parameter are interpolated alternately and the interpolation result register 92 is used jointly for both parameters. The amplitude parameter interpolated in the unit 14 is fed to the amplitude information register 34 in the signal generator unit 15, while the control parameter just interpolated in the manner just mentioned is fed to the filter unit 16 as information for setting the filter coefficient of the circuit. The parameter update time, i.e. the frame period, is selected so as to be at 10-20 ms, and the interpolation period is selected so as to extend between one and two sampling intervals.

The interpolation method is not limited to linear interpolation but can also consist of other types of interpolation. The essential thing is that even variations are obtained in the interpolation parameters; the synthesizing filter unit 16 is provided with a loop for feeding back the output signal via interconnected filter circuits 41 and 42. The interpolated control parameter is supplied to these circuits 41 and 42 via an input terminal and terminal 44. the outputs of circuits 41 and 42 are added to an adder 43, the output of which is in turn added to the input of the filter unit 16 in an adder 45. The output of this adder is fed back to the filter circuits 41 and 42 and is simultaneously supplied to an output terminal. 55.

For each of the filter circuits 41 and 42, a circuit having a number of zeros on the unit circle is used in the complex "ut 'trwdnr' ~ ii ---« nu «~ fn ~ * n ~« ~ '"II f" "* _: The output signal from the multiplier 63 is added in an adder 71, and aosstso-s 4, _ * ° “planets Both filter circuits 41 and 42 may consist of a multi-stage cascade of the first and / or second degree filters. In the case that the filter circuits are designed as digital filters, one can use either a first-degree filter, for example the one shown in Fig. SA; consisting of a delay circuit 51 with a delay of a sampling period and an adder for adding the delayed output signal of the circuit 51 and a non-delayed input signal, of a quadratic filter such as that shown in Fig. SB, which consists of two delay circuit stages 51 and the adder 52 for adding the delayed output signal and the non-delayed input signal, or of a quadratic filter such as that in FIG. 3C shows, in which the adder 52 adds on the one hand the output signal from a multiplier 53 arranged to multiply the delayed output signal from a delay 4 V circuit 51 by -Zcos Gài, on the other hand the output signal from two delay circuits 51 and on the other hand the non-delayed the input signals. The filters shown in g. 3A, 3B and BC have the transfer functions 1ïZ, 1-ZZ resp. 1-Zcos as Z + Z2. with higher degrees. The number of such filters and their combination depends on the degree of analysis and is selected according to Fig. 4A or 4B depending on whether the degree of analysis is even or odd, in Fig. 4A the degree of analysis is 10, i.e. an even number, and the filter circuit 41 consists of a series connection of a first-degree filter 56 with transfer function- It is also possible to use filters 1-Z and second-degree filters 57-61, each with transfer function Z + Z2. The output signal at the output terminal 55 multiplication 1-Zcos is plotted by +1/2 in a multiplier 63 and fed to the series connection. The output of the last stage quadratic filter 61 and the output of the multiplier 63 are added to each other in an adder. 62, and the resulting output signal is fed to the adder 43. In the filter circuit 42, the output signal of the multiplier 63 is supplied, consisting of a first-degree filter 64 with transfer function. 1 + Z and quadratic filters 65-69, each with transfer function- 2; The output of this series connection and its output are fed to the adder 43. The multipliers 53 in the quadratic filters 57-61 are given the respective control parameters a1 = -2cosco1 to as = -Zcoscas. The multipliers 53 in the quadratic filters 65-69 are given the respective control parameters bï = -2cos'G1 to bs = -Zcos 95.

Fig. 4B shows the case where the degree of analysis is 11, i.e. a u. sooßßso-5 Ä 111 odd numbers. In the filter circuit 41, the first-degree filter 56 used in Fig. 4A is omitted and instead a second-degree filter 72 with the transfer function 1-Z2 is used. In the filter circuit 42 the first-degree filter 64 is omitted and instead a second-degree filter 73 is used which is given a parameter bó = -Zcos 96.

In the filter circuits 41 and 42, the control parameters ha and Qi represent anti-resonant frequencies, at which the output signals of the filter circuits 41 and 42 become 0.5. Thus, in the event that the anti-resonant frequencies of the filter circuits 41 and 42 are close to each other, the output signal of the adder 43 will become close to one, the gain of the feedback loop becoming close to one. As a result, a high resonance characteristic occurs at the output terminal 55. Here! uJ1 -tas and 91-95 anti-resonant frequencies are characteristic of speech spectral envelope information. These parameters and the spectral envelope characteristics are in such a relationship to each other as illustrated in Fig. 5, from which it appears that the resonant characteristics of the spectra can be expressed by the distance between adjacent parameters. These parameters have the following relation: 0 <91 <a) <62 1 <Gi <ag <0- (8f) The synthesis filter has the property that it is stable when the above conditions are met. Next follows a description of a special embodiment of the synthesizing filter unit 16. Corresponding to the term in parentheses in the denominator of the expression (7), the following identical equations are obtained from the expression (5): P / 2 VP (Z) - 1 = (1 - 2) _nl (1 - 2 wßwaß + 22) f 1 1 = '- P 2- á 1 2 = z {(& l + Z) + (aidel 4' z) jll (lv + ajz. + Z 2 _ 'V- ñáí (l + a¿Z + Z2)} (9) J: - »ip / 2-1 _ ir _' - Q (Z) _ 1 = z {(bl + z) + 2 (b ¿+ L + Z) H * (l + b¿Z + 22) V i = 1 a = l 1/2 I, r + ñ fl '(l + bjz + Z2)} (10) a = l _30.' construction identical to filters 57 and 65, but the coefficients in isoss5o + sl _W2 bi = -Zcos 91) V (11) ') O <4wí, Qi <W »A digital filter is formed which has a transfer function with only poles and which approximates the spectral envelope given by the expression (1), the relations given in the expressions (7), (9) and (10) being used. Fig. 6 shows the case where P = 4. In Fig. 6 the same reference numerals are used as in Fig. SB to Fig. 4 for corresponding details. The input signal from the core 54 is added by the adder 45 to the output signal from the adder 43, and it is thereby obtained. the output signal is fed to the output terminal '55 and is also multiplied in the multiplier 63 by + l / 2. The latter multiplication corresponds to the multiplication of the denominator in the expression (7). The output signal of the multiplier 63 is supplied to the delay circuit 74, the delay time of which amounts to a sampling period, i.e. the unit time. The delayed output signal is applied as an input to each of the two quadratic filters 57 and 65, where it is supplied to the delay circuits 51, the multipliers 53 and the adder 52. In the two multipliers 53 the respective inputs are multiplied by a1 and b1 and the the output signals formed are fed to a respective adder 94 for addition with the output signal from the delay circuit 51 of the respective filters 57, 65. The output signals from the two adder 94 are fed to a common adder 81 and at the same time also to one in the respective filters 57, 65 existing Adder 52 via delay means 95 with a delay corresponding to a sampling period; The output signals from the two adders 52 are applied in the form of output signals from the respective filters 57, 65 to the quadratic filters 58 and 66 in the next step. These filters 58 and 66 are theirs for the multipliers 53 are az and bz. The output signal from each filter's adder 94 is fed to an adder 82 for addition to the output of the adder 81. The output signals from the adders 52 in the two filters 58 and 66 are fed to the adder 43 for subtraction from each other. The adder 43 is also supplied with the output signal from the adder 82. A g The delay circuit 74 corresponds to Z outside the staples in the output A; the pressures (9) and (10), and the filters 57 and 58 each form a second-degree filter with the transfer function 1 + Z (a. + Z). Correspondingly, the filters 65 and 66 each form a quadratic filter with w IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII. _ '. _ * I (11 soossso-sh 1 ^ the transfer function 1 + Z (bj + 6); Consequently, _ L 'realizes the series connection of the quadratic filters-57 and 58 the third term É in parentheses in the expression (9).' The delay circuit 51, multiplic- E term: So an * acimefafem 94 ii í íaí fi taet 5.6 feazliísše fi zef (ai fl v 233% with "S this circuit and the quadratic filter 57 is thus realized the second term within brackets i_expression (9), and the output signal is fed via the adder 82 to the adder ring 43 51, the multiplier 53 and the adder 94 in the quadratic filter 57 are realized (a1 + Z), and the output signal is fed to the adder 43 via the adders 81 and 82. In this way, the terms are enclosed in parentheses in the expression (9) by means of the quadratic filters 57; 58 and the adders 43, 81, 82, Correspondingly, the terms in parentheses in the expression (10) are realized by the quadratic filters 65, 66 and the adders 43, 81, 82. The expressions (9) and (10) are formally different from each other. - only in that the signs for the third term within kl ammer are different, and as a result the sign of the input signal to the adder 43 is different. The adder 43, the quadratic filters 57, 58, 65, 66, the multiplier 63 and the delay circuit 74 thus realize the expression (2), and what is shown in Fig. 6 the circuit arrangement realizes the expression (1) in its entirety. In this circuit arrangement, the expressions (9) and (10) are realized by the filter circuit 41 being formed by a series connection of P / 2 quadratic filters 57 and 58, and by the filter circuit 42 being formed by a series connection of P / Z quadratic filters 65 and 66 in the feedback loop, and by removing the nodes of the filter circuit 41 of the filter circuit 41, i.e. the sockets 96 A and 97, from the output sides of the adders 94 in order to give the total sums with the adders 81, 82 and 83. This arrangement for extracting the output signals from the sockets of the filter circuits will henceforth be said to be of the socket output type. In Fig. 6, the quadratic filters are arranged so that the value of j increases in the direction of the adder 43, but they could also be arranged so that the value of 'j decreases towards the adder. An example of the latter is shown in Fig. 7, where the output of the delay circuit 74 is fed to the quadratic filters 58 and 66, the outputs of which via the quadratic filters 57 and 65 are fed to the adder 43. Compared to Fig. 7, each quadratic filter has first and last steps changed places; Thus, the circuit 94 is arranged to add the outputs from the delay circuit 51 and the multiplier 53 has been replaced by the delay circuit 95. The output signal from the delay circuit 74 is fed via the outputs 96 and 97 to the quadratic filter. * - figures-assumed aoosasnis j e14 _rens 57 and 58 nodes. In other words, the circuit arrangement of Fig. 6 is of the socket output type while the circuit arrangement of Fig. 7 is of the socket input type. The circuit starting with terminal 96 and ending with adder 43 is the second term within the bracket in expression (9). The quadrant filters 65 and 66 of the circuit 41 are formed in a corresponding manner. In connection with the filter circuit 41, the output signal of the delay circuit 74 is multiplied by -1 in the multiplier 98 in order to realize the minus sign of the third term within the bracket in the expression (9). V When »p is odd, the following identical expression is obtained from the expression (8) corresponding to the term in parentheses in the denominator of the expression (7).) VV (-3) / 2 'ip (z) _ 1 = z {(a; + Z) + píšl (ai + l + Z) jëí (l + ajz + Z2) _ Z (píä) / 2 (l + aZ + Z2)} (12) a = 1 J s, (P -1) / 2, Q (z) _ 1 = Z {(bl + Z) + .Eg a \ bi + l + Z). 1: I i _ _ * 2 x _U (1 + bZ + Z)} '(13) - a = 1 J sa, = -2cos 1 b_ = -2cos 1 _m 0 Like what was the case when p was odd is realized from the relations in the expressions (7), (12) and (13) two types of avg) digital filters called socket output and socket input type in accordance with what is illustrated in Figs. 8 and 9. In these two p be SQ In fig. 8 and 9 correspond to the first-degree filter 72 (Z in the third term in parentheses in the expression (13), and the second-degree filter 73 shall be given such properties that the products of the transfer functions of the filters 65 and 66 (1 + b1Z + Z) ~ and (1 ftbzz + zzy is multiplied by fbs + z). ”fi gçw 2S 040 SÜÜGSSÛ-É From Figs. 6-9 it is clear that the multiplier 63 multiplied by +1/2 and the delay circuit 74 can also be located elsewhere in the feedback loop Since the second-degree filters are of the same type, it is possible to simplify the circuit ("hardware") by performing the circuit arrangement so that a multi-plex basis is used. applicator S3, adders S2 and 94 and delay circuits 51 and 95 for realizing a quadratic filter. Fig. 10 illustrates the case where the filter shown in Fig. 12 as an example is arranged to operate according to the time division division method. In this example, p = 10 applies and a parameter group originating from the interpolation circuit is completed within a time period corresponding to 176 clock pulses. In Fig. 10, the same reference numerals are used as in Figs. 12 for corresponding parts. The input side of a 16-bit static shift register 74, which performs the function of the delay circuit 74, is switched by means of a switch S1 between its own output and the output of the adder 45.

A multiplier input of the multiplier S3 and an input of the adder S2 are switched by means of a switch S2 between the output of the shift register 74, the output of the step (27-d) in this shift register (calculated from the input of the register) and the output of a 31 bit shift registers 101. The designation d represents the operating delay of the multiplier S3. This multiplier has its one output connected to the output terminal S5 and the input side of the adder 94 and at its second output emits the multiplier signal delayed by 22 clock pulses, which is fed to a shift register S1 of 1S4 + d bits. The output of an adder 81 is fed back to its input via a gate 102 and a 16-bit shift register 103 which performs a cumulative addition corresponding to the adders 81 and 82 in Fig. 10. The gate 102 is open only in the time interval between d + 2 and 145+ d. One input of the adder 43 is switched by means of a V switch S3 between the outputs of the adders 52 and 81, while the second input of the adder 43 is switched by means of a switch S4 between the outputs of the 16th and (d + 1) steps of the shift register 101. The input_ of the shift register 101 is switched by means of a switch S5 between the outputs of the adders 43 and 52. Each of the switches S1-S5 occupies during each working period - ie during each period of 176 clock pulses - the positions indicated by numbers at the respective contact elements. The shift registers S1, 95, 101 and 103 are dynamic and have 154 + d, 175-d, 31 and 16 bits, respectively. They are constantly supplied with clock pulses. ---- «~. 4 «- =« - i _.- = e ~ »- ..« -, «-_ ~., .., .- f. _ .. _ .. 4 .., i ... W _ ._. i., -_ _ 40 V in the register 103, Fig. 11H refers to the adder's S2 from the shift register -accumulation, ie the adder's 81 output signal is fed to that of the adde one of the adders 43, 45, 52, 81 and 94 indicates the time control of the operating ranges of each parameter; for example, do indicates a repetition every 16 clock pulses. The work delay of each of the adders is selected so that it becomes a clock pulse. Fig. 11 is a timing chart for the operation of each part of Fig. 10. Fig. 11A shows the timing of the clock pulses; Pig; 11B refers to the input of the integer poles fl the coefficients ai, bi and the interpolated amplitude A to the multiplier 53 from the input terminal 44. Fig. 11C relates to the multiplier of the multiplier 53. Fig. 11D refers to one input signal of the adder 94 coming from the multiplier 53 and Fig. 11E the second input signal of the adder 94. Fig. 11F refers to the output signal of the adder 94. Fig. 11G refers to the output signal of the adder 81 and thus the input signal of the 95 coming, and Fig. 11I refers to the output signal of this adder 52.

Fig. 12 shows these input and output signals in the form of signals appearing at the respective parts in the event that the quadratic filters are cascaded.

As can be seen from Fig. 11, in the time period between the clock pulses 0 and 16, a multiplication of the coefficient a1 (t) and a multiplier end z1 (t) takes place in the multiplier 53 in order to carry out the multiplication in the quadratic filter S7 in Fig. 12, whereby the f the result of the plication is available from the dte clock pulse. In the time between the clock pulses 16 and 32, as shown in fig. 11B and 11C a multiplication of a coefficient b1 (t) and a multiplier y1 (t) for performing the multiplication in the quadratic filter 65. The multiplier x1 (t) is delayed in the shift register 51 by (176 + d) clock pulses together with 22 bits of the multiplier 53 so that - as shown in Fig. 11E - a multiplier end x1 (t-1) is applied to the adder 94 from the 4th clock pulse and is added with the output signal a1x1 coming from the multiplier S3 at this time. The output signal x1 '(t) formed by the addition is fed via the adder 81 to the shift register 103 through the switches 81, 82,. consisting of the signal system in Fig. 12. The output signal of the adder 94 is also fed as shown in Figs. 11H - É to the (175-d) -bit shift register 95. Between the clock pulses 0 and 16 the output signal of this shift register is thus x1 '(t-1 ), and this output signal is added to the multiplier (x1 (t) in the adder S2, whose output signal x2 (t) is applied as an input signal on the quadratic filter p 58 in Fig. 12. The output signal x2 (t) of the adder 52 is fed via shift register ~ 40 1v _ 'aoosàso As shown in Fig. 11C, between the clock pulses 32 and 48 a multiplication takes place in the multiplier S3 of the output signal x2 (t) and the coefficient a2 (t). Before this multiplication is multiplied as previously described by and y1 (t) and the obtained output signal are treated in a similar manner, whereby the output signal y2 (t) of the fandragad filter 65 is obtained during the time between the clock pulses 48 and 64. In this way, multiplication and multiplication x and multiplication and multiplication y are performed every sixteen hours. of coefficients either a of the coefficient 'b pulse, and the results obtained are applied to the shift register 51, which is indicated by a1x1, bíy1,' a2x2, bzyà, _ in Fig. 11D. «From this, in addition, the quadratic filters 57, S8, 59, 60 and 61 derive the respective quantities X1 '(t), xzf fl t), x3' (t), x4 * (t), x5 * (t) and k2 (t), x3 (t), x4 (t), x5 (t), x6 (t ), which are applied to the shift registers 95 and 101. Similarly, y1 '(t) - y5' (t) and y2 (t) - y6 (t) are obtained from the respective quadratic filters 65-69, and these outputs are fed alternately_with xY (t) resp. x (t) to the shift registers 95 and 101; In the time period between the clock pulses 145 and 161 the output signal yö - obtained from the adder 52 during this time - and the signal X6 previously obtained in the shift register are subtracted from each other in the adder 43§ The obtained result: X6-yó is fed via the switch S5 to the shift register 101, i vil ket it is delayed (d + 1) clock pulse periods. The delayed output signal is taken out via the switch S4 for supply to the adder 43 in the time period between the clock pulses 147 + d- and 163 + d. The output signal obtained during this time from the shift register 103 is supplied to the adder 43 via the adder 81 and the switch S3. The output signal from the adder 43 at this time becomes the output signal from the adder¿ 43.1 Fig. 12, and this output signal is fed to the adder 45, where it is added with the input signal at the terminal 54 to give Z (t): This signal Z (t) is fed to the register 74, in which it is delayed by the delay circuit 74 in Fig. 12. The delayed output signal is applied to the multiplier 53 and at this time the coefficient A is obtained as an amplitude interpolation output signal at the terminal 44, and AZ (t) is obtained from the multiplier 53 at output terminal 55.

This multiplication is performed in the case that the output of the synthesis filter unit 16 is multiplied by the amplitude information A in a multiplier 104 in Fig. 12. From the shift register 74 an output signal Zßt) / 2 is taken which is shifted a bit, and this output is fed via the current switch S2 to the multiplier 56. such as Zit-1) / 2, f-: _20 40 '.i ie-k (t) and y fi tl in the next arhetš period for a new parameter group. The output signal at the output terminal 55 can also be obtained as parallel output signals by means of an output buffer 105 of a static shift register. The time division method described above can also be applied to other types of synthesizing filter units 16. As can be seen from "Fig. 10", the filtration process can be achieved by addition, multiplication and delay, so that this process can also be carried out using a microcomputer, see for example Fig. 13.

By successively locking, interpreting and executing programs in a program memory 107, a CPU unit 106 provides charge from an input port 111 of an audio source signal and control parameters which are supplied from the audio source signal generator unit 15 and the interpolation unit 14, respectively, to terminals 108 and 109. The processor 106 performs in accordance with the operations described above with reference to Fig. 11. A read and write memory 112 is used instead of the registers 51, 74, 95, 101, 103 and 105 in Fig. 10. The results of the operations are written in the read and write memory 112. and is read from there at appropriate times for the execution of the operations. The output signal thus obtained is supplied from an output port 113 to the output terminal S5. The processor 106, the memories 107 and 112 and the ports 111 and 113 are connected to a bus line 114. The output signal from the synthesizing filter unit 16 is obtained by any of the methods described above. This output signal is converted by the digital / analog converter unit 17 (fig. _2) to an analog signal to provide a voice output signal. If the input signal to the D / A converter unit 17 is in serial form, it is fed to a shift register 115, after which the contents of this register are converted into analog form by a D / A converter 116., A. As previously described, the LS? Parameters nä and Gi of the numerical parameters used in the present invention can be obtained by solving the expressions (5) and (6). I .fig. 14A and 14B show the result of analyzing the sound ÛbakuoNgafÛUsing the LSP parameters on and Gi. In Figs. 14A and 14B the time is plotted along the abscissa, while the ordinate in Fig. 14A represents power and in Fig. 14B the angular frequency normalized; By observing instantaneous values in Fig. 14B ', it is seen that the frequency increases with the parameter order G1, ä fi, 02, aë, r .. 95, a% _and that this order does not change as well as that the parameters Gi and dä do not coincide with each other within a frame . '10 .20 40, 1 ° j 1s0068sb ~ 5' There is thus a guarantee that the filter circuit 16 is always stable. The frequency distribution Qi of the LSP parameters is shown in Fig. 15, where the abscissa represents the normalized angular frequency f and the ordinate the relative frequency D. As shown in Figs. Each of the parameters is not distributed over a wide frequency band but limited to a relatively narrow frequency band, so that the LSP parameters then and Gi can be quantized in connection with the frequency range over which they are distributed.

The LSP parameters Adâ and Qi are small with respect to quantization distortion. Pig. 16 shows the spectral distortion DS of synthesized speech when different parameters were quantized varying, the abscissa representing the number of quantization bits B per frame and the ordinate spectral distortion DS. Line 117 shows the case where with respect to the parameter distribution alone, the PARCOR coefficient is quantized linearly only for the coefficient that was distributed.

Line 118 shows the case where the number of quantization bits for the 1 PARCOR coefficient was increased with respect to the spectral sensitivity in addition to the parameter distribution in the case shown by line 117; especially in the case of significant impact on the spectrum. Line 119 shows the case where the LSP parameters then and Qi were quantized only taking into account the parameter distribution. Line 121 shows the case where the LSP parameters nä and Qi were quantized taking into account both the parameter distribution and the spectral sensitivity. Fig. 16 shows that when using the same number of quantization bits, the spectral distortion becomes smaller according to the following order of the lines: 117, 118, 119, 121; Since lines 119 and 121 are so close to each other, the LSP parameters jaa and Gi are not so much affected with respect to spectral distortion even if no account is taken of the spectral sensitivity. Thus, since it is sufficient to carry out the quantization taking into account only the parameter distribution, the quantization is easily feasible. If the number of quantization bits per frame at the spectral distortion is divided by 1 dB - for line 119 by the corresponding value of the number of bits for line 117, 0.7 is obtained as a result. Correspondingly, it is obtained that the ratio between the number of quantization bits per frame at the spectral distortion 1 dB is 0.8 for lines 118 and 121. From this it can be seen that the LSP parameters nä and Qi are excellent. A difference of 1 dB is the limit for the perceptible difference in the spectral distortion in synthesized speech.

Fig. 17 shows interpolation characteristics, the abscissa .20 40A '+20 àoosesoss' representing the frame length Tf and the ordinate spectral distortion DS. This figure refers to the case where a frame is used as a reference, within which the original number was analyzed during 10 ms, and with the frame length increased to 20-70 ms and parameter interpolation companies every 10 ms. Line 122 refers to the use of PARCOR coefficients and line 123 to the use of the LSP parameters aà and Gi. As can be seen from this figure, at the same distortion, the frame length can be made larger at LSP parameters than at PARCOR coefficients, ie the parameter update period can be extended with a corresponding reduction of the total amount of information. After-V which in addition - as shown in Fig. 16 - the LSP parameters are less than the PARCOR coefficients with respect to the number of bits per frame, at the same distortion the amount of information can be edited with the product of the reduction ratios in Fig. 16 and _ 17, ie when using LSP parameters, the amount of information can amount to 60% of the amount of information occurring when using PARCOR coefficients.b V _ When using the LSP parameters, it is - as is the case with other parameters - meaningless that they are interpolated with a shorter period time than the sampling period for the original number used in the preparation of the parameters. Experiments showed that the interpolation period can be about twice the original sampling period or less, while the synthesized number became indistinct due to noise if the interpolation period was increased to about four times the sampling period; Consequently, it is preferable that the interpolation period is equal to or twice the sampling period of the original number. _ _. .

As described above, it is relatively easy to extract the LSP parameters automatically, and this can be done on a real-time basis. Furthermore, the LSP parameters are excellent in their interpolation properties, although they have small deviations in their quantization characteristics and allow numbers to be transmitted and stored with a small amount of information. In speech synthesis, high-quality speech can be reconstructed and synthesized with a small amount of information, and as long as the expression (8) applies, the stability of the synthesis filter is guaranteed.

In the plant according to Fig. 2, it is possible to widen the spectrum by causing the pulse generator unit 28 instead of the pulse train to generate a sequence of pulse trains, for example Barker series .gm ii; i., i «1 'U-ÅÉ. f? <1 'Vi ï.ïï ”ï'h',. V.-rße ~ JO» ZO 4Ü 121 I SÛÛSSÉÜ-S The interpolation unit 14 can also be arranged as a step located before the transformation unit 13, i.e. LSP parameter hubs from the interface 12. may also undergo cosine transformation in the unit 13 after being interpolated; In this case, it is uneconomical to use a read-only memory, as its capacity would need to be enormous. Accordingly, it is preferable that the parameter conversion be performed using a cosine approximation instead of using the read only memory in the manner described in connection with Fig. 2. In the system shown in Fig. 2, input and loading of information is indicated. whether the speech consists of a toning or toneless sound in registers 23 and 24, but such information does not always have to be present.

Namely, a detector circuit may be arranged to detect whether or not the fundamental tone input to the pitch register 25 is zero; in the former case, the sound is considered to be toneless, whereby the gate 37 is opened, while the sound at other detected values than zero is considered to be tonal, which means that the gate 31 is opened. Control of the amplitude parameter can also take place in connection with the output signal from the filter unit 16 as previously described in connection with Fig. 12. "May A" In the foregoing, a filter has been used as synthesizing filter which in its feedback loop comprises means for series - connection of a number of first- and second-degree filters with different coefficients, each with the zero point on the unit circle, and the use of the LSP parameters. However, the synthesis filter does not always have to be limited to just one filter of this kind, and the speech synthesizer can also take place by transforming the LSP parameters into some other parameter types and using other filters. An example is shown in Fig. 18, where the same reference numerals as in Figs. 1 is used for corresponding units. In this case, the fundamental tone parameter is fed to the characteristic parameters supplied to the interface 12 to the sound source signal generator unit 15, while the amplitude parameter is fed to the interpolation unit 14. The thus interpolated amplitude parameter is fed to the generator unit 15, in which it is processed in connection with FIG. 2 and thus provides an audio source signal to the synthesizing filter unit 16.

The LSP parameters are fed to the MILSP parameter transformation format 124, in which they are converted to other parameter types, for example a üfparameter, .PARCOR parameters or the like. For example ,- _4; -.------ _. .....-._- .., ._....., _., ._., _ ,, ____ _, w__ __ ___. , __> ___ '_ ___g____g______4____p___l _ "man in the output signal of the adder 126 is applied to the output terminal 55. It is added sequentially and added to each other in the adder 127. 22," 68006850-6 is kept from the LSP parameters polynomials P (Z) Z) using the expression (5) or (6), ooh from these polynomials the prediction coefficients H1 of the transfer function uï are obtained using the expression (1) and (2) @ By the required interpolation of the The prediction coefficients ggí obtained in the interpolation unit 14 are set by the characteristics of the filter unit 16. This filter unit 16 can for instance be designed as a cyclic filter, in which - as shown in Fig. 18 - the sound source signal Gßfaldígas coming from the generator unit 15 is multiplied by a multiplier. 125 after which it is fed to an adder 126 for subtraction with the output signal of an adder 127. This signal obtained at the terminal 55 is fed to a series connection consisting of a number of delays. gcircles D1 -VDp each having a delay of one sampling period. The output signals of the delay circuits are multiplied by multipliers M1 - Mp with respective coefficients M1 - ¿Xp obtained from the interpolation unit 14. The output signals formed by the multiplications

Claims (27)

J! »E 1 nya aossso-s _ Patentkravl 1 An audio synthesizer comprising a signal source (15) for generating an audio source signal, a control parameter source (11, 12, 13, 14) which provides control parameters for controlling the characteristics of a filter, an all-pole synthesis filger (16) which, under the control of the control parameters, a synthesized audio signal and includes an adder (45), and a feedback unit (41,42,43) coupled to the output (16) of the synthesizing filter, characterized in that the control parameter source (11,12,13,14 ) is arranged to provide control parameters ai and bi (i = 1, 2, c3¿ ..), which are expressed by ai = Zcoswi and bi = -Zcos fi í, where wí and Bi are LSP parameters, which have the relationship 0 <61 <m1 62 <wz <63 - that one input of the adding means (45) is arranged to receive the sound source signal, that the feedback unit (41, 42, 43) comprises a first and a second feedback means (41, 42), the input of each feedback means is fed with the output of synthesizing the filter (16) and wherein the output of each feedback means provides supply to a second input of the adding means (45), whereby a first and a second feedback loop are provided, and the first and second feedback means comprise first cascaded second row filter means (57,58). ), expressed by (1 + _aiZ + ZZ), and other cascade driven petition filter means (65,66), expressed by (1 + biZ + Zz), where Z represents unit time delay and organ, means. A sound synthesizer according to claim 1, wherein the source (15) of the sound source signal comprises a fundamental tone sound source (25, 27) controlled by a fundamental tone parameter to generate a zero or a pulse group with the period specified by the parameter, a noise source (23) for generating random pulses and selecting means (31,37) for selecting the output signal from the fundamental tone sound source (25, Z7) or the output signal from the noise source (23) depending on whether the sound to be synthesized is toned or toneless. A sound synthesizer according to claim 1 or 2, characterized in that it further comprises amplitude control means (34) for controlling the amplitude of a signal at the input or output side of the synthesis filter (16) with a sensing sensor. - amplitude parameter. soossso-5 24 A sound synthesizer according to claim 1, characterized in that said control parameter source (11,12,13,14) comprises parameter generating means (11) for generating said LSP parameters mi and Bi and parameter transforming means (13) for providing said control parameters ai and bi by cosine transform of said LSP parameters mi and Bi. 5. A sound synthesizer according to claim 1, characterized in that the control parameter source (11,12,13,14) comprises interpolation means (14) for interpolating said control parameters ai and bi and for feeding them to said synthesis filter. ' An audio sensor according to claim 1,2,4 or 5, characterized in that said first and said second quadratic filter means (57,58,65,66) comprise first delay means (95) for delaying the input signal to the second degree filter means with a time unit, second delay means (51) for delaying the output signal from said first delay means (95) with a time unit, multiplying means (53) for multiplying the output signal from said first delay means (95) and a corresponding parameter of said control parameters. (ai, bi), and first adding means (94) * for adding the multiplied output signal, the output signal from said second delay means (51) and the input signal to said first delay means (95) for accessing * the output signal from the quadratic filter means (57,58, 65.66). A sound synthesizer according to claim 1, 2, 4 or 5, characterized in that each of said first and second quadratic filter means (57,58,65,66) comprises first delay means (S1) for delaying the input signal to second degree filter means (57,58,65,66) having a unit of time, multiplying means (S3) for multiplying the input signal to said first delay means (51) and a corresponding parameter of said control parameters (ai, bi) first 'adding means (94) for adding the multiplied output signal and the output signal from said first delay means (S1), second delay means (95) for delaying the added output signal from said sta highest adder tube (94) by a unit of time, gamt a second adder means (52) for adding output the signal from said second delay means (95) and the input signal to said first delay means (51) for providing a Seoesso-5 25 1 1 | IInIIIIIIIIIIIIIIIIIIIIIIglnnnnnnllllllllllllllll to the output signal from second the filter means (57, S8,65,66) f 8. An audio synthesizer according to claim 7, characterized in that the quadratic filter means (57,58,65,66) comprises a digital quadratic filter circuit (51J $ 2,53,94,95), which is used multiplexed by is made to operate a number of times within a unit of time, its filter coefficient changing for each working time. _ 1 ' 9. An audio synthesizer according to claim 6, characterized in that the quadratic filter means (57,58,6S, 66) comprise a digital quadratic filter circuit (51,53,94,95), which is used multiplexed by it is caused to operate a number of times within a unit of time, changing its filter coefficient for each working occasion. 10. An audio synthesizer according to claim 1, characterized in that the function of said all-pole synthesizing filter (16) is materialized by interpreting and executing a program using a computer. hrs The sound synthesizer according to claim 4, characterized in that said control parameter source (11,12,13,14) further comprises interpolating means (14) for interpolating said LSP parameters w1 and Gi from parameter generating means and feeding the interpolated_LSP parameters mi and Gi to said parameter transform means (13) for cosine _. _. , _E _'__ transformation thereof. A sound synthesizer according to claim 5 or 11, characterized in that the interpolation period in said interpolation means (14) is equal to or twice the time unit period of said time unit delay means (7) - An audio synthesizer according to claim 3, characterized in that the control parameter source (11, 12, 13, 14) further comprises interpolating means (14) for interpolating said control parameters ai and bi and for feeding them to said synthesizing filter. (16), wherein said interpolation means (14) is used multiplexed for interpolations of both said etyr parameters ai, bi and said amplitude parameters. A š 14. An audio synthesizer, characterized in that it comprises: ~ _ '- § a signal source (15) for generating an audio source signal; an LSP parameter source (11) for generating LSP parameters (mi) and (61) expressed in respective angular frequencies, \ soossso-s in M which causes the polynomials P (Z) and Q (Z) square roots to assume the value zero , where the polynomial is defined by the following expression: ~ _ P (z> _ P + 1 -l Ap (Z) Z Ap (z) UQ (Z) H Ap + zP * Open1zfÉ) = ~ ._ '2 - - _ Open (z) l T Gl? + Qzz +. . . + uäzp where (aï) are prediction coefficients, determined for each predetermined number of sound wave signal samples; parameter transforming means (124) for transforming the LSP parameters into control parameters of a type other than the LSP parameters; and 6, a sound synthesizing filter (16) having a transfer function V "H (Z) = 0 / Ap (Z), said sound synthesizing filter F (16) being fed with the sound source signal from said signal source (15), while its properties are controlled by the transformed control parameters .. I 1 A sound synthesizer according to claim 14, characterized in that the signal source (15) is composed of a fundamental tone sound source (25,27), which is controlled by a fundamental tone parameter to generate a pulse or a pulse group having the the specified period, a noise source (23) for generating random pulses and selector means (31,3l) for selectively extracting the output signal from the fundamental tone sound source (25,27) or the output signal from the noise source (23), depending on whether the sound , to be synthesized, is toned or toneless. The sound synthesizer according to claim 14 or 1S, characterized in that it further comprises amplitude control means (34) for controlling the strength of a signal V at the input or output side of the sound synthesizing filter (16) with an amplitude output parameter. . A Jewish synthesizer according to claim 14 or 15, characterized in that said parameter transforming means (124) constitutes means for transforming said LSP parameters w-, 6 into prediction coefficients ai and that said light synthesizing filter (16) comprises: first adding means (126), the input of which is supplied with said sound source signal; a cascade coupling of a plurality of time unit delay means (D1 ... Dp), said input of said cascade coupling being connected to said first adding means (125) -out-; a plurality of multiplying means (a1 ... ap), each arranged to multiply the output signal of a means of said time unit delay means (D1 ... Dp) and the corresponding V coefficient of said prediction coefficients di; and second adding means (127) for summing all the output signals from said multiplying means (a1 ... ap) and feeding the sum to another input of said first adding means (126). A method for synthesizing sound, wherein sound source signal parameters taken from an original sound signal are used to generate a sound source signal for activating an A synthesizing filter means, which has a transfer function H (Z), which is defined by_ - oi _ o V MZ) 'APKZ) __ I wherein the characteristics of the synthesis filter organ are controlled by control parameters for obtaining a synthesized sound signal from the synthesizing filter means, said control parameters being achieved by obtaining autocorrelation coefficients from samples of the original sound signal and calculating prediction coefficients (2), ... of the function, Ap (Z) from said autocorrelation coefficients, characterized by the following steps: calculating property parameters (mi) and (Bi), which make the polynomials P (Z) and Q (Z) zero, the polynomial P (Z) and Q (Z) is defined by I AP (2) = -à- (P (Z) + Q (Z)} _. + -1 imzz = Ap (z> - zpglapm> VQ (2) = Ap (Z ) + ZP + 1Ap (Z_1) A to transform own the control parameters (mi) and (Gi) to control parameters (ai = -Zcoswi and bi = -Zcosei to control the characteristics of the synthesizer file means; wherein ~ Z = e_jw, G is a constant, w is a normalized angular frequency 2fl fAT and p is the degree of analysis, and wherein the synthesizing filter means comprises two respective feedback paths i: yes-f 3) 8G 19685 f '5 111 ~ ¿28 with transfer functions P (Z) - 1 and Q (Z) - 1, including V cascade driven quadratic filter means, represented by 1 1 (1 + eíz '+ 22) respectively. (1 + biz + zz). A sound synthesizer according to claim 3, characterized in that said control pair source source (11,12,13,14) comprises parameter generating means (11) for generating said LSP parameters w- and Gi, interpolating means (14) for 1 interpolating said LSP parameters w- and Gi from said parameter generating means (11) and parameter transforming means (13) for receiving the interpolated LSP parameters mi and 61, wherein said control parameters ai and b of interpolated parameters are provided by performing the cosine transformation of said interpolated parameters mi and Gi- and ', said interpolated control parameters ai and b1 being fed to said synthesizing filter (16) for controlling the same. A sound input device according to claim 1, z4 or 5.1, characterized in that each of said first and second feedback means (41,42) comprises a plurality of cascaded quadratic filters (57,58,65,66), wherein each such quadratic filter comprises first delay means (95) for delaying the input signal to the quadratic filter (s1, ss, es, 66) by a ten unit, performing edderinše means (S2), which is supplied with the delayed output signal from said first delay means and the output signal from the synthesizing means (16) for obtaining a sum thereof, second delay means (S1) for delaying the output signal sum from said first adding means (52) by a unit of time, multiplying means (53) for multiplying the output of said first adding means (52) and a corresponding parameter of said control parameters (ai, bi) and second adding means (94) for adding the multiplied output signal from said 'multiplying means (53), the signal from said second pre-delay means (51) and the input signal to the quadratic filter (S7,58Q6S, 66) for providing the output signal from the second-degree filter (57,58,65,66), and that said first feedback means (41) further comprises a multiplier (98) 'at its input side and in series therewith for multiplying -1 at the input of said first feedback means (41) and that said first and second feedback loops include loop delay means (74) connected in series e _, wv a. aaooßasoas i thereby to delay the input signal to the loop delay means (74) by a unit of time ;. 20. I _ The sound synthesizer according to claim 20, characterized in that said first feedback means C41) further comprises a first first degree filter (72), which is connected at the input side of said first feedback means (41) and in series therewith; said second feedback means (42) further comprising a second first degree filter (73) at the input side thereof, said second first degree filter comprising a second delay circuit (51) for delaying the input signal to said second feedback means (42) by a time unit, a second multiplier ( 53) for multiplying the input signal to said second feedback means (42) and a corresponding parameter of said control parameters (ai, bi), and an adding circuit (94) for adding the delayed output signals from said second delay circuit (51) and the multiplied the output of said second multiplier (531) to provide the output of the second first degree filter (73). A sound synthesizer according to claim 1,2,4 or S, characterized in that said first and second feedback means (41,42) comprise a plurality of cascade-coupled quadratic filters (57, S8, 65,66), each together - set by a first delay means (51) for delaying the input signal to the quadratic filter (S7, S8,65,66) by one unit of time, multiplying means (53) for multiplying the input signal to the quadratic filter (57,58,6S, 66 ) and a corresponding parameter of said control parameters- (ai, bi) first adding means (94) for adding the multiplied output signal and the delayed output signal from said first delay means (S1), second delay means (95) for - delaying the added output signal from said first adding means (94) by a unit of time, second adding means (S2) for adding the output signal from said second delay means (95) and the input signal to the quadratic filter (57, S8,65,66) for thereby producing the output signal from duck and the feedback means (41,42,43) comprises means for summing said added output signals from said first adding means (94) and the output signal of each of said first and second feedback means (H) (41.4Z), said first and second feedback loops including loop delay rogue (74) connected in series therewith for delaying the input signal to the loop delay means with a unit of time. 23. A V 23; A sound synthesizer according to claim 22, characterized in that said first feedback means (41) further comprises a first first degree filter (72), connected at the output side of said first feedback means (41) and in series therewith, said second feedback means (42 further comprising a second first-degree filter (73) at the output side thereof (said second first-degree filter (73) comprising a second delay circuit (S1) for delaying the input signal thereto by a time unit, a second multiplier '(53) for multiplying the input signal to said second delay circuit "(51) and a corresponding parameter of said control parameters, and an adding circuit (94) for adding the delayed output signal from said second delay circuit (51) and the multiplied output signal from said second multiplier ( 53) to provide the output of said second first-degree filter (73). 24. A sound synthesizer according to claim 6, characterized in that said first feedback means (41) further comprises a multiplier (98) at the input side thereof and in series therewith for multiplying -1 at the input of said first feedback means ( 41), said first and second feedback loops including loop delay means (74), connected in series therewith for delaying the input signal to said loop delay means (74) by a unit of time, and wherein each of said first and second second degree filter means (57,58,65,66) comprises outlet input adding means (S2), connected between the output side of said first delay means (95) and the input side of both said second delay means (S1) and the multiplying means (53) for adding the input signal to both said multiplier »(98) and said second feedback means (42) and the output signal from said first delay means (95) and for supplying the added output signal f from said input input adding means (S2) to both the input side of said second delay means (51) and said multiplying means (53) - 25. A sound synthesizer according to claim 24, characterized in that said first feedback means C415 contains. .. ', \ ï »I - _: - ciàoàsase-s 3ï_ comprises a first first degree filter (72) in series with said multiplier (98) for delaying the input signal to said first feedback means (41) by one unit of time and that said second. feedback means (42) in series therewith and at its input side comprises a second first degree filter (73), expressed by (Z + bi) and composed of delay means (51) for delaying the input signal to said second feedback means (42) with a unit of time, multiplying means (53) for multiplying the input signal to said second feedback means (42) and a corresponding parameter of said control parameters b1 and an adding means (94) for adding the V outputs from said multiplying means (S3) and said delay means ( 51) for supplying the added output signal to said second cascade driven quadratic filter means (6S, 66). The sound synthesizer according to claim 7, characterized in that said first and second feedback loops comprise loop delay means (74) connected in series therewith for delaying the input signal to said loop delay means (74) by a unit of time and that each of said first and second quadratic filter means (57,58,65,66) comprises output output adding means (81,82,43) for summing the outputs from said first adding means (94) of said first and second second degree filter means (57), respectively. , S8,65,66) and for additively feeding the sum to said feedback adding means (45). - A sound synthesizer according to claim 26, wherein said first feedback means (41) comprises a first first degree filter (72) at the output side of said first feedback means (41) in series therewith for delaying the output signal from said first cascade driven second degree filter means (57, S8) having a unit of time and said second feedback means (42) in series therewith at the output side being characterized by a second first degree filter (73), expressed by (Z + bi) and composed of delay means for delaying the output signal from said second cascade driven quadratic filter means (65,66) with a unit of time, multiplying means (S3) A for multiplying the output signal from said second cascade driven quadratic filter means (65,66) and a corresponding parameter of said control parameters bi and adding means ( §4) for adding the output signals from said delay coming from an output signal as an output signal from said other "8006850nf-5 V 32 Organ (S1) and said mu Replacing means (53) for providing feedback means (42). I ES