SE386308B - Integrerad planar-halvledarkrets - Google Patents

Integrerad planar-halvledarkrets

Info

Publication number
SE386308B
SE386308B SE7312846A SE7312846A SE386308B SE 386308 B SE386308 B SE 386308B SE 7312846 A SE7312846 A SE 7312846A SE 7312846 A SE7312846 A SE 7312846A SE 386308 B SE386308 B SE 386308B
Authority
SE
Sweden
Prior art keywords
planner
integrated
semiconductor circuit
semiconductor
circuit
Prior art date
Application number
SE7312846A
Other languages
English (en)
Other versions
SE7312846L (sv
Inventor
H C Clahoun
L E Freed
C L Kaufman
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US298729A external-priority patent/US3877051A/en
Application filed by Ibm filed Critical Ibm
Publication of SE7312846L publication Critical patent/SE7312846L/xx
Publication of SE386308B publication Critical patent/SE386308B/sv

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
SE7312846A 1972-10-18 1973-09-20 Integrerad planar-halvledarkrets SE386308B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US298729A US3877051A (en) 1972-10-18 1972-10-18 Multilayer insulation integrated circuit structure

Publications (2)

Publication Number Publication Date
SE7312846L SE7312846L (sv) 1974-04-19
SE386308B true SE386308B (sv) 1976-08-02

Family

ID=23151792

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7312846A SE386308B (sv) 1972-10-18 1973-09-20 Integrerad planar-halvledarkrets

Country Status (5)

Country Link
JP (1) JPS5428073B2 (sv)
DD (1) DD109476A5 (sv)
ES (1) ES418485A1 (sv)
IT (1) IT1001545B (sv)
SE (1) SE386308B (sv)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519857A (en) * 1978-07-28 1980-02-12 Nec Corp Semiconductor

Also Published As

Publication number Publication date
DD109476A5 (sv) 1974-11-05
ES418485A1 (es) 1976-04-16
JPS4975065A (sv) 1974-07-19
SE7312846L (sv) 1974-04-19
JPS5428073B2 (sv) 1979-09-13
IT1001545B (it) 1976-04-30

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