SE329645B - - Google Patents

Abstract

1,175,946. Automatic exchange systems. SIEMENS A.G. 19 Aug., 1968 [22 Aug., 1967], No. 39557/68. Heading H4K. Subscribers' lines are scanned for loop condition by an address register U which cycles over the lines to gate them to a supervisory bus YM over gates TS, the current loop condition together with a record of a preceding scan from synchronously driven " last-look " store L being sent with the address of the line being scanned to a processor V if a change of loop condition occurs and if the processor is available. If the processor V is not available, the last-look store L is not updated and a fresh application for the services of the processor is made at the next scan. A number of groups of subscribers TG1 to TGn have separate scanning arrangements and are gated to the common processor V by an address register CG. The address from CG on bus GLR and the address from U on bus UL gives a scanned line's identity to the processor. Gates G1 and G2 detect the start of an impulse and the end of an impulse, either event operating a gate T1 to a processor buffer store Z provided the processor is free. On transfer of the subscriber identity and the change of state signal to Z, gates G6 and G7, governing erase and write functions, update last-look store L. The subscriber's identity in Z is compared with identities of subscribers currently being processed and present in circulating store AS of the processor. The comparison is effected in Vgl and if a match occurs the data in Z is transferred to the processing equipment in the time slot so identified. If no match occurs the circumstances indicate a call origination and a free time slot is allocated the subscriber and his identity is placed accordingly in AS to route further transactions to the slot. The processor comprises a store Jp which records an impulse present mark, a counter ZU which requires a small initial count of impulse present condition before the impulse is judged present in face of contact bounce mutilating the signal, a counter ZL for measuring pulse length, a counter ZJ for accumulating the dialled impulses, and a counter H for signalling inter-digital pauses. Scanning for loop conditions may be effected simultaneously in more than one group with service from a single processor. More than one processor may be provided. Scanning may be halted temporarily if a processor is not free and a change of loop condition is found, scanning being resumed when a processor is free for service. The exchange provides T.D.M. connections over group highways MS gated to subscribers by stores U and gates ZS.