RU99111593A - SEMICONDUCTOR DEVICE - Google Patents

SEMICONDUCTOR DEVICE

Info

Publication number
RU99111593A
RU99111593A RU99111593/28A RU99111593A RU99111593A RU 99111593 A RU99111593 A RU 99111593A RU 99111593/28 A RU99111593/28 A RU 99111593/28A RU 99111593 A RU99111593 A RU 99111593A RU 99111593 A RU99111593 A RU 99111593A
Authority
RU
Russia
Prior art keywords
resin
insulating substrate
semiconductor device
edge
outer edge
Prior art date
Application number
RU99111593/28A
Other languages
Russian (ru)
Other versions
RU2165115C2 (en
Inventor
Тадао КУШИМА
Акира Танака
Рюичи САИТО
Казухиро СУЗУКИ
ршихико КОИКЕ
Хидео ШИМИЗУ
Original Assignee
Хитачи,Лтд
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP14689698A external-priority patent/JP3440824B2/en
Priority claimed from JP11011465A external-priority patent/JP2000216332A/en
Application filed by Хитачи,Лтд filed Critical Хитачи,Лтд
Publication of RU99111593A publication Critical patent/RU99111593A/en
Application granted granted Critical
Publication of RU2165115C2 publication Critical patent/RU2165115C2/en

Links

Claims (11)

1. Полупроводниковое устройство, содержащее несущую плату, по крайней мере одну установленную на этой несущей плате изоляционную подложку по крайней мере с одним расположенным на ее верхней поверхности проводящим элементом, обратная сторона которой обращена к несущей плате, корпус, внутри которого расположена изоляционная подложка, полупроводниковые элементы и/или приборы, расположенные внутри корпуса, и первую смолу, которой заполнен этот корпус, при этом область, расположенная между краем проводящего элемента и внешним краем изоляционной подложки, покрыта слоем второй смолы, внешний край которой расположен между краем проводящего элемента и внешним краем изоляционной подложки.1. A semiconductor device comprising a carrier board, at least one insulating substrate mounted on this carrier board with at least one conductive element located on its upper surface, the reverse side of which is facing the carrier board, the housing within which the insulation substrate is located, semiconductor elements and / or devices located inside the housing, and the first resin with which this housing is filled, while the area located between the edge of the conductive element and the outer edge of the insulation constant of the substrate is coated with a layer of second resin, the outer edge of which is located between the edge of the conductive member and the outer edge of the insulating substrate. 2. Полупроводниковое устройство по п.1, в котором край проводящего элемента покрыт второй смолой. 2. The semiconductor device according to claim 1, in which the edge of the conductive element is coated with a second resin. 3. Полупроводниковое устройство по п.1, в котором напряжение, которое выдерживает вторая смола, больше напряжения, которое выдерживает первая смола. 3. The semiconductor device according to claim 1, wherein the voltage that the second resin can withstand is greater than the voltage that the first resin can withstand. 4. Полупроводниковое устройство по п.1, в котором напряжение, которое выдерживает вторая смола, больше напряжения, которое выдерживает проводящий элемент, а расстояние между краем проводящего элемента и внешним краем изоляционной подложки больше толщины изоляционной подложки. 4. The semiconductor device according to claim 1, in which the voltage that the second resin can withstand is greater than the voltage that the conductive element can withstand, and the distance between the edge of the conductive element and the outer edge of the insulating substrate is greater than the thickness of the insulating substrate. 5. Полупроводниковое устройство по п.1, в котором вся область, расположенная между краем проводящего элемента и внешним краем изоляционной подложки покрыта слоем второй смолы. 5. The semiconductor device according to claim 1, in which the entire region located between the edge of the conductive element and the outer edge of the insulating substrate is coated with a layer of the second resin. 6. Полупроводниковое устройство по п.1, в котором в качестве первой смолы используется гелевая изоляция, а корпус имеет крышку, между которой и поверхностью гелевой изоляции имеется свободное пространство. 6. The semiconductor device according to claim 1, in which gel insulation is used as the first resin, and the housing has a lid, between which and the surface of gel insulation there is free space. 7. Полупроводниковое устройство по п.1, в котором внешний край изоляционной подложки частично покрыт слоем второй смолы, которая нанесена на него в нескольких местах, в том числе как минимум в его углах. 7. The semiconductor device according to claim 1, in which the outer edge of the insulating substrate is partially coated with a layer of the second resin, which is applied to it in several places, including at least in its corners. 8. Полупроводниковое устройство по п.1, в котором имеется изоляционная прокладка, приклеенная к слою второй смолы. 8. The semiconductor device according to claim 1, in which there is an insulating strip glued to the second resin layer. 9. Полупроводниковое устройство по п.1, в котором к поверхности изоляционной подложки между краем расположенного на ней приводящего элемента и ее внешним краем приклеен лист из смолы, а область между краем проводящего элемента и внешним краем изоляционной подложки, включая расположенный в этой области лист из смолы, покрыта слоем второй смолы. 9. The semiconductor device according to claim 1, in which a sheet of resin is glued to the surface of the insulating substrate between the edge of the driving element located on it and its outer edge, and the region between the edge of the conductive element and the outer edge of the insulating substrate, including a sheet of resin coated with a layer of second resin. 10. Полупроводниковое устройство, содержащее полупроводниковые интегральные схемы, по крайней мере одну изоляционную подложку по крайней мере с одной расположенной на ней пластиной с электродами, на которой смонтированы интегральные схемы, несущую плату, на которой установлена изоляционная подложка, корпус, который соединен с внешним краем несущей подложки, гелевую изоляцию, которой изнутри заполнен корпус, первую изоляционную смолу, слой которой нанесен на поверхность изоляционной подложки между ее внешним краем и пластиной с электродами, и вторую изоляционную смолу, слой которой нанесен на поверхность несущей платы между корпусом и внешним краем изоляционной подложки. 10. A semiconductor device containing semiconductor integrated circuits, at least one insulating substrate with at least one plate with electrodes located on it, on which integrated circuits are mounted, a base plate on which the insulating substrate is mounted, a housing that is connected to the outer edge carrier substrate, gel insulation, which is filled inside the housing, the first insulating resin, a layer of which is deposited on the surface of the insulating substrate between its outer edge and the plate with electro s, and a second insulating resin layer which is coated on the surface of the base plate between the housing and the outer edge of the insulating substrate. 11. Силовое полупроводниковое устройство, включающее заполненный гелевой изоляцией корпус из изоляционной смолы, внутри которого расположена несущая плата, на которой установлена по крайней мере одна изоляционная подложка по крайней мере с одной расположенной на ней пластиной с электродами, при этом граничная область между поверхностью изоляционной подложки и краем пластины с электродами на участке между внешним краем изоляционной подложки и краем пластины с электродами покрыта слоем неорганического стекла. 11. Power semiconductor device, comprising a gel-insulated body of insulating resin, inside of which there is a base plate on which at least one insulating substrate is installed with at least one plate with electrodes located on it, and the boundary region between the surface of the insulating substrate and the edge of the plate with electrodes in the area between the outer edge of the insulating substrate and the edge of the plate with electrodes is covered with a layer of inorganic glass.
RU99111593/28A 1998-05-28 1999-05-27 Semiconductor device RU2165115C2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP10-146896 1998-05-28
JP14689698A JP3440824B2 (en) 1998-05-28 1998-05-28 Semiconductor device
JP11011465A JP2000216332A (en) 1999-01-20 1999-01-20 Semiconductor device
JP11-011465 1999-01-20

Publications (2)

Publication Number Publication Date
RU99111593A true RU99111593A (en) 2001-03-27
RU2165115C2 RU2165115C2 (en) 2001-04-10

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
RU99111593/28A RU2165115C2 (en) 1998-05-28 1999-05-27 Semiconductor device

Country Status (3)

Country Link
EP (1) EP0962974B1 (en)
DE (1) DE69923374T2 (en)
RU (1) RU2165115C2 (en)

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WO2005096374A1 (en) * 2004-03-15 2005-10-13 Siemens Aktiengesellschaft Electronic product comprising an electrical component and a cast mass for electrical insulation of the component and method for production of the product
DE102007041229A1 (en) * 2007-08-31 2009-03-05 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Circuit arrangement and a method for encapsulating the same
EP2302676A1 (en) * 2009-09-29 2011-03-30 ABB Technology AG High power semiconductor device
US9271397B2 (en) 2010-09-24 2016-02-23 Semiconductor Components Industries, Llc Circuit device
KR101591643B1 (en) 2012-02-22 2016-02-05 미쓰비시덴키 가부시키가이샤 Semiconductor device and method of manufacturing semiconductor device
JP5987719B2 (en) 2013-02-13 2016-09-07 三菱電機株式会社 Semiconductor device
CN103594505A (en) * 2013-11-21 2014-02-19 西安永电电气有限责任公司 High-voltage IGBT module capable of weakening partial discharge and manufacturing method thereof
CN105304619A (en) * 2014-05-28 2016-02-03 株洲南车时代电气股份有限公司 IGBT lining board structure and preparation method thereof
DE102014110455B4 (en) * 2014-07-24 2016-06-09 Infineon Technologies Ag Method for producing an electronic module with potting compound
WO2016044179A2 (en) * 2014-09-15 2016-03-24 Invensas Corporation Electronic structures strengthened by porous and non-porous layers, and methods of fabrication
JP6719569B2 (en) 2016-09-21 2020-07-08 三菱電機株式会社 Semiconductor device and power converter
CN110914975B (en) * 2017-07-12 2023-08-01 日立能源瑞士股份公司 Power semiconductor module
EP3518278A1 (en) 2018-01-30 2019-07-31 Infineon Technologies AG Power semiconductor module and method for producing the same
DE112018007278T5 (en) 2018-03-14 2020-11-26 Mitsubishi Electric Corporation SEMI-CONDUCTOR POWER MODULE AND POWER CONVERTER
FR3084964A1 (en) * 2018-08-09 2020-02-14 Universite Toulouse Iii - Paul Sabatier ELECTRONIC DEVICE HAVING MULTILAYER ELECTRICAL INSULATION, AND MANUFACTURING METHOD THEREOF.

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DE3309679A1 (en) * 1983-03-17 1984-09-20 Siemens AG, 1000 Berlin und 8000 München Semiconductor component with casting-resin filling
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