RU93050065A - PACKAGE SWITCH, PORT MEMORY, ARCHITECTURE FOR PACKET SWITCHING - Google Patents

PACKAGE SWITCH, PORT MEMORY, ARCHITECTURE FOR PACKET SWITCHING

Info

Publication number
RU93050065A
RU93050065A RU93050065/09A RU93050065A RU93050065A RU 93050065 A RU93050065 A RU 93050065A RU 93050065/09 A RU93050065/09 A RU 93050065/09A RU 93050065 A RU93050065 A RU 93050065A RU 93050065 A RU93050065 A RU 93050065A
Authority
RU
Russia
Prior art keywords
queue
network
architecture
packet switching
port memory
Prior art date
Application number
RU93050065/09A
Other languages
Russian (ru)
Other versions
RU2115254C1 (en
Inventor
Бианчини Рональд (младший)
С.Ким Йонг
Original Assignee
Карнеги Меллон Юниверсити
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/777,737 external-priority patent/US5287346A/en
Application filed by Карнеги Меллон Юниверсити filed Critical Карнеги Меллон Юниверсити
Publication of RU93050065A publication Critical patent/RU93050065A/en
Application granted granted Critical
Publication of RU2115254C1 publication Critical patent/RU2115254C1/en

Links

Claims (1)

Пакетный коммутатор включает общую очередь совместно используемой памяти, имеющей М адресов хранения, по которым хранятся соответствующие адреса, где М≥3. Коммутатор содержит также сеть представления данных, имеющую N входных портов для приема пакетов и доставки их по требуемым адресам в очередь, где N ≥ 3. Очередь связана с сетью предоставления данных для приема пакетов. Коммутатор включает также распределительную сеть, имеющую J входных портов, где J ≥ 1, для приема пакетов из очереди и поставки их к требуемым выходным портам. Распределительная сеть связана с очередью. Также имеется средство для упорядочения пакетов, принимаемых сетью представления данных таким образом, что пакеты, последовательно принимаемые сетью представления данных, поставляются по соответствующим адресам в очередь.A packet switch includes a shared shared memory queue with M storage addresses that store the corresponding addresses, where M≥3. The switch also contains a network of data representation, which has N input ports for receiving packets and delivering them to the required addresses in the queue, where N ≥ 3. The queue is connected to the data network for receiving packets. The switch also includes a distribution network with J input ports, where J ≥ 1, for receiving packets from the queue and delivering them to the required output ports. Distribution network associated with the queue. There is also a means for streamlining the packets received by the presentation network in such a way that packets sequentially received by the presentation network are delivered to the corresponding addresses in the queue.
RU93050065A 1991-10-16 1992-10-14 PACKET-TYPE SWITCH, PORT No STORAGE AND PACK SWITCHING SYSTEM (VARIANTS) RU2115254C1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US07/777,737 US5287346A (en) 1991-10-16 1991-10-16 Packet switch
US07/777737 1991-10-16
US07/777,737 1991-10-16
PCT/US1992/008763 WO1993008658A1 (en) 1991-10-16 1992-10-14 Packet switch

Publications (2)

Publication Number Publication Date
RU93050065A true RU93050065A (en) 1996-02-27
RU2115254C1 RU2115254C1 (en) 1998-07-10

Family

ID=25111108

Family Applications (1)

Application Number Title Priority Date Filing Date
RU93050065A RU2115254C1 (en) 1991-10-16 1992-10-14 PACKET-TYPE SWITCH, PORT No STORAGE AND PACK SWITCHING SYSTEM (VARIANTS)

Country Status (12)

Country Link
US (2) US5287346A (en)
EP (1) EP0562090A1 (en)
JP (1) JP2927550B2 (en)
KR (1) KR970000792B1 (en)
AU (1) AU649892B2 (en)
CA (1) CA2098496C (en)
MX (1) MX9205906A (en)
PL (1) PL299673A1 (en)
RU (1) RU2115254C1 (en)
SK (1) SK62193A3 (en)
TW (1) TW273655B (en)
WO (1) WO1993008658A1 (en)

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