RU59837U1 - DEVICE FOR DETERMINING NEUTRAL VOLTAGE AND ZERO POINT POSITIONS - Google Patents

Abstract

The utility model relates to the field of information processing systems and can be used to determine the neutral voltage and the position of the zero point from the arrays of samples of instantaneous values of phase voltages. Allows you to measure the angle of divergence of vectors F between voltage U _A and between voltage U _AO1 , the effective value of neutral voltage U _N , the angle of divergence of vectors D between voltage U _N and voltage U _AO1 , as well as the angle of divergence of vectors E between voltage U _A and voltage U _N . A device for determining the determination of the neutral voltage and the position of the zero point from the arrays of samples of instantaneous values of phase voltages, contains two sampling-storage devices, and a third sampling-storage device, an inverter, an adder, a multiplier, an integrator, a first multiplier are connected in series to a first sampling-storage device -divider; the fourth sampling-storage device, a second adder, the output of which is connected to the second input of the first multiplier, is connected in series to the second sampling-storage device, in addition, the second input of the first adder, the input of the converter of effective values, is connected to the output of the first adder, and the output a second sampling and storage device is connected to the second input of the second adder, the second input of the converter of actual values; a second multiplier connected to a third adder, a second inverter, a third multiplier, a fourth adder, a second multiplier divider, the output of the second multiplier divider is connected to a computer, and also to the input of the third and fourth multiplier divisors , in addition, to the first output of the current converter

the values connected to the first and second inputs of the fourth multiplier, the output of which is connected with the fifth adder, also the second input of the third multiplier divider is connected to the first output of the converter of the effective values; the first and second inputs of the fifth multiplier connected to the second input of the fifth adder connected to the second input of the fourth adder are connected to the second input of the fifth adder, the second output of the effective values converter is connected to the second input of the second multiplier and to the second input of the fourth multiplier divider; the inputs of the first and second sampling-storage devices are connected to the sixth multiplier, the output of the sixth multiplier is connected to the second integrator, the output of which is connected to the fifth multiplier-divider connected to the second input of the third multiplier; a clock is connected to each sample-storage device, in addition, the output of the second multiplier is connected to the second input of the third adder, the second inputs of the first and fifth multipliers-dividers; the output of the first divider multiplier is connected to a computer, to the third inputs of the third and fourth divider multipliers, which are in turn connected to a computer; a device for determining the determination of the neutral voltage and the position of the zero point also includes resistors connected to a star, the inputs of which are connected to the input of the device; the second input of the differential amplifier is connected to the neutral of the star of the resistors, the output of which is connected to the input of the second sampling-storage device, the second input of the differential amplifier is connected to the input of the device. 3 ill.

Description

The utility model relates to the field of information processing systems and can be used to determine the neutral voltage and the position of the zero point from the arrays of samples of instantaneous values of phase voltages.

There are currently no devices for determining the neutral voltage and zero point.

The objective of the utility model is to create a device for determining the voltage and position of the zero point.

The specified technical result is achieved by the fact that in the device for determining the neutral voltage and the zero point, according to the utility model, a third sample-storage device, an inverter, an adder, a multiplier, an integrator, a first multiplier divider are connected in series to the first sampling-storage device. A fourth sample-storage device, a second adder, the output of which is connected to the second input of the first multiplier, is connected in series to the second sampling-storage device. In addition, the second input of the first adder and the input of the current value converter are connected to the output of the first sampling and storage device, and the second input of the second adder and the second input of the current value converter are connected to the output of the second sampling and storage device. At the same time, a second multiplier is connected to the first output of the converter of effective values, to which a third adder, a second inverter, a third multiplier, a fourth adder, and a second multiplier divider are connected in series, the output of which is connected to a computer and to the inputs of the third and fourth multiplier divisors. In addition, the first and

the second inputs of the fourth multiplier, the output of which is connected with the fifth adder. In this case, the second input of the third multiplier divider is connected to the first output of the converter of effective values, and the first and second inputs of the fifth multiplier are connected to the second output of the converter of effective values, the output of which is connected to the second input of the fifth adder connected to the second input of the fourth adder, the second output the converter of effective values is connected with the second input of the second multiplier and with the second input of the fourth multiplier divider. In addition, the inputs of the first and second sampling-storage devices are connected to the sixth multiplier, the output of the sixth multiplier is connected to the second integrator, the output of which is connected to the fifth multiplier-divider connected to the second input of the third multiplier. A clock is connected to each sample-storage device. Moreover, the output of the second multiplier is connected with the second input of the third adder, the second inputs of the first and fifth multipliers-dividers; the output of the first divider multiplier is connected to the computer and to the third inputs of the third and fourth divider multipliers, which are connected to the computer. The second input of the differential amplifier is connected to the neutral of the star of the resistors, the output of which is connected to the input of the second sampling-storage device, and the inputs of the device connected to the end of the power line are the resistors connected to the star and the input of the differential amplifier.

Using the proposed device, you can determine the neutral voltage and the position of the zero point from the arrays of samples of instantaneous values of phase voltages (figure 2):

1) the angle of divergence of the vectors F between the voltage U _A and between the voltage U _AO1 ;

2) the effective value of the neutral voltage U _N ;

3) the angle of divergence of the vectors D between voltage U _N and voltage U _AO1 ;

4) the angle of divergence of the vectors E between voltage U _A and voltage U _N.

Figure 1 presents the switching circuit of the device for determining the neutral voltage and the position of the zero point from the arrays of samples of instantaneous values of phase voltages in the power transmission line and to the system (computer).

Figure 2 shows a vector diagram of linear and phase voltages.

Figure 3 shows the hardware circuit of the calculation unit D, E, F, U _N.

A device for determining the neutral voltage and the position of the zero point (figure 1) consists of one calculation unit, the inputs of which are connected to the end of the power line, and the outputs of the calculation unit are connected to a computer.

The calculation unit D, E, F, U _N (figure 3) contains two sampling-storage devices. A third sample-storage device 3 (UVX 3), an inverter 4, an adder 5, a multiplier 6, an integrator 7, a first multiplier-divider 8. are connected to the first sampling-storage device 1 (UVX 1) to the second sampling-storage device 2 ( UVX 2) a fourth sampling-storage device 9 (UVX 4) is connected in series, a second adder 10, the output of which is connected to the second input of the first multiplier 6. In addition, the second input of the first adder is connected to the output of the first sampling and storage device 1 (UVX 1) 5, input converter action of effective values 11 (PDZ), and the second input of the second adder 10, the second input of the converter of effective values 11 (PDZ) are connected to the output of the second sampling and storage device 2 (UVX 2). The second multiplier 12 is connected to the first output of the converter of effective values 11 (PDZ),

to which the third adder 13, the second inverter 14, the third multiplier 15, the fourth adder 16, the second multiplier divider are connected in series 17. The output of the second multiplier divider 17 is connected to a computer, as well as to the input of the third 18 and fourth 19 multiplier divisors. In addition, the first and second inputs of the fourth multiplier 20, the output of which is connected to the fifth adder 21, are connected to the first output of the converter of effective values 11 (PDZ). Also, the second input of the third multiplier divider 18 is connected to the first output of the converter of effective values 11 (PDZ). The first and second inputs of the fifth multiplier 22, the output of which is connected to the second input of the fifth adder 21 connected to the second input of the fourth adder 16. W, are connected to the second output of the converter of actual values 11 (PDZ) The second output of the current value converter 11 (PDZ) is connected to the second input of the second multiplier 12 and to the second input of the fourth multiplier divider 19. The inputs of the first 1 (UVX 1) and second (UVX 2) sampling and storage devices are connected to the sixth multiplier 23. Output the sixth multiplier 23 is connected to the second integrator 24, the output of which is connected to the fifth multiplier-divider 25 connected to the second input of the third multiplier 15. A clock generator 26 (TG) is connected to each sampling and storage device. In addition, the output of the second multiplier 12 is connected to the second input of the third adder 13, the second inputs of the first 8 and fifth 25 multipliers-dividers. The output of the first multiplier divider 8 is connected to a computer, to the third inputs of the third 18 and fourth 19 multiplier divider, connected in turn to the computer. The calculation unit D, E, F, U _N (Fig. 3) also includes resistors connected to a star, the inputs of which are connected to the input of the device. The neutral input of the resistor star is connected to the second input of the differential amplifier 27 (DU), the output of which is connected to the input of the second sampling-storage device 2 (UVX 2). The second input of the differential amplifier 27 (remote control) is connected to the input of the device.

All sampling and storage devices are implemented on 1100SK2 microcircuits. As resistors, high-resistance resistances (for example, 3 MΩ or more) can be used. Programmer of effective values 11 (PDZ) is made on a microcontroller of a series 51 of the manufacturer atmel AT89S53. Differential amplifier 27 (DU), inverters, adders and integrators are implemented on operational amplifiers 140UD17A. As multipliers and multipliers-dividers can be used chip 525PS3. The clock generator 26 (TG) can be implemented on the AT80C2051 microcontroller.

The device operates as follows. The inputs of the calculation unit D, E, F, U _{N of the} device that implements the method of determining the neutral voltage and the position of the zero point from the arrays of samples of instantaneous values of phase voltages, simultaneously send the following signals:

one) - phase A symmetrical load mode,

2) - unbalanced load phase B,

3) - mode of asymmetric load phase C,

The calculation unit D, E, F, U _N receives the signal u _AO1 (t _j ) at the input of the first sampling-storage device 1 (UVX 1), the signals are sent to the corresponding resistors:

one) - to the phase A resistor,

2) - to the phase B resistor,

3) - to the phase C resistor,

the first input of a differential amplifier (DU) signal U _AO1 (t _j ),

where t _j = t ₁ , t ₂ , ..., t _N - time instants,

- the number of partitions on the period T,

Δt = 1 · 10 ^-3 s is the discretization step of arrays of instantaneous values of currents and voltages at the beginning and at the end of power lines.

The total signal of the three phases from the neutral of the star of the resistors is fed to the second input of the differential amplifier 27 (remote control). Using a differential amplifier 27 (remote control) summarizes the signal of phase A and the total signal of three phases from the neutral star of the resistors. The output of the differential amplifier 27 (remote control) receive the symmetric component of the phase signal A u _A (t _j ). The values of the signals are fed to the corresponding inputs of the sixth multiplier 23 and recorded in the blocks of sample-storage 1 (UVX 1), 2 (UVX 2) and stored there as current. From the output of the sampling-storage device 1 (UVX 1), the signal u _AO1 (t _j ) goes to the second input of the adder 5, to the first input of the programmer of effective values 11 (PDZ) and to the sampling-storage device 3 (UVX 3), in which previous value. At the same time, from the output of the sampling-storage device 2 (UVX 2), the signal value u _A (t _j ) is fed to the second input of the second adder 10, to the second input of the programmer of effective values 11 (PDZ) and to the sampling-storage device 9 ( UVX 4), in which it becomes the previous value. The outputs of the programmer of effective values 11 (PDZ) receive the actual values of the signals

u _AO1 (t _j ) and u _A (t _j )

From the output of the sample-storage device 3 (SEC 3), the previous value of the signal u _AO1 (t _j ) is supplied to the inverter 4, in which the negative value of the previous signal u _AO1 (t _j ) is converted to positive. From the output of the inverter 4, the value of the signal u _AO1 (t _j ) is input to the adder 5. Using the adder 5, the difference between the current and previous values of the signal u _AO1 (t _j ) is determined. From the output of the adder 5, the difference between the current and previous values of the signal u _AO1 (t _j ) is fed to the input of the multiplier 6. At the same time, from the output of the sampling-storage device 9 (UVX 4), the previous value of the signal u _A (t _j ) goes to the first the input of the second adder 10. Using the second adder 10, the difference between the current and previous values of the signal u _A (t _j ) is determined. From the output of the second adder 10, the difference between the current and previous signal values u _A (t _j ) is supplied to the second input of the multiplier 6. Using the multiplier 6, the values of the difference and the sum of the signals are multiplied and fed to the input of the first integrator 7. Using the first integrator 7, the products of the difference and sums of signals and determine the value of reactive quasi-power

From the output of the first integrator 7, the value of reactive quasi-power is fed to the input of the first multiplier divider 8. Simultaneously with the process described above, in the sixth multiplier 23, the signals u _AO1 (t _j ) and u _A (t _j ) are multiplied and fed to the input of the second integrator 24. Using the second integrator 24 summarize the products of the signals and determine the value of the active quasi-power

From the output of the second integrator 24, the active quasi-power value is fed to the input of the fifth multiplier divider 25. At the same time, from the first output of the programmer of effective values 11 (PDZ), the effective value of the signal U _{AO1 is} fed to the first input of the second multiplier 12, to the first and second inputs of the fourth multiplier 20, to the second input of the third multiplier divider 18. From the second output of the programmer of effective values 11 (PDZ), the actual value of the signal U _A goes to the second input of the second multiplier 12, to the first and second inputs of the multiplier 22, to the second input of the fourth multiplier divider 19. The values of the signals U _AO1 and U _{A are} multiplied by the fourth 20 and fifth 22 multipliers and fed to the first and second inputs of the fifth adder 21, in which the products of the signals U _AO1 and U _A are summed . From the output of the fifth adder 21, the sum of the products of the signals U _AO1 and U _A goes to the second input of the fourth adder 16. Simultaneously with the process described above, in the second multiplier 12, the signals U _AO1 and U _{A are} multiplied and fed to the second input of the fifth multiplier divider 25, by a second input of multiplier-divider 8, the first and second inputs of the third adder 13. By means of the fifth multiplier-divider 25 determines the cosine of the divergence angle between vectors F and the voltage U _A between the voltage U _AO1, which is then provided to a first input of the third ne emnozhitelya 15.

Using the first multiplier divider 8 determine the value of the sine of the angle of divergence of the vectors F between the voltage U _A and between

voltage U _AO1 (see figure 3), which is then fed to the first inputs of the third 18 and fourth 19 multiplier divisors.

At the same time, using the third adder 13, the sum of the products of the signals U _AO1 and U _{A is} determined. From the output of the third adder 13, the sum of the products of the signals U _AO1 and U _A enters the second inverter 14, with which a negative value of the sum of the products of the signals U _AO1 and U _{A is} converted to positive. From the output of the second inverter 14, the value of the sum of the products of the signals U _AO1 and U _{A is} fed to the second input of the third multiplier 15. Using the third multiplier 15, the signal values are multiplied and fed to the first input of the fourth adder 16, in which the products of the signals are summed. From the output of the fourth adder, the signal goes to the first input of the second multiplier divider 17. In this case, the third input of the second multiplier divider 17 has a negative feedback from its output. Using the second multiplier divider 17 determine the effective value of the neutral voltage

From the output of the second multiplier divider 17, the effective value of the neutral voltage is supplied to the third inputs of the third 18 and fourth 19 multiplier divider. Using the third multiplier divider 18 determine the value of the sine of the angle of divergence of the vectors D between voltage U _N and voltage U _AO1 (see figure 3)

Using the fourth multiplier divider 19 determine the value of the sine of the angle of divergence of the vectors E between voltage U _A and voltage U _N (see figure 3)

Thus, the utility model makes it possible to measure the sine of the angle of divergence of the vectors F between voltage U _A and between voltage U _AO1 ; the effective value of the neutral voltage U _N ; the sine of the angle of divergence of the vectors D between voltage U _N and voltage U _AO1 ; the angle of divergence of the vectors E between voltage U _A and voltage U _N.

Claims (1)

A device for determining the neutral voltage and the position of the zero point from the arrays of samples of instantaneous values of phase voltages, characterized in that the third sampling-storage device, an inverter, an adder, a multiplier, an integrator, a first multiplier divider are connected in series to the first sampling-storage device; the fourth sampling-storage device, a second adder, the output of which is connected to the second input of the first multiplier, are connected in series to the second sampling-storage device, in addition, the second input of the first adder and the input of the converter of effective values are connected to the output of the first sampling and storage device, and to the output the second device of the selection and storage is connected to the second input of the second adder and the second input of the converter of actual values, while the first output of the converter of valid a second multiplier is connected to which a third adder, a second inverter, a third multiplier, a fourth adder, a second divider multiplier are connected in series, the output of which is connected to a computer and to the inputs of the third and fourth divider multipliers, in addition, to the first output of the actual value converter the first and second inputs of the fourth multiplier are connected, the output of which is connected to the fifth adder, while the second input of the third nozhitelya-divider; and to the second output of the converter of actual values connected to the first and second inputs of the fifth multiplier, the output of which is connected to the second input of the fifth adder connected to the second input of the fourth adder, and the second output of the converter of real values is connected to the second input of the second multiplier and to the second input of the fourth multiplier - divider in addition, the inputs of the first and second sampling-storage devices are connected to the sixth multiplier, the output of the sixth multiplier is connected to the second integrator, the output of which is connected to the fifth multiplier-divider connected to the second input of the third multiplier; and a clock generator is connected to each sample-storage device, and the output of the second multiplier is connected to the second input of the third adder, the second inputs of the first and fifth multipliers-dividers; the output of the first divider multiplier is connected to the computer and to the third inputs of the third and fourth divider multipliers, which are connected to the computer; the second input of the differential amplifier is connected to the neutral of the star of the resistors, the output of which is connected to the input of the second sampling-storage device, and the inputs of the device connected to the end of the power line are the resistors connected to the star and the input of the differential amplifier.