RU49401U1 - MILLIMETER WAVES DUPLEX RECEIVER WITH INCREASED FAST SPEED - Google Patents

Abstract

The proposed utility model relates to the field of radio communications and can be used to organize digital radio-relay communication lines. Achievable technical result - increased performance. For this, a band-pass filter, a low-noise amplifier, a controlled attenuator, a peak detector, first, second and third DC generators, an algebraic adder, first, second and third keys, a test pulse recording unit, the first and second differentiating chains are introduced into the well-known duplex millimeter-wave transceiver , first and second oscillatory circuits, second and third threshold blocks, first and second delay blocks, test pulse generator and combiner.

Description

The proposed utility model relates to the field of radio communications and can be used to organize digital radio-relay communication lines.

Known transceivers used for radio relay communication, for example, the Radan-2 system (L. Mordukhovich, A. Stepanov, “Radio communication systems”, M., “Radio and communication”, 1987). However, these transceivers have high power consumption and large dimensions.

The closest in technical essence to the proposed device is the “Duplex millimeter wave transceiver” according to the certificate for utility model No. 24062 N 04 B 7/14 of 07/20/2002, the authors A. Zolotukhin, A. Trevalya, adopted as a prototype .

Figure 1 shows the functional diagram of the device of the prototype, where the following notation is introduced:

1 - input matching unit;

2 - input signal receiver;

3 - the first regenerator;

4 - transmitter synchronization unit;

5 - decoder three-level code;

6 - scrambler;

7 - encoder relative code;

8 - amplifier-driver;

9 - modulator;

10 - generator;

11 - circulator;

12 - antenna;

13 - mixer;

14 - local oscillator;

15 - high-pass filter;

16 - intermediate frequency amplifier;

17 - demodulator;

18 - video amplifier;

19 - threshold block;

20 - second regenerator;

21 is a receiver synchronization unit;

22 - relative code decoder;

23 - descrambler;

24 - encoder three-level code;

25 - output amplifier;

26 - output matching unit.

The prototype device contains a serially connected input matching unit 1, an input signal receiver 2, a first regenerator 3, a three-level code decoder 5, a scrambler 6, a relative code encoder 7, an amplifier-shaper 8, a modulator 9, the output of which is connected to the first input of the circulator 11, whose second input, which is also its second output, is connected to the antenna 12. The output of the input signal receiver 2 is connected to the input of the synchronization unit of the transmitter 4, the output of which is connected to the synchronization inputs of the first regenerator ator 3, a three-level decoder code 5, a scrambler 6, and a relative code encoder 7. The output of the generator 10 is connected to the second signal input of the modulator 9. In addition, it contains a series-connected mixer 13, a high-pass filter 15, an intermediate frequency amplifier 16, a demodulator 17, video amplifier 18, threshold block 19, second regenerator 20, relative code decoder 22, descrambler 23, three-level code encoder 24, output amplifier 25 and output matching unit 26, the output of which is the output of the device. In addition, the output of the threshold block 19 is connected to the input of the synchronization block of the receiver 21, the output of which

connected to the synchronization inputs of the second regenerator 20, the relative code decoder 22, the descrambler 23 and the three-level code encoder 24. The output of the local oscillator 14 is connected to the second heterodyne input of the mixer 13, the input of which is connected to the first output of the circulator 11. The input of the input matching unit 1 is the input of the device .

The prototype device operates as follows. From the input of the device, a digital signal through the input matching unit 1 is fed to the input of the receiver of the input signal 2, from the output of which the signal is fed to the inputs of the first regenerator 3 and the synchronization unit of the transmitter 4. The synchronization unit of the transmitter 4 extracts the clock signal and generates clock signals from it, necessary for the operation of the first regenerator 3, the three-level code decoder 5, the scrambler 6 and the relative code encoder 7. The regenerator 3 restores the shape and temporal positions of the code symbols. The decoder of three-level code 5 converts a digital signal transmitted in HDB-3 code with 0.5 filling into a two-level binary signal with filling 1. Next, the signal is scrambled in scrambler 6 and relative encoded in relative code 7 encoder in order to give it corresponding statistical characteristics necessary to isolate the clock synchronization signal in the synchronization unit of the receiver 21. The amplifier-driver 8 provides the level and shape of the signal supplied to the first, control input of the modulator 9. The modulator 9 modulates the signal supplied to its second signal input from the output of the generator 10. The modulated signal through the circulator 11 enters the antenna 12 and is broadcast.

The signal received from the ether from the output of the antenna 12 passes through the circulator 11 to the first signal input of the mixer 13. The circulator 11 provides separation of the transmitted and received signals. The mixer 13 with the help of a local oscillator 14 converts the received signal into an intermediate frequency signal. The high-pass filter 15 attenuates the signal,

generated by the interaction in the mixer 13 of the received signal and the signal from the generator 10, which enters the mixer 13 through the circulator 11. The intermediate frequency amplifier 16 provides signal amplification and frequency selectivity of the receiver. After the demodulator 17, the signal is fed to the input of the video amplifier 18, which provides the necessary signal amplification for the operation of the threshold block 19. The threshold block 19 provides a decision on the received symbol - “0” or “1”. From the output of the threshold unit 19, the signal is supplied to the inputs of the second regenerator 20 and the synchronization unit of the receiver 21. The synchronization unit of the receiver 21 extracts the clock signal and generates from it the clock signals necessary for the operation of the regenerator 20, the relative code decoder 22, the descrambler 23 and the encoder three-level code 24.

The second regenerator 20 restores the shape and temporary positions of the code symbols. The relative code decoder 22 and the descrambler 23 perform operations inverse to the operations of the relative code encoder 7 and the scrambler 6, respectively. A three-level code encoder 24 converts a binary two-level signal into a three-level code signal HDB-3. Further, the signal amplified by the output amplifier 25 enters through the output matching unit 26 to the output of the device.

The prototype device is not fast enough.

To eliminate this drawback in the duplex transceiver millimeter waves with high speed, containing a series-connected input matching unit, the input of which is the input of the device, and the receiver of the input signal; serially connected amplifier-driver, modulator and circulator; a serially connected mixer and a high-pass filter; an intermediate-frequency amplifier, a demodulator, a video amplifier and a first threshold unit connected in series; consistently

connected output amplifier and output matching unit, the output of which is the output of the device; first and second regenerators; a generator whose output is connected to a second signal input of the modulator; a local oscillator, the output of which is connected to the second heterodyne input of the mixer; the antenna connected to the second input-output of the circulator, according to a utility model, the first differentiating chain, the first key, the first oscillating circuit and the second threshold block, the output of which is connected to the first, signal input of the first regenerator, are connected in series; the second key and the first delay unit are connected in series, the output of which is connected to the second, clock input of the first regenerator, the output of which is connected to the input of the amplifier-former; series-connected low-noise amplifier and controlled attenuator, the output of which is connected to the input of the intermediate frequency amplifier; serially connected peak detector and algebraic adder; the second differentiating chain, the third key, the second oscillating circuit and the third threshold block, the output of which is connected to the first, signal input of the second regenerator, are connected in series; serially connected test pulse generator and combiner; first, second and third DC generators; a unit for recording test pulses, a second delay unit, the output of which is connected to the second, clock input of the second regenerator; a band-pass filter, the input of which is connected to the first output of the circulator, and the output to the first signal input of the mixer; wherein the output of the input signal receiver is connected to the input of the first differentiating chain, to the first, signal input of the second key and to the input of the test pulse registration unit, the output of which is connected to the second control input of the second key; the output of the first DC voltage generator is connected to the second control input of the first key; the output of the high-pass filter is connected to the input of a low-noise amplifier, the output of the second

the DC voltage generator is connected to the second input of the algebraic adder, the output of which is connected to the second, control input of the controlled attenuator, the output of the third DC generator is connected to the second, control input of the third key; the output of the first threshold unit is connected to the inputs of the second delay unit and the second differentiating circuit, the output of the second regenerator is connected to the first input of the combiner, the output of which is connected to the input of the output amplifier; in addition, the output of the video amplifier is connected to the input of the peak detector.

Figure 2 shows the functional diagram of the proposed duplex transceiver millimeter waves, where the following notation is introduced:

1 - input matching unit;

2 - input signal receiver;

3 - the first regenerator;

4 - block registration of test pulses;

5 - the first key;

6 - the first differentiating chain;

7 - the second key;

8 - amplifier-driver;

9 - modulator;

10 - generator;

11 - circulator;

12 - antenna;

13 - mixer;

14 - local oscillator;

15 - high-pass filter;

16 - intermediate frequency amplifier;

17 - demodulator;

18 - video amplification;

19 is a first threshold block;

20 - second regenerator;

21 is a first DC voltage generator;

22 - the first oscillatory circuit;

23 - second threshold block;

24 - the first block delay;

25 - output amplifier;

26 - output matching unit;

27 - band-pass filter;

28 - low noise amplifier;

29 - controlled attenuator;

30 - peak detector;

31 - algebraic adder;

32 is a second DC voltage generator;

33 - the second block delay;

34 - second differentiating chain;

35 - the third key;

36 - second oscillatory circuit;

37 - the third threshold block;

38 - third DC voltage generator;

39 - test pulse generator;

40 is a combiner.

The proposed device contains a serially connected input matching unit 1, the input of which is the input of the device, an input signal receiver 2, a first differentiating circuit 6, a first key 5, a first oscillating circuit 22, a second threshold unit 23, a first regenerator 3, an amplifier-shaper 8, a modulator 9, circulator 11, band-pass filter 27, mixer 13, high-pass filter 15, low-noise amplifier 28, controlled attenuator 29, intermediate-frequency amplifier 16, demodulator 17, video amplifier 18, first

threshold block 19, second differentiating chain 34, third key 35, second oscillating circuit 36, third threshold block 37, second regenerator 20, combiner 40, output amplifier 25 and output matching block 26. the output of which is the output of the device. In addition, it contains a series-connected second key 7 and a first delay unit 24, the output of which is connected to the second, clock input of the first regenerator 3; a unit for recording test pulses 4, the input of which is connected to the input of the first differentiating chain 6 and the first, signal input of the second key 7, and the output is connected to the second control input of the second key 7; a first DC voltage generator 21, the output of which is connected to a second control input of the first switch 5; a generator 10, the output of which is connected to the second, signal input of the modulator 9; an antenna 12 connected to the second input-output of the circulator 11; a local oscillator 14, the output of which is connected to the second, local oscillator input of the mixer 13; in series connected peak detector 30 and algebraic adder 31, the second input of which is connected to the output of the second constant voltage generator 32, and the output to the second, control input of the controlled attenuator 29, the input of the peak detector 30 connected to the output of the video amplifier 18; the second delay unit 33, the input of which is connected to the output of the first threshold block 19, and the output to the second, clock input of the second regenerator 20; a third DC voltage generator 38, the output of which is connected to the second control input of the third key 35; a test pulse generator 39, the output of which is connected to the second input of the combiner 40.

Duplex transceiver millimeter waves works as follows. From the input of the device, a digital signal through the input matching unit 1 and the receiver of the input signal 2 is fed to the inputs of the test pulses registration unit 4, the first differentiating circuit 6 and the first, signal input of the second key 7. Upon detection of test pulses arriving at the input matching unit 1 into

between the information packets, the test pulse recording unit 4 closes the second key 7, preventing the test pulses from passing further along the path, since there is no need to broadcast them. Upon receipt of 4 information packets at the input of the test pulse registration block, the second key 7 is open. The first differentiating chain 6 forms short pulses that coincide in time with the fronts of the information pulses. These short pulses open the first switch 5, through which the voltage from the constant voltage generator 21 is supplied to the first oscillating circuit 22, exciting free oscillations in it, which turn out to be phase-locked to the information pulses. From the output of the first oscillating circuit 22, a sinusoidal signal is fed to the input of the second threshold block 23, which generates rectangular clock pulses. The first regenerator 3 restores the shape and temporary position of the information pulses. Since free oscillations in the first oscillating circuit 22 occur almost simultaneously with the appearance of the first differentiation pulse 6 at the input of the first differentiating circuit 6, the clock pulses appearing at the output of the second threshold block 23 are suitable for restoring the first information pulse received at the input of the device in the first regenerator 3. This ensures the fastest possible passage of the information signal from the input of the device to the antenna, i.e. Provides increased performance. The first delay unit 24 is necessary for phasing information and clock pulses supplied to the first regenerator 3. Next, the signal is fed to the input of the amplifier-driver 8, which provides the level and shape of the signal supplied to the first control input of the modulator 9. The modulator 9 modulates the signal, arriving at its second, signal input from the output of the generator 10. The generator 10 operates in the range of 36-39.5 GHz. Modulated signal through

the circulator 11 enters the antenna 12 and is broadcast. The circulator 11 provides a separation of the transmitted and received signals.

The signal received from the ether from the output of the antenna 12 enters through the circulator 11 and the bandpass filter 27 to the first signal input of the mixer 13. The mixer 13 converts the received signal into an intermediate frequency signal using a local oscillator 14 operating in the frequency range 36-39.5 GHz. The high-pass filter 15 attenuates the signal generated by the interaction of the received signal in the mixer 13 and the signal from the generator 10, which enters the mixer 13 through the circulator 11 and the bandpass filter 27. Through the low-noise amplifier 28, the controlled attenuator 29 and the intermediate frequency amplifier 16, the signal is input a demodulator 17, where an information modulating signal is extracted, which is amplified in the video amplifier 18 and supplied to the inputs of the first threshold block 19 and the peak detector 30. The peak detector 30 detects slow and changes in the signal level, and the algebraic adder 31 determines the difference between this level and the level of the reference voltage generated by the DC voltage generator 32. The signal from the output of the algebraic adder 31 controls the attenuation of the controlled attenuator 29, maintaining the output signal of the video amplifier 18 at a constant level when the signal level changes at the first input controlled attenuator 29. Such a system of automatic gain control can significantly increase the dynamic range of the receiving part of the reception transmitter, since the signal level at the input of the intermediate frequency amplifier 16 is maintained substantially constant, preventing overloading of the intermediate frequency amplifier 16 and the signal distortion caused by this overload.

The first threshold block 19 provides a decision on the received symbol - "0" or "1". The second differentiating circuit 34, the third DC generator 38, the third switch 35, the second oscillating circuit 36 and the third threshold block 37 carry out

the selection of clock pulses necessary for the regeneration of information in the second regenerator 20. Since free oscillations in the second oscillating circuit 36 occur almost simultaneously with the appearance of the first differentiation pulse 34 at the input of the second differentiating circuit 34, the clock pulses appearing at the output of the third threshold block 37 are suitable for restoration in the second the regenerator 20 of the first information pulse received at the input of the device. This ensures the fastest possible passage of the information signal from the antenna to the output of the device, i.e. Provides increased performance. The second regenerator 20 restores the shape and temporary position of the information pulses. The second delay unit 33 is necessary for phasing information and clock pulses supplied to the second regenerator 20. The test pulse generator 39 generates test pulses transmitted to the output of the transceiver in between the information packets. In this case, the combiner 40 passes to the output signals from the output of the test pulse generator 39 or from the output of the second regenerator 20. From the output of the combiner 40, a digital signal amplified by the output amplifier 25 is fed through the output matching unit 26 to the output of the device.

Thus, in comparison with the prototype, the proposed utility model has a higher speed.

Claims (1)

Duplex millimeter wave transceiver with increased speed, containing a series-connected input matching unit, the input of which is the input of the device, and the receiver of the input signal; serially connected amplifier-driver, modulator and circulator; a serially connected mixer and a high-pass filter; an intermediate-frequency amplifier, a demodulator, a video amplifier and a first threshold unit connected in series; a series-connected output amplifier and an output matching unit, the output of which is the output of the device; first and second regenerators; a generator whose output is connected to a second signal input of the modulator; a local oscillator, the output of which is connected to the second heterodyne input of the mixer; an antenna connected to the second input-output of the circulator, characterized in that the first differentiating chain, the first key, the first oscillating circuit and the second threshold block, the output of which is connected to the first, signal input of the first regenerator, are introduced in series; the second key and the first delay unit are connected in series, the output of which is connected to the second, clock input of the first regenerator, the output of which is connected to the input of the amplifier-former; series-connected low-noise amplifier and controlled attenuator, the output of which is connected to the input of the intermediate frequency amplifier; serially connected peak detector and algebraic adder; the second differentiating chain, the third key, the second oscillating circuit and the third threshold block, the output of which is connected to the first, signal input of the second regenerator, are connected in series; serially connected test pulse generator and combiner; first, second and third DC generators; a unit for recording test pulses, a second delay unit, the output of which is connected to the second, clock input of the second regenerator; a band-pass filter, the input of which is connected to the first output of the circulator, and the output to the first signal input of the mixer; wherein the output of the input signal receiver is connected to the input of the first differentiating chain, to the first, signal input of the second key and to the input of the test pulse registration unit, the output of which is connected to the second control input of the second key; the output of the first DC voltage generator is connected to the second control input of the first key; the output of the high-pass filter is connected to the input of a low-noise amplifier, the output of the second DC generator is connected to the second input of the algebraic adder, the output of which is connected to the second, control input of the controlled attenuator, the output of the third DC generator is connected to the second, control input of the third key; the output of the first threshold unit is connected to the inputs of the second delay unit and the second differentiating circuit, the output of the second regenerator is connected to the first input of the combiner, the output of which is connected to the input of the output amplifier; in addition, the output of the video amplifier is connected to the input of the peak detector.