RU2821360C1 - Architecture of quantum computing devices for solving applied problems in field of materials science - Google Patents

Abstract

FIELD: quantum computing.

SUBSTANCE: invention relates to devices implementing quantum computational algorithms. Technical result is achieved due to the fact that the architecture of the quantum computer includes transformation units of two types, which are made with possibility of programmable change of transformations; wherein one of the units has the possibility of introducing time delays and performing permutations of channels.

EFFECT: increased coupling between qubits of quantum computers with feedback and increased depth of realized quantum logic circuits, which enables to perform a wider class of quantum transformations and reduces the level of noise, errors and losses in the quantum computer.

30 cl, 13 dwg

Description

Field of technology to which the invention relates

The invention relates to the field of quantum computing, namely to devices that implement quantum computing algorithms for the purpose of solving certain classes of computational problems. In particular, the invention can be used to solve problems of simulating the properties of molecules and materials, problems of global optimization of complex functions with many parameters, finding solutions to large systems of algebraic equations faster and more accurately than devices using classical computing algorithms.

State of the art

Quantum computing algorithms are known from the state of the art, which can solve some classes of problems faster and/or more accurately than classical algorithms, which are disclosed, for example, in the book by M. Nielsen, I. Chang “Quantum Computing and Quantum Information”, Moscow: Mir, 2006. Problem solving by quantum algorithms is accomplished by preparing a quantum state by applying a sequence of quantum transformations on an initial quantum state. The answer to the problem being solved is obtained from the results of measurements performed on the quantum state prepared in this way. Quantum transformations usually take the form of a sequence of layers of one- and two-qubit gates. For a given quantum algorithm, the initial state does not depend on the specific problem being solved. The specific problem being solved determines the sequence of quantum transformations over the initial state. As the complexity of the problems being solved increases, the requirements for the number of qubits increases. Also, as the complexity of problems increases, the number of transformation layers increases.

The disadvantage of quantum computing algorithms is the difficulty of their implementation on quantum devices due to their sensitivity to noise and errors. Solving problems on quantum computers is faster and more accurate than solving the same problems on traditional classical computers, but requires very low levels of noise and errors introduced by real quantum operations (gates) into the converted quantum states of qubits. At the same time, complex problems require the preparation of quantum states consisting of a large number of qubits. The likelihood of introducing errors into the resulting answer increases with the number of qubits in a quantum computer, reducing the accuracy of the answer or the very possibility of executing the quantum algorithm. Solving practically significant problems on quantum computers with the current level of technology development is extremely difficult than classical computers, and therefore the superiority of quantum computers over classical ones has not been demonstrated in practice.

Quantum computers based on material qubits are known from the prior art, disclosed, for example, in the patent publication of R.G. Clark, A.S. Dzurak, J.L. O'Brien, S.R. Schofield, M.Y. Simmons, "Single molecule array on silicon substrate for quantum computer" // WO 02/18266 (2002). In such computers, quantum information is stored in material qubits, which can be, for example, superconducting circuits, quantum dots, defects in a solid, or trapped single neutral atoms or charged ions. The most convenient geometry for the arrangement of material qubits on a quantum computer chip or in a trap holding atoms or ions of a quantum computer is one-dimensional and two-dimensional geometry. Moreover, in one application of quantum gates, entangling two or more qubits can only be performed between qubits that are located adjacent to each other.

The disadvantage of a planar one-dimensional or two-dimensional arrangement of qubits is the limited connectivity of the qubits due to the impossibility of mixing up qubits remote from each other in one application of gates. Entangling quantum operations are usually always present in quantum logic circuits, which describe the sequence of gates used to prepare quantum states. As a consequence, in such quantum computers, to perform one entangling gate between remote qubits, it is necessary to use a sequence of additional two-qubit gates that alternately act on neighboring qubits. The number of additional gates required for one mixing operation between distant qubits increases as the qubits move away from each other. The time spent executing gates between distant qubits increases in proportion to the number of additional gates, which leads to an increase in introduced noise and errors and, therefore, limits the use of quantum computers with one-dimensional and two-dimensional placement of qubits.

Quantum computers based on material qubits, which are ions in traps, which are disclosed in CD, are known from the prior art. Bruzewics, J. Chiaverihi, R. McConnell, J.M. Sage, “Trapped-ion quantum computing: Progress and challenges,” Appl. Phys. Rev. v. 6, 021314 (2019). In these computers, qubits are arranged in a one-dimensional array. The specificity of the physical interaction of ions in the trap of a quantum computer makes it possible to implement entangling operations between remote qubits in one approach.

The disadvantage of quantum computers based on ions is the limitation on the number of qubits in a quantum computer due to the impossibility of creating conditions for holding a large number of ions in a trap with the simultaneous possibility of their address control. The largest number of qubits in one ion trap does not exceed ~100, which is much less than is required to be able to solve practically significant problems more efficiently than on classical computers.

Linear optical quantum computers are known from the prior art that use optical photons that propagate through linear optical circuits, for example integrated circuits, to store and convert quantum information, which are disclosed in the patent publication of K. Bradler, D. Su, N. Killoran, M. Schuld, Z. Vernon, L. Helt, B. Morrison, D. Mahler, "Apparatus and methods for Gaussian boson sampling" // WO 2020/232546 (2020). Such computers use the quantum properties of photon interference and are capable of implementing certain classes of quantum algorithms.

The disadvantage of known linear optical quantum computers is the large amount of physical resources: sources of photons or compressed quantum states, programmable multichannel interferometers, photon detectors and fast switches. With the increasing complexity of the problems being solved and the quantum algorithms used to solve them, the volume of these physical resources is growing. In addition, as the size of interferometers increases, losses increase, which impede quantum computing. The current level of technology development does not allow the creation of linear optical quantum computers with a traditional architecture with the scale and quality of quantum operations capable of solving practically significant problems more efficiently than classical computers.

The closest to the claimed technical solution are the method and device for preparing quantum states of photons, disclosed in the patent publication of J.C. Mower, N.C. Harris, D. Englund, G. Steinbrecher, "Methods, systems, and apparatus for programmable quantum photonic processing" // US 9354039 (2016). The invention is based on a multichannel programmable interferometer with feedback, in which signals from some outputs are redirected to some inputs through feedback lines. The transformed states are supplied to the input channels of the interferometer and can pass through the interferometer many times, due to which the depth of the effective circuit - a parameter characterizing the complexity of linear optical conversion - increases compared to the depth of the physical circuit of the interferometer device used. Thus, it is possible to use programmable interferometers with fewer channels and fewer photon sources and detectors than would be required using the open-loop method.

The disadvantage of this technical solution is the limited connectivity of quantum circuits that can be implemented in a linear optical quantum computer, which limits the class of quantum algorithms that can be implemented in a computer based on such an interferometer, and the class of problems that can be solved with its help. Another drawback is the limited depth of quantum logic circuits that can be implemented in such an interferometer, which limits its usability.

The technical problem solved by the claimed invention is a limited class of quantum transformations that can be implemented in known quantum circuits with feedback. Also a technical problem to be solved is the high level of noise, errors and losses that accompany quantum computers with limited connectivity of qubits as their number increases.

Disclosure of the Invention

The technical result of the invention is to increase the connectivity between the qubits of quantum computers with feedback and increase the depth of the implemented quantum logic circuits, which makes it possible to perform a wider class of quantum transformations and reduces the level of noise, errors and losses in the quantum computer.

The technical result is achieved by a quantum computer, which may have several embodiments.

According to the first embodiment of the invention, a quantum computing device includes at least one block of the 1st type, having N inputs and N outputs, where N>=3, capable of synchronously converting signals described by quantum states in time t; at least one block of the 2nd type, having M<N inputs and M outputs, where M>=2, configured to introduce time delays into signals described by quantum states arriving at its inputs, with the ability to rearrange the channels at the outputs relative to input channels; a measurement unit configured to measure and process measurement results of quantum states of signals arriving at the inputs of the block from N-M outputs of the 1st type block; an input signal generation unit configured to supply signals to N-M inputs of the 1st type block, described by identical quantum states, with a period T equal to or a multiple of τ; a computer configured to control transformations of at least one block of the 1st type and at least one block of the 2nd type, control the measurement block and process the measurement results of this block; in this case, M outputs of the 1st type block are connected to M inputs of the 2nd type block, and M outputs of the 2nd type block are connected to M inputs of the 1st type block, and N-M outputs of the 1st type block are connected to N-M inputs of the block measurements.

A quantum computing device can contain at least two blocks of the 1st type, with the blocks connected in series in such a way that the outputs from the previous block are connected to the corresponding inputs of the subsequent block.

A block of the 2nd type can be configured to change time delays in at least one spatial channel of this block; with the ability to introduce time delays multiples of T and their programmable change. At least one of the transformation blocks of the 1st and 2nd types, the measurement block and the computer can be configured to change the transformation of quantum states in a time less than T.

Optical signals that encode quantum states can be used as signals, while it is preferable to use programmable interferometers as blocks of the 1st and 2nd types, where the 2nd type block additionally contains time delay loops.

In a quantum computing device, a type 2 block may contain quantum memory elements capable of recording and reading optical signals. A quantum memory element can have different design implementations, for example, it can be a solid-state quantum system capable of storing quantum states of incoming signals in the form of excitation of quantum states of this quantum system for a period of time of at least 2T. In another embodiment, a quantum memory element can be a quantum system implemented on the basis of alkali metal vapors, capable of storing quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a period of time of no less than 2T. In addition, a quantum memory element can be a quantum system of single neutral atoms in a trap or ions in a trap, capable of storing quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a period of time not less than 2T.

According to the second embodiment of the invention, a quantum computing device includes at least one block of the 1st type, having N inputs and N outputs, where N>=3, capable of synchronously converting signals described by quantum states in time τ; at least one block of the 2nd type, having a total of N inputs and M<N outputs, where M>=2, containing at least 2 modules connected in parallel or in series and configured to introduce time delays into signals described by quantum states , coming from the corresponding outputs of the 1st type block to the inputs of the 2nd type block, with the possibility of rearranging the channels at the outputs relative to the channels at the inputs; at least one measurement block configured to measure the quantum states of signals arriving at D>=1 of its inputs from the D outputs of the 2nd type block module; an input signal generation unit configured to supply signals to N-M inputs of the 1st type block, described by identical quantum states, with a period T equal to or a multiple of τ; a computer configured to control transformations of a block of the 1st type and a block of the 2nd type, control a measurement block and process the measurement results of this block.

A block of the 2nd type can consist of two modules and have at least four options for implementing the scheme for connecting them with the remaining blocks of the quantum computing device.

According to the first option, two modules of the 2nd type block are connected to the 1st type block in parallel, while a subset of M1 outputs of the 1st type block are connected to the M1 inputs of the first module of the 2nd type block, the M1 outputs of which are connected to a subset of M1 inputs of the 1st type block, while the remaining N-M1 outputs of the 1st type block are connected to N-M1 inputs of the second module of the 2nd type block, D outputs of the second module of the 2nd type block are connected to D inputs of the measurement block, and the remaining M2=N-M1-D outputs of the second module of the 2nd type block are connected to the M2 inputs of the 1st type block.

According to the second option, the modules of the 2nd type block are connected to the 1st type block in series, while a subset of M1 outputs of the 1st type block are connected to a subset of M1 inputs of the first module of the 2nd type block, the M1 outputs of which are connected to a subset of M1 inputs of the 1st type block, while the remaining N-M1 outputs of the 1st type block are connected to N-M1 inputs of the second module of the 2nd type block, D outputs of which are connected to D inputs of the measurement block, while the remaining M2=N -M1-D outputs of the second module of the 2nd type block are connected to a subset of M2 inputs of the first module of the 2nd type block.

According to the third option, the modules of the 2nd type block are connected to the 1st type block in series, while the N outputs of the 1st type block are connected to the N inputs of the second module of the 2nd type block, a subset of D outputs of which is connected to the D inputs of the measurement block , the remaining N-D outputs of the second module of the 2nd type block are connected to the N-D inputs of the first module of the 2nd type block, the N-D outputs of which are connected to a subset of the N-D inputs of the 1st type block.

According to the fourth option, the modules of the 2nd type block are connected to the 1st type block in series, while the N outputs of the 1st type block are connected to the N inputs of the first module of the 2nd type block, the N outputs of which are connected to the N inputs of the second module of block 2 -th type, while a subset of D outputs of the second module of the 2nd type block is connected to the D inputs of the measurement block, and the remaining N-D outputs of the second module of the 2nd type block are connected to the N-D inputs of the 1st type block.

In addition, an algorithm can be implemented in a quantum computing device, according to which signals described by identical quantum states are supplied to the N-M inputs of a block of the 1st type, with a period T equal to or a multiple of m, while the time delays introduced by the block of the 2nd type , are multiples of T and are made with the possibility of programmable change.

The computer can be configured to change the transformation of quantum states performed by a type 1 block in a time less than T; with the ability to change the basis of measurements performed by the measurement unit in a time less than T.

As signals, it is preferable to use optical signals that encode quantum states; in this case, blocks of the 1st and 2nd types and quantum memory elements may have the implementation described above, characterizing the first embodiment of the invention.

A quantum computing device can be made based on a quantum system of single neutral atoms in a trap, or based on a quantum system of single ions in a trap, or based on a quantum system of superconductor chains, or based on a quantum system of quantum dots, or based on a quantum system of defects in silicon or diamond. Moreover, in one of the embodiments of the invention, a block of the 1st type and a block of the 2nd type can be made on the basis of different quantum systems.

In a quantum computing device, the computer is configured to implement quantum variational algorithms.

The invention is characterized by the possibility of reusing resources - a limited number of qubits available in quantum systems based on material carriers of quantum information or sources and detectors of photons and interferometers in linear optical quantum computers - in comparison with previously known methods with the same amount of resources and availability in feedback channels of an additional block or blocks that delay and rearrange quantum states entering the feedback channels. Thanks to this, it is possible to increase the dimensionality of the prepared quantum optical states and reduce the influence of noise, errors and losses on the results of quantum calculations.

The presence of an additional block or blocks in the feedback channels makes it possible to increase the connectivity and depth of quantum logic circuits that can be implemented in a quantum computer. Thus, the problem of limited connectivity of traditional quantum computing architectures is solved, for example, in the case of connectivity in which entangling quantum operations are possible only between closely spaced qubits. The problem of limited depth of quantum logic circuits is also solved.

Brief description of drawings

The invention is illustrated by drawings and diagrams.

In fig. 1 shows a diagram of the architecture of the quantum computer proposed in the present invention.

Fig. 2 explains the space-time quantum information encoding method used in the present invention.

In fig. Figure 3 shows a diagram of the known architecture of a quantum computer with static delay lines.

In fig. 4 shows a quantum circuit that can be implemented in the quantum computer shown in FIG. 3.

In fig. Figure 5 is a diagram illustrating the finite connectivity of qubits in a quantum processor.

In fig. Figure 6 shows a quantum logic circuit that implements the quantum Fourier transform.

In fig. Figure 7 shows an example of implementing a two-qubit gate between remote qubits in quantum computers with limited qubit connectivity. In fig. Figure 7a shows an example of a two-qubit gate CR _j between qubits remote from each other. In FIG. 7b shows an example of a quantum logic circuit that must be implemented on a quantum computer with limited connectivity to implement the two-qubit gate CR _j from FIG. 7a.

In fig. Figure 8 shows a diagram of the decomposition of a SWAP gate into a sequence of three CNOT gates.

In fig. 9 shows an example of a quantum logic circuit that can be implemented in the quantum computer shown in FIG. 1.

Figure 10 illustrates possible designs of quantum computers made using the proposed architecture.

Fig. 11 illustrates examples of type 2 converter blocks used in the proposed quantum computing architecture.

In fig. Figure 12 shows an example of a programmable time delay line with two possible values of the inserted time delay.

In fig. 13 shows diagrams of optical installations that were used for a specific demonstration of the claimed invention.

Positions in the figures are designated:

1 - type 1 converter block;

2 - converter block of the 2nd type, 2a and 2b - modules of the converter block of the 2nd type;

3 - measurement block;

4 - computer controlling the quantum computer;

5 - set of inputs of the converter block of the 1st type, where 5a is a subset of inputs used to enter the initial states, 5b is a subset of inputs used in feedback lines;

6 - set of outputs of the converter block of the 1st type, where 6a - a subset of outputs in which prepared states are generated, arriving at the inputs of the measurement block, 6b - a subset of outputs used in feedback lines;

7 - set of inputs of the 2nd type converter block;

8 - set of outputs of the converter block of the 2nd type;

9 - lines through which the computer controls the type 1 conversion block;

10 - lines through which the computer controls the type 2 conversion unit;

11 - lines through which the computer controls the measurement unit;

12 - lines along which the measurement results of the measurement unit enter the computer;

13 - quantum states included in the inputs 5a of the converter block of the 1st type, where 13a and 13b are two states following each other in different time periods;

14 - quantum states prepared by a quantum computer and emerging from outputs 6a of the converter block of the 1st type, where 14a and 14b are two states following each other in different time periods;

15 - quantum states emerging from the outputs 6b of the converter block of the 1st type and arriving at the inputs 7 of the converter block of the 2nd type, where 15a and 15b are two states following each other in different time periods;

16 - quantum states emerging from outputs 8 of the 2nd type converter block and arriving at a subset of inputs 56 of the 1st type converter block, 16a and 16b - two states following each other in different time periods;

17 - block of time delays;

18 - quantum transformation, which is implemented by the converter block of the 1st type in M steps of the quantum computer; 18a and 18b - two transformations of the 1st type converter block, which are implemented in two successive steps of the circuit; transformations performed at different steps of the circuit are designated V _m , where m is the step number;

19a and 19b - two channels that are implemented by the feedback line in 2 successive steps of the quantum computer;

20 - quantum processor chip with planar placement of qubits;

21 - qubits of a quantum processor; 21a - one qubit that can interact with qubits 21b in one use of a two-qubit gate; 21c - qubit distant from qubit 21a;

22 - input N-qubit quantum state;

23 - two-qubit gate acting on neighboring qubits;

24 - two-qubit gate acting on qubits remote from each other;

25 - transformed N-qubit quantum state;

26 - sequences of using SWAP gates necessary to perform a two-qubit gate between qubits remote from each other;

27 - SWAP gate;

28 - two-qubit gate acting on neighboring qubits;

29a, 296 - two channels that are implemented by the feedback line in 2 successive steps of the quantum computer;

30 - delay line;

30a, 30b, 30c - programmable delays;

31 - programmable permutation block;

31a, 31b, 31c - programmable rearrangements; 32a, 32b - static delays;

33a, 33b - input and output programmable delay switch;

34 - 4-channel interferometer;

35 - block of the 2nd type, 35a and 35b - fiber feedback lines;

36 - source of photon pairs;

37 - measurement unit, 37a and 37b - single photon detectors;

38 - lines along which the measurement results of the measuring unit enter the computer, 38a and 38b - electrical lines coming from single photon detectors 37a and 37b, respectively.

Carrying out the invention

The invention deals with the architecture of quantum computers capable of solving problems in the field of materials science. The proposed architecture can be used to build quantum computers on different physical platforms, both on the basis of material systems, in which information in the form of quantum states can be stored and processed in material media, and on the basis of optical systems, in which the information carrier is flying optical photons .

For a more clear understanding of the essence of the claimed invention, the main terms and definitions used within the framework of this description are presented below.

A logical qubit or simply a qubit is a quantum physical system or part of a physical system that allows storing two quantum states, denoted |0) and |1) and called logical “0” and logical “1,” as well as any of their linear superpositions of the form α |0 )+β|1), where α and β are complex numbers that obey the normalization condition: |α| ² +|β| ² =1. The logical states of qubits |0) and |1) are encoded into quantum states of the physical system.

There are many ways to encode the logical states of qubits into the physical states of the system. When encoding a qubit into optical photons, the choice of a specific qubit encoding is determined by the availability of the resources required for this, for example, the number of channels in optical circuits and the number of photons, and the convenience of performing transformations on qubits. In linear optical quantum computing, it is common to encode qubits into a “dual-rail basis” (from the term dual-rail encoding in English literature), using two optical channels/modes, consisting of two physical states |0> _m |1> _n and |1> _m |0> _n , where |0> and |1> are Fock states with the number of photons 0 and 1, respectively, and the type indices indicate the numbers of optical channels to which the Fock state belongs (R. Kok et al. “Linear optical quantum computing" // Rev. Mod. Phys., vol. 79, 135 (2007)). Also common is encoding into the so-called “single-rail basis” (from the term single-rail encoding in English literature), which uses Fock states in one optical channel |0> _m and |1> _m. The present invention is a two-rail encoding. In quantum systems that use material elements to store and transform qubits, for example, neutral atoms in traps, ions in traps, defects in solid-state structures, quantum dots, qubits can be encoded into electronic states and two energy levels.

A quantum calculator or quantum computer is a device that uses the quantum properties of real physical systems to practically implement quantum computing algorithms.

The features of quantum physical systems that distinguish them from classical ones can be described using the mathematical concept of a system state vector. If D possible states of a quantum system can be assigned a set of states |ϕ _j ) (j=1...D), which are pairwise orthogonal ((<ϕ _i |ϕ _j >=δ _ij ), then the quantum system can also be in a state with observables in experiment by characteristics described by the superposition of states |(ϕ>:

where c _j are expansion coefficients that specify a specific quantum state (j=1...D), for which the normalization relation is valid: Even for relatively small physical systems consisting of Q qubits - two-level quantum systems, the number of different basis states |ϕ _j > and expansion coefficients c _j in (1) is exponentially large: D=2 ^Q . To store all the information about a quantum state (1) on classical computers, memory is required for 2 ^Q+1 - 1 real parameters specifying the coefficients c _j , which is not possible even for relatively small values of Q ≈ 50. Transformations over state vectors (1) are described by matrices of dimension D × D, which on a classical computer requires even more memory than storing the state vector. Here it should be noted the difference in the complexity of the classical description of the transformation Q of classical amplitudes, specified by multiplying a matrix of dimension Q × Q, and the classical description of the transformation of a Q-qubit quantum state, where multiplication by a matrix of dimension 2 ^Q × 2 ^Q is required.

Unlike classical computers, quantum computing devices provide real-world capabilities for performing calculations by transforming exponentially information-intensive quantum states by manipulating a relatively small number of physical qubits. The basic functionality of quantum simulators is the ability to prepare quantum physical systems used in simulator devices into states that can be controlled by external classical influences.

Parameterized quantum states are quantum states that can be set at the preparation stage by setting control parameters.

Parameterized quantum circuits are quantum converters that carry out transformations of quantum states, the specific form of which depends on the set of control parameters Parameterized quantum circuits are used to prepare parameterized quantum states

Quantum logic gates, quantum gates, or simply gates are elementary known quantum operations that are used to construct more complex quantum algorithms and circuits. Gates are classified according to the number of qubits they act on. So, they talk about one-qubit gates, two-qubit gates, three-qubit gates, etc. The most common sets of gates from which transformations of multiqubit quantum states are constructed contain one- and two-qubit gates. For example, single-qubit gates are common, the action of which is described by matrices:

Single-qubit operators described by matrices (2) are called Pauli operators, and the matrices themselves are called Pauli matrices. Single-qubit transformations of the qubit state α|0) +β|1) are reduced to column multiplication to the matrix corresponding to this transformation. Among the many two-qubit gates, the following are common:

Two-qubit transformations correspond to the multiplication of matrices by a column of amplitudes corresponding to the states of two qubits: In this case, the amplitude column looks like where tr means string transposition. Applying some two-qubit gates, such as gates (3), to initially independent (unentangled) states prepares entangled states. For this reason, such gates are called entanglement gates. An example of a non-swapping gate is a SWAP gate (see formula (4) below).

A quantum logic circuit, or simply a quantum circuit, is a sequence of application of quantum gates over the logical states of qubits that describe the execution of a quantum algorithm or quantum transformation. It is worth noting that quantum circuits describe transformations at a high level of abstraction that are performed on logical states without regard to specific implementations of encoding qubit states and gates that transform them.

The connectedness of qubits in a quantum computer is the characteristic of this computer, which describes the set of two-qubit operations that can be performed on the qubits of the computer in one application of these operations. The connectivity of qubits can be described as a graph, the vertices of which are the physical qubits in the quantum computer, and the edges connecting pairs of qubits are possible interactions between pairs of qubits that can implement two-qubit gates. The connectivity of qubits is determined by the platform on which the quantum computer is based and the specific technology for its manufacture. Typically, qubit connectivity in quantum computing is characterized by the ability to perform two-qubit operations only between qubits that are physically adjacent to each other.

A variational quantum algorithm is a quantum algorithm based on the alternate use of a physical system to prepare a parameterized quantum state and a classical optimization algorithm that accepts the results of measuring the prepared state. In accordance with the measurement results, the optimization algorithm produces an updated set of control parameters which changes the state prepared by the quantum simulator: Measurements carried out using a variational quantum state represent the average of some physical quantity, the minimum of which must be found and is usually the Hamiltonian of the system I. Materials science problems associated with finding new substances and materials or studying the properties of existing substances and materials can be reduced to finding the energy of the ground state of the Hamiltonian (N. Ma, M. Govoni, G. Galli “Quantum simulations of material on near-term quantum computers” // NPJ Computational Materials v. 6, No. 85 (2020)).

The algorithm for finding the energy of the ground state of the Hamiltonian describing the simulated system consists of successive steps:

1) The simulator prepares a quantum state consisting of P qubits, which depends on a set of parameters Preparation is carried out by sequentially applying gates that define the quantum circuit of the simulator to a fixed initial state. The set of gates available in the simulator used, and their quality, determines the class of states being prepared. The gates can be standard one- and two-qubit gates, as well as multi-qubit transformations. Change settings allows you to vary the state of preparation.

2) A series of measurements of the prepared states is carried out, in each of which the average of each of the terms is obtained Hamiltonian of the problem The transition from measuring one term to another is carried out by changing the measurement basis. Sum of measured averages (with coefficients g _α ) is an estimate of the expected energy of a quantum system for a given state

3) The quantity (H) is supplied to the classical computer as the value of the optimized Hamiltonian energy function, after which the computer performs the classical numerical optimization procedure. The classic optimization algorithm produces a new value for a set of parameters arriving at the quantum device of the simulator and the simulation continues, starting from the first step.

4) Using the iterations described in paragraphs 1-3, find the minimum energy Thus, the sequence of iterations represents steps with different values of a set of parameters, which can be described by the expression: - increment of a set of parameters at n+1 iteration step.

Members Hamiltonian to be optimized for P-qubit states can be represented as a product of N Pauli operators having matrix representation (2): - operator designation

Pauli from set (2) (see, for example, the work of Y. Cao et al., “Quantum chemistry in the age of quantum computing”//Chem. Rev., vol. 119, No. 19, p.10856-10915 ( 2019)). Specific problem defined by the Hamiltonian , is specified by the number and values of coefficients g _α and sequences of products of Pauli operators, the averages of which must be calculated using a quantum simulator. Thus, when solving an optimization problem using a quantum variational algorithm, the average and the optimized function for a given set of varied parameters

A transducer block channel or transducer channel is a concept that corresponds to a unit of quantum information stored in one part of the quantum states converted by this transducer, and a sequence number that uniquely identifies one transducer channel from another. Each channel has its own input and output in the converter. The converted quantum states enter the converter channels through the corresponding inputs, and the converted states leave its channels through the outputs. For example, if a converter performs transformations on quantum states encoding qubits, then the unit of information corresponding to the channel is the qubit. The text will talk about quantum computers that transform the states of qubits, but the proposed invention is also valid for the general case when the units of information that quantum computers operate are qudits or other units of quantum information.

A type 1 transformation is a transformation performed on two or more channels, which can confuse the initially independent states entering the transformation input. For example, to implement type 1 transformations, you can use gate quantum logic circuits, which are used in traditional quantum computers. Transformations of the 1st type are characterized by the synchronous execution of transformations of quantum states arriving at its input, in which a quantum state arriving simultaneously at its inputs is transformed into a quantum state simultaneously emerging from all outputs. Thus, a type 1 transformation can only introduce a constant time delay into the states being transformed. This delay is related to the execution time of the transformation in its specific implementation.

Type 2 conversion is a conversion that can introduce time delays independently into different conversion channels, as well as perform channel permutation.

A type 1 transformation block or type 1 converter is the part of a quantum computer that performs type 1 transformations.

A type 2 transformation block or type 2 converter is the part of a quantum computer that performs type 2 transformations.

In fig. Figure 1 shows a diagram explaining the proposed architecture of a quantum computer. The main elements of the circuit are: converter block 1 of type 1, converter block of type 2 2, measurement block 3, computer 4. Block 1 performs transformations of quantum states that arrive at its inputs 5, the result of which are quantum states emerging from its outputs 6. Block 2 carries out the transformation of quantum states that arrive at its inputs 7, the result of which are quantum states emerging from its outputs 8. The subset of inputs 5a of the converter block of the 1st type 1 receives quantum states 13. The subset 6a of outputs 6 is connected with the inputs of the measuring block 3. A subset of outputs 66 outputs 6 is connected to the inputs 7. The outputs 8 of the 2nd type 2 converter block 2 are connected to a subset of inputs 56 of the 1st type 1 converter block 1. The computer 4 controls the 1st type 1 converter blocks and blocks converter of the 2nd type 2 through lines 9 and 10, respectively, through which classical information is transmitted. Also, computer 4 controls measurement unit 3 through lines 11, through which classical information is transmitted. The measurement results are sent to computer 4 through lines 12.

The Type 2 Converter Block 2 is a major addition to the already known closed-loop computer architectures. It is capable of performing transformations both between spatial channels (having inputs 7 and outputs 8) and between time channels, which are characterized by different time periods in which quantum states in spatial channels are located. Type 1 Converter Block 1 is only capable of converting between spatial channels. Below, the functional features of these blocks will be explained in more detail.

It takes some time τ ₁ to perform the transformation in the 1st type converter block. For this reason, during the execution of a specific quantum algorithm that solves problems on the presented computer, a subset of inputs of the 1st type 1 converter block receives quantum states 13 |ψ ⁱⁿ > with a repetition period T>τ _1g. In fig. 1 shows two successive states 13a and 13b. The states |ψ ₀ > do not change from task to task and serve to initialize the state of the quantum computer. They are chosen based on ease of preparation. For example, if the inputs and outputs correspond to logical qubits, then for each qubit we usually choose where n _α is the number of inputs/qubits of the subset of inputs 5a of the converter block of the 1st type 1. The input states are characterized by the fact that each such state is localized in time in a time interval of duration τ≤τ ₁ and arrives at a subset of inputs with a certain repetition period T> τ ₁ in quantity m _in . The converter block of the 1st type 1 is characterized by the fact that states received at its inputs in different time intervals are converted independently, and states received at the inputs in one time interval are transformed by this block and arrive from the outputs synchronously in one time interval.

The quantum computing device prepares quantum states, which are measured by measurement unit 3. The prepared states arrive at the measurement unit in the form of a sequence of pulses - quantum states, prepared by the quantum computing device and emerging from outputs 6a of the 1st type converter block, where 14a and 14b are two states , following each other in different time periods with a period T.

A type 2 converter block is characterized by the fact that it can introduce time delays into the quantum states arriving at its inputs: quantum states arriving at its inputs synchronously in one time interval can leave its outputs in different time intervals. In this case, the converter block is designed in such a way that the time difference between the time intervals in which the states at the outputs of the block are localized is a multiple of the period T, provided that this condition is met for the states arriving at its inputs. In other words, the time intervals in which states from the 2nd type 2 converter block arrive at the subset of inputs 5b of the 1st type 1 converter block must be synchronized.

Feedback computers use space-time coding to expand the dimensionality of the information being processed. Thanks to this coding, it is possible to use limited physical resources to build large-scale computers. In computers - both quantum and classical - the information processed is localized in space, for example, in physical material qubits on a processor chip or in the spatial mode in which a qubit encoded by an optical photon propagates. Each qubit can be transformed independently of the others; gates can be addressed to them. In addition, quantum information is also localized in time in the form of pulses of finite duration, which are specified, for example, by the characteristic times of the duration of quantum operations (gates) performed on material qubits and/or the duration of optical pulses that encode quantum states. In spatiotemporal coding, both spatial and temporal degrees of freedom are used, in which the processed information is localized. Thus, spatiotemporal channels can be associated with non-overlapping spatial modes and time intervals into which the channels are encoded.

Fig. 2 explains a space-time information encoding method in which N spatial channels are composed of M time channels. Time channels in each spatial channel are encoded into time intervals following each other with a period T. A time channel with index m (m=1...M) as part of a spatial channel with index n (n=1...N) is characterized by time samples t _m =t ₁ +(m-1)T, describing the time samples of the centers of time intervals into which the pulses that store information fall. In this case, the time count of the first time window t ₁ is determined by the start time of the quantum computer. In order for information stored in different time channels to be transformed independently, the corresponding time intervals should not overlap with each other, therefore the repetition period T>τ, where τ is the characteristic width of the time window into which the pulses carrying information fall. The use of not one, but N spatial channels, consisting of M time channels, increases the amount of information processed by systems with space-time coding by M times, i.e. the number of information pulses is equal to M ⋅ N. Each pulse carries a part of the quantum state. When using only spatial coding, only N time pulses can be processed. Performing arbitrary transformations on states in space-time encoding requires the presence of delays, which, firstly, can bring parts of states arriving at the converter at different intervals (different time channels with different indices m) into one time interval, and, secondly , separate into different time intervals the states arriving at the converter synchronously in the same time intervals (time channels with the same m).

To use spatio-temporal encoding of information, it is necessary to be able to transform information in such encoding. In fig. Figure 3 shows the architecture of a feedback quantum computer that is capable of performing quantum transformations in space-time encoding. This architecture is known from the field of optical computers (J.C. Mower, N.C. Harris, D. Englund, G. Steinbrecher, “Methods, systems, and apparatus for programmable quantum photonic processing” // US 9354039 (2016)). In such a quantum computer, a subset of outputs 66 of the converter block of the 1st type 1 are directed to the time delay block 15. The outputs of the delay block are directed to a subset of inputs 5b of the converter block of the 1st type 1. The time delay block 17 introduces a delay T into all channels. The difference between this architecture and the proposed one is the impossibility of performing programmable delays and rearrangements in a type 2 block.

In fig. 4 shows an efficient quantum logic circuit that can be implemented using the closed-loop quantum computer shown in FIG. 3, for M cycles of its operation. The diagram shows transformations over quantum states 18, which can be implemented by the converter block of the 1st type 1. In the general case, the transformations of the 1st type 1 block can be controlled from a computer and therefore for different steps of the operation of the transformation circuit at different steps, described by the matrices V _m , where m is the step number, can change (in the figure, transformations 18a and 18b, performed in the first two steps, are separately indicated). Some of the inputs of the circuit receive input states |ψ( ⁱⁿ )> (in the figure they are designated 13a and 13b for the first two steps). The diagram shows transformations 18a and 18b for the first two cycles (steps). Part of the states at the output of the 1-type 1 converter block after the cycle is completed is supplied to the transformation input V _m+1 at the next cycle. The diagram shows parts of states 19a and 19b for the first two cycles. Part of the states prepared at the outputs of the converter block of the 1st type 1 at each cycle forms a prepared state 14, which can be used later in the operation of a quantum algorithm, for example, in a quantum variational algorithm.

From fig. 4 it can be seen that the feedback circuit shown in FIG. 3, can prepare states with a dimension exceeding the dimension of the state prepared in the converter block of the 1st type 1 without feedback: if the dimension of the states prepared in one step (for example, states 14a or 14b) is equal to Q qubits, then in M steps the dimension of the prepared quantum state 14 is equal to M ⋅ Q. This is possible due to space-time coding of information, in which the prepared quantum state 14 is generated in parts at successive time intervals.

A disadvantage of the quantum computing architecture shown in FIG. 3 is a limited class of quantum transformations that can be implemented on this platform. As a result, such schemes can only be used to solve limited classes of problems.

The limited connectivity of qubits in quantum computers is one of the limiting factors preventing their use for solving practically significant problems. Fig. Figure 5 illustrates the reason for the finite coupling of qubits in quantum computers built on traditional open-loop architectures.

Traditional quantum computing architecture can be used to create a type 1 converter block in the proposed architecture. In fig. 5 shows a quantum processor chip 20 with a planar arrangement of qubits and communication only between adjacent qubits. The qubits 21 on the chip 20 are arranged in a two-dimensional array. Chip 20 is designed in such a way that it is possible to implement the interaction (in one application) necessary to implement two-qubit and/or multi-qubit gates only between adjacent qubits. As an example, the figure highlights one qubit 21a and 4 qubits 21b, with which qubit 21a can be interacted. If it is necessary to perform entangling quantum operations involving qubit 21a and remote qubits, it is necessary to use intermediate qubit gates located on the chip 20 between qubit 21a and remote qubits, for example, qubit 21b. Additional quantum gates introduce noise, errors, and losses in addition to those that would be present in a more connected quantum computer. The presented example does not limit all possible cases of quantum computers. Quantum computers with a planar arrangement of qubits and possible interaction only between neighboring qubits may have a more discharged structure.

To illustrate the importance of high qubit connectivity for quantum computing, FIG. Figure 6 shows a quantum logic circuit that implements the quantum Fourier transform (QFT). QPF finds applications in a number of important quantum algorithms, for example, in Shor’s algorithm, which solves the problem of factoring numbers into prime factors. QPF is also used in the quantum phase estimation algorithm, which can calculate the energy levels of quantum systems. Quantum systems can be molecules or materials (M Nielsen, I. Chang “Quantum computing and quantum information”, Moscow: Mir, 2006). The quantum logic circuit of the QPF shown in Fig. 6 is a sequence of layers of one-qubit Hadamard gates H and two-qubit conditional phase rotation gates CR _j that are applied to the input N-qubit quantum state 22. Two-qubit gates CR _j rotate the phase of the target qubit by an angle of 2π/2 ^j (in the diagram these qubits intersect squares labeled R with a subscript) if the corresponding control qubit is in state |1). As can be seen from Fig. 6, a significant part of the two-qubit gates CR _j in the presented logic circuit acts on qubits remote from each other, most of which correspond to qubits that are remote from each other on the quantum chip of the computer. Thus, running a significant portion of the CR _j gates on a real quantum computer, for example, with the connectivity illustrated in FIG. 6 requires the use of intermediate gates, which introduce noise, errors and losses. In fig. 6, a two-qubit gate 23 is highlighted, which acts on neighboring qubits. It can be applied to a quantum computer in one application without intermediate two-qubit gates. At the same time, for example, a two-qubit gate 24 acting on the 1st and Nth qubits in a quantum logic circuit can hardly be applied in one approach on a real quantum computer, because physical qubits are unlikely to be located next to each other. This situation is still possible, for example, if when numbering qubits on a quantum chip with a planar arrangement, shown in FIG. 5, 1st and Nth qubits are located adjacent, but even in this case, most of the other two-qubit gates will act on qubits that are distant from each other. The transformed N-qubit quantum state 25 at the output of the CPF is used in further execution of algorithms, for example, in the Shor algorithm or the phase estimation algorithm.

To perform two-qubit operations between qubits that are not adjacent to each other, intermediate quantum gates can be SWAP gates that act on two-qubit states according to the following matrix:

The effect of a SWAP gate on two-qubit states is the swapping of information between two qubits.

Fig. 7 explains the need to use intermediate operations performed by SWAP gates to perform two-qubit gates between qubits remote from each other. In fig. Figure 7a shows a layer (transformed N-qubit quantum state 25) of a quantum logic circuit that performs a two-qubit conditional phase shift gate CR _j . In fig. 76 shows an example of the implementation of this operation on a quantum computer with limited connectivity, which allows one application to implement two-qubit operations only between neighboring qubits. Implementation of the operation requires the involvement of sequences of application of SWAP gates 26 from additional two-qubit SWAP gates 27 to move the information contained in one of the qubits involved in the execution of the CR _j gate to the second such qubit. The target operation of the two-qubit gate 28 is carried out between adjacent qubits. From the presented quantum circuit it can be seen that the number of additional SWAP gates required increases in proportion to the removal of qubits involved in the two-qubit operation. As a rule, in quantum computers built on traditional architectures, the SWAP gate is not included in the set of operations that can be performed in one application. For this reason, to perform a SWAP gate, a sequence of other gates that are supported by the quantum computer is used. Often the set of supported quantum gates that can be executed in one go includes a CNOT gate with the transformation matrix given in expression (3). In fig. Figure 8 shows the decomposition of the quantum operation performed by the SWAP gate into a sequence of three two-qubit CNOT gates with a transformation matrix (3). Thus, the implementation of operations of permutation of states between qubits remote from each other is very expensive from the point of view of introducing additional noise and errors introduced into the quantum state. The proposed invention solves the problem of finite connectivity of qubits in quantum computers with feedback.

Thus, closed-loop quantum computers with the architecture depicted in FIG. 3, cannot implement multilayer quantum logic circuits of the QPF. Many other schemes also cannot be implemented in this architecture.

In fig. 9 shows an example of a quantum conversion circuit that can be implemented in a closed-loop quantum computer with a type 2 converter block 2 with the architecture of FIG. 1. Thanks to the ability to store quantum information by a type 2 converter 2 during several steps of the circuit operation, it is possible to increase the connectivity of quantum logic circuits. In fig. 9 shows an example corresponding to the delay/storage of quantum states 29a generated in the converter block of the 1st type 1 at the outputs 66 after the first step of the computer during the following j-1 steps. After which the state enters the converter block of the 1st type 1, which begins to perform the j-th step. The type 2 converter block 2 can simultaneously store states generated in several previous steps, which can be fed to the type 1 converter block 1 according to the particular quantum circuit being implemented.

In fig. Figure 10 shows diagrams of closed-loop quantum computing architectures that can implement more complex quantum logic circuits than the architecture discussed so far. Quantum circuits implemented by quantum computers with the architectures depicted in FIG. 10, may be deeper, because they can consist of many successive diagonal quantum transformations 18. The difference between this architecture and the architecture shown in FIG. 1, is that the converter block of the 2nd type 2 is divided and consists of two blocks 2a and 2b and the prepared state is measured at the output of block 2b. Block 2a serves to introduce a delay and possible channel switching to perform one diagonal of quantum transformations 18 - V _j . Block 2b serves for delay and possible switching of channels between the diagonals of quantum transformations 18, generated sequentially, as well as for outputting the state to measurement block 3. The drawings shown in FIG. 10 (a)-(d), illustrate possible options for the proposed architecture of quantum computers, which differ in the connection of converter blocks of the 1st type and converter blocks of the 2nd type.

According to the embodiment shown in FIG. 10a, two modules of the 2nd type conversion block are connected to the 1st type converter block in parallel, while a subset of M1 outputs of the 1st type converter block are connected to the M1 inputs of the first module of the 2nd type converter block, the M1 outputs of which are connected to a subset of M1 inputs of the 1st type converter block, while the remaining N-M1 outputs of the 1st type converter block are connected to N-M1 inputs of the second module of the 2nd type converter block, D outputs of the second module of the 2nd type converter block are connected with D inputs of the measurement block, and the remaining M2=N-M1-D outputs of the second module of the 2nd type converter block are connected to the M2 inputs of the 1st type converter block.

According to the embodiment shown in FIG. 10b, the modules of the 2nd type converter block are connected to the 1st type converter block in series, while a subset of M1 outputs of the 1st type converter block are connected to a subset of M1 inputs of the first module of the 2nd type converter block, the M1 outputs of which are connected with a subset of M1 inputs of the 1st type converter block, while the remaining N-M1 outputs of the 1st type converter block are connected to N-M1 inputs of the second module of the 2nd type converter block, the D outputs of which are connected to the D inputs of the measurement block, in this case, the remaining M2=N-M1-D outputs of the second module of the 2nd type converter block are connected to a subset of M2 inputs of the first module of the 2nd type converter block.

According to the embodiment shown in FIG. 10c, the modules of the 2nd type converter block are connected to the 1st type converter block in series, while the N outputs of the 1st type converter block are connected to the N inputs of the second module of the 2nd type converter block, a subset of D outputs of which is connected to D inputs of the measurement block, the remaining N-D outputs of the second module of the 2nd type converter block are connected to the N-D inputs of the first module of the 2nd type converter block, the N-D outputs of which are connected to a subset of the N-D inputs of the 1st type converter block.

According to the embodiment shown in FIG. 10g, the modules of the 2nd type converter block are connected to the 1st type converter block in series, while the N outputs of the 1st type converter block are connected to the N inputs of the first module of the 2nd type converter block, the N outputs of which are connected to the N inputs of the second module of the 2nd type converter block, wherein a subset of D outputs of the second module of the 2nd type converter block is connected to the D inputs of the measurement block, and the remaining N-D outputs of the second module of the 2nd type converter block are connected to the N-D inputs of the 1st converter block type.

Type 1 converter blocks can be quantum computing systems based on the traditional gate model: optical qubits and linear optical circuits, superconducting circuits, ions and neutral atoms captured in traps, etc.

In fig. 11 shows examples of quantum circuits that can be used to implement type 2 converter blocks. In fig. Figure 11 (a) shows a type 2 converter, which consists of a set of programmable delays 30a, 30b, ... 30c. The amount of time delay introduced into the channel is set from the computer through lines 9a, 9b...9c. In fig. 11 (6) shows a type 2 converter, which, in addition to programmable delays, also contains a programmable permutation block 31. The permutation block 31 performs permutation conversions between channels in spatial encoding, i.e. states in different spatial channels entering it synchronously in one period of time are rearranged into states leaving it synchronously in one period of time. The specific transformation of the permutation is carried out in accordance with the control from the computer through lines 9. Temporary programmable delays 30a, 30b...30c, introduced into the channels after the permutation 31, can change the time channels of the converted states. In fig. 11 (c) shows a type 2 converter, which consists of a sequence of alternating blocks of permutations 31a, 31b... and independent time delays 30a, 30b...

The operating principle of the simplest programmable delay line 30 is illustrated in FIG. 12. The delay may introduce two preset static time delay values 32a or 32b depending on the position of the programmable delay input and output switches 33a and 33b, respectively. One of the two delays is implemented depending on the mode in which switches 33a and 33b are set. The specific implementation of switching between different delay lines depends on the physical platform on which the quantum computer is based.

Type 2 converters, which implement programmable delays and permutations, can also be manufactured on the basis of existing quantum systems or in full compatibility with them. For example, for an optical quantum computing platform in which quantum states are encoded into optical photons, delays can be implemented as programmable optical interferometers, such as fiber optic loops connected via programmable switches and/or dividers (H. Qi et al, " Linear multiportphotonic interferometers: loss analysis of temporally-encoded architectures"// arxiv:1812.07015 (2018); K.R. Motes at al, "Scalable boson sampling with time-bin encoding using a loop-based architecture" // Phys. Rev. Lett. V. 113, 120501 (2015)). Instead of optical fibers, resonators can be used, constructed from mirrors on an optical table or in a monolithic integrated optical design. In addition, for type 2 converters, you can use elements of quantum optical memory, which can store quantum optical states and, upon request, output these states to a type 1 converter. Unlike delay-based converters, in which photons propagate in fiber-optic or resonator loops after they arrive at the inputs, when states are written to quantum memory, states are converted into excitations of the material medium, for example, excitation of energy levels of metal vapors (K. F. Reim at al. "Quantum memory" // WO 2011073656A1 (2011)) or solid-state structure (A. Ortu et al. "Storage of photonic time-bin qubits for up to 20 ms in a rare-earth doped crystal" // NPJ Quantum Information v. 8, No. 29 (2022)). Thus, the input quantum states of photons, propagating at the speed of light, are converted into the quantum state of the material medium at rest. The output of states from quantum memory occurs through a control action that stimulates the conversion of excitation of the material environment into states of propagating photons. There are many types of quantum memory, which differ in the material quantum system used for storing information and the operating principle of the procedures for writing and reading quantum states.

In quantum computers based on encoding quantum states into states of material systems, the quantum memory necessary for constructing type 2 converters can also be implemented in practice. For example, the demonstrated storage time of quantum states of qubits at levels in ions in traps is tens of minutes, which is several orders of magnitude greater than the typical execution times of quantum logic operations on this platform (P. Want et al., “Single ion qubit with estimated coherence time exceeding one hour" // Nature Communications v. 12, No. 233 (2021)). The storage time of quantum states in color centers in diamond can exceed 10 milliseconds (D.D. Sukachov et al., “Silicon-Vacancy spin qubit in diamond: a quantum memory exceeding 10 ms with single-shot state readout” // Phys. Rev. Lett, v. 119, 223602 (2017)). Storage times in quantum memory are many orders of magnitude greater than the time spent performing quantum logical operations, i.e. Based on such quantum memory elements, it is possible to build quantum computers using the proposed architecture, which will implement delays long enough to implement multi-qubit and deep quantum logic circuits.

Example of a concrete implementation

To demonstrate the operation of the claimed invention, a linear optical quantum computer was used, in which quantum information is encoded into flying single photons, the conversion of the 1st type block was performed by multi-channel interferometers, and the conversion of the 2nd type block was performed by fiber delay lines with different lengths.

In fig. 13 shows diagrams of the optical installations used in the demonstration of the claimed invention. In fig. 13 (a) shows a circuit implementing a well-known quantum optical computer. This computer uses independent time delay lines that introduce equal delays. In fig. 13b shows a circuit that is the simplest version of a quantum computer made according to the proposed architecture. Its difference from the diagram shown in Fig. 13a, consists in the fact that in the delay lines the two channels are interchanged and the relative delay of the signals is performed. The main elements of the circuits were: a transformation block of the 1st type, which is a multichannel programmable 4-channel interferometer 34, a transformation block of the 2nd type, consisting of delay lines with different lengths of fiber lines 35 and consisting of two optical fibers 35a and 35b, a source of photon pairs 36, based on spontaneous parametric scattering, a measurement unit, consisting in the implemented example of two detectors of single photons 37a and 37b, computer 4. The circuits differ in the design of the type 2 converter unit, namely fiber delay lines.

An integrated optical chip created using femtosecond laser printing technology, which allows the production of both planar and three-dimensional integrated optical circuits, was used as a multichannel programmable interferometer. To create an integrated optical circuit chip, a quartz workpiece in the shape of a rectangle with a length of 10 cm, a width of 5 cm and a thickness of 0.5 cm was used. At the first stage of chip manufacturing, passive waveguide structures were created in the volume of the workpiece, forming a static optical circuit, which is a bundle of five waveguides, which were brought close to each other to form an interaction region where optical signal energies are transferred from waveguide to waveguide due to evanescent interaction between them, and were spaced apart to prevent interaction and introduce phase shifts in a programmable manner. The beginnings and ends of the waveguides were brought to the opposite ends of the glass workpiece to ensure the possibility of inserting and removing optical signals.

To implement programmable technology on a chip, phase shift elements were manufactured, with the help of which the interferometers were reconfigured. Phase shift elements were based on the thermo-optical effect. The elements of variable phase shifts were metal strips located above the sections of the waveguides on which it was necessary to implement these elements. When voltage was applied to the elements, the corresponding sections of the waveguides were heated, as a result of which the refractive index of the glass in this area changed, thus causing a phase shift relative to the unheated sections. Details of the fabrication technology used can be found in Z V. Dyakonov et al., “Reconfigurable photonics on a glass chip” // Phys. Rev. Applied, vol. 10, 044048 (2018).

Two single photons arriving simultaneously at the 2 inputs of the 4-channel interferometer 34 represent the input states that initialize the state of the quantum computer. The source of photon pairs 36 was the process of spontaneous parametric scattering occurring in a nonlinear beta-barium borate crystal. In the process of spontaneous parametric scattering, pairs of photons were born, each of which exited the crystal at its own angle, which made it possible to collect photons into fibers and feed them into the interferometer. A laser was used as pump, generating pulses at a central wavelength of 816 nm with a duration of ~100 fs and a repetition rate of f = 83 MHz. The pump radiation entered the frequency doubler, where its wavelength became 2 times less than the original one, after which it entered the nonlinear crystal. A pump pulse in a nonlinear crystal nondeterministically produced a pair of single photons at a wavelength of 816 nm in different spatial modes. Through the fiber-optic input, pairs of photons entered two channels of the interferometer. Because The pump wavelength entering the nonlinear crystal is much different from the wavelengths of the generated photon pairs, and the direction of propagation of the photons is different from the direction of propagation of the pump wave, no frequency filters were required.

Superconducting detectors were used for detection. Signals from the output of the interferometer were fed into the cryostat, in which the detectors were located, using fibers. The detection efficiency of single photons was -85%. Electrical signals from the electronic photocount reading system were supplied to personal computer 4 through electrical lines 38a and 38. The computer program processed the signals coming to the computer from detectors 37a and 37, respectively.

To implement the type 2 converter block, optical fibers were used, the ends of which were connected to the inputs and outputs of the integrated chip. In the diagram shown in FIG. 13a, the fibers had the same length, which ensured the synchronous arrival of photons from the source of photon pairs 36 and signals from the loop to the inputs of the chip. Thus, the length of the fibers was “2.4 m and was adjusted to give, with a high degree of accuracy (no worse than 0.1 mm), a complete round trip time for optical signals equal to the repetition period of the pump pulses For this purpose, the fiber was shortened/grinded several times (the fiber was taken deliberately longer than necessary). After each time, the fiber was connected to the chip and the possibility of observing the effect of quantum interference when single photons with frequency f arrived at the chip, which is only possible if the delayed photon or fiber enters the interferometer simultaneously with the newly generated one. Fiber shortening continued until the effect was observed. The polarization of the signals leaving the fiber was also monitored - it should always coincide with the polarization of the photons arriving at the interferometer. The required polarization was selected by a polarization controller.

In the diagram shown in FIG. 136, the fibers had different lengths. One of the fibers provided delay and had a length of ≈2.4 m, while the other fiber had a length of ≈4.8 m, providing a 2T delay of ≈ 24 ns. Precise adjustment of the fiber lengths was carried out using the same method as for the circuit shown in Fig. 13a. In addition, the outputs of the fibers were permuted relative to the inputs, thus implementing a permutation transformation.

To compare the complexity of the tasks performed by quantum computers with each other, the problem of preparing quantum states in space-time encoding and generating photocount statistics based on measurements of these states by single photon detectors was considered. Because In one step of the circuit operation, 2 spatial channels are measured, then the state prepared by the circuits in W steps of their operation can be described by a superposition along 2W space-time channels:

Where - Fock state with the number of photons in the j-th mode S _j (j=1…2W), - probability amplitude corresponding to the state The experiment analyzed probability distributions photocounts measured by single photon detectors at the output of a quantum circuit. To compare the information capacity of generated quantum states, Shannon entropy was calculated:

where PD is the probability distribution pi obtained in the experiment. The higher the Shannon entropy value, the more information the quantum state carries with the distribution (JV Stone, "Information theory: a tutorial introduction" // arxiv:1802.59068 (2018)).

In the two optical designs shown in FIG. 1 Pros and figs. 136, the same integrated chip was used: 4-channel interferometer 34. First, an experiment was performed with the circuit shown in FIG. 13a, for which a delay line of two identical fibers was connected to the chip (with the procedure for adjusting the length described earlier). W=5 steps of operation of the circuit were selected, thus measuring the statistics of photocounts for quantum states generated in 10 space-time channels at the output of the interferometer chip 34. For this, the laser used to pump the source of photon pairs was turned on and operated for ~100 periods (steps of the circuit operation) pulse sequence. Due to the high repetition rate of laser pulses, turning on the laser for a shorter amount of time was impossible due to the lack of technical means for this. Out of 100 steps, only those photocounts that were obtained in the first W steps were selected. This procedure was automatically repeated 1 million times in 10 different experiments, differing in the transfer matrix of the multichannel interferometer. In each new experiment, the transfer matrix of the multichannel interferometer was set anew by randomly setting phase shifts on the integrated chip. Thus, the PD ⁽¹⁾ probability distributions were obtained for the circuit shown in Fig. 13a.

A similar series of experiments was repeated for the circuit shown in FIG. 13. To do this, the feedback fiber lines in the setup were changed accordingly and exactly the same number of measurements and experiments were performed as in the previous setup. Probability distributions were obtained

Based on the obtained probability distributions, the average Shannon entropy values were calculated for the computers shown in Fig. 13a and fig. 13b. The entropy of photocounts obtained in the first scheme turned out to be equal to H5(PD ⁽¹⁾ )=65.3, while the entropy obtained in the second scheme implementing the proposed invention was equal to HS(PD ⁽²⁾ )=94.6.

Thus, the invention solves the problem of limited connectivity in closed-loop quantum computers. In addition, the demonstrated excess of the complexity of quantum states in a circuit using the proposed architecture of quantum computers, compared to a circuit based on a known architecture, indicates the need to implement deeper quantum circuits in a known architecture in order to achieve transformations that are implemented in the proposed architectures on the circuits with less depth.

Claims (42)

1. Quantum computing device including at least one block of the 1st type, having N inputs and N outputs, where N≥3, configured to synchronously convert signals described by quantum states in time τ, at least one block of the 2nd type, having M<N inputs and M outputs, where M≥2, configured to introduce time delays into signals described by quantum states arriving at its inputs, with the ability to rearrange the channels at the outputs relative to the channels at the entrances, a measurement block configured to measure and process measurement results of quantum states of signals arriving at the inputs of the block from N-M outputs of the 1st type block, an input signal generation unit configured to supply signals to N-M inputs of the 1st type block, described by identical quantum states, with a period T equal to or a multiple of τ, a computer configured to control transformations of at least one block of the 1st type and at least one block of the 2nd type, control the measurement block and process the measurement results of this block, in this case, M outputs of the 1st type block are connected to M inputs of the 2nd type block, and M outputs of the 2nd type block are connected to M inputs of the 1st type block, and N-M outputs of the 1st type block are connected to N-M inputs of the block measurements. 2. A quantum computing device according to claim 1, characterized in that it contains at least two blocks of the 1st type, with the blocks connected in series in such a way that the outputs from the previous block are connected to the corresponding inputs of the subsequent block. 3. Quantum computing device according to claim 1, characterized in that the 2nd type block is configured to change time delays in at least one spatial channel of this block. 4. Quantum computing device according to claim 1, characterized in that the 2nd type block is designed with the ability to introduce time delays that are multiples of T, and the possibility of their programmable change. 5. Quantum computing device according to claim 1, characterized in that at least one of the conversion blocks of the 1st and 2nd type, the measurement unit and the computer are configured to change the transformation of quantum states in a time less than T. 6. Quantum computing device according to claim 1, characterized in that the signals used are optical signals that encode quantum states, in this case, programmable interferometers are used as blocks of the 1st and 2nd types, where the 2nd type block additionally contains time delay loops. 7. Quantum computing device according to claim 6, characterized in that the 2nd type block contains quantum memory elements capable of recording and reading optical signals. 8. Quantum computing device according to claim 7, characterized in that the quantum memory element is a solid-state quantum system capable of storing quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a period of time of at least 2T. 9. Quantum computing device according to claim 7, characterized in that the quantum memory element is a quantum system implemented on the basis of alkali metal vapors, capable of storing quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a period of time not less than 2T. 10. Quantum computing device according to claim 7, characterized in that the quantum memory element is a quantum system of single neutral atoms in a trap or ions in a trap, configured to store quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a segment time not less than 2T. 11. Quantum computing device according to claim 1, characterized in that it is made on the basis of a quantum system of single neutral atoms in a trap, or on the basis of a quantum system of single ions in a trap, or on the basis of a quantum system of superconductor chains, or on the basis of a quantum system of quantum dots , or based on a quantum system of defects in silicon or diamond. 12. Quantum computing device according to claim 11, characterized in that the block of the 1st type and the block of the 2nd type are made on the basis of different quantum systems. 13. Quantum computing device according to claim 1, characterized in that the computer is designed to implement quantum variational algorithms. 14. Quantum computing device including at least one block of the 1st type, having N inputs and N outputs, where N≥3, configured to synchronously convert signals described by quantum states in time τ, at least one block of the 2nd type, having a total of N inputs and M<N outputs, where M≥2, containing at least 2 modules connected in parallel or in series and configured to introduce time delays into signals described by quantum states, coming from the corresponding outputs of the 1st type block to the inputs of the 2nd type block, with the possibility of rearranging the channels at the outputs relative to the channels at the inputs, at least one measurement block configured to measure the quantum states of signals arriving at D≥1 of its inputs from D outputs of the 2nd type block module, an input signal generation unit configured to supply signals to N-M inputs of the 1st type block, described by identical quantum states, with a period T equal to or a multiple of τ, a computer configured to control transformations of a block of the 1st type and a block of the 2nd type, control a measurement block and process the measurement results of this block. 15. Quantum computing device according to claim 14, characterized in that the number of modules in the 2nd type block is two, and they are connected to the 1st type block in parallel, while a subset of M1 outputs of the 1st type block is connected to M1 the inputs of the first module of the 2nd type block, the M1 outputs of which are connected to a subset of the M1 inputs of the 1st type block, while the remaining N-M1 outputs of the 1st type block are connected to the N-M1 inputs of the second module of the 2nd type block, The D outputs of the second module of the 2nd type block are connected to the D inputs of the measurement block, and the remaining M2=N-M1-D outputs of the second module of the 2nd type block are connected to the M2 inputs of the 1st type block. 16. Quantum computing device according to claim 14, characterized in that the number of modules in the 2nd type block is two, and they are connected to the 1st type block in series, while a subset of M1 outputs of the 1st type block is connected to the subset from the M1 inputs of the first module of the 2nd type block, the M1 outputs of which are connected to a subset of the M1 inputs of the 1st type block, while the remaining N-M1 outputs of the 1st type block are connected to the N-M1 inputs of the second module of the 2nd type block type, D outputs of which are connected to D inputs of the measurement block, while the remaining M2=N-M1-D outputs of the second module of the 2nd type block are connected to a subset of M2 inputs of the first module of the 2nd type block. 17. Quantum computing device according to claim 14, characterized in that the number of modules in the 2nd type block is two, and they are connected to the 1st type block in series, with N outputs of the 1st type block connected to N inputs of the second block module of the 2nd type, a subset of D outputs of which is connected to the D inputs of the measurement block, the remaining N-D outputs of the second module of the 2nd type block are connected to the N-D inputs of the first module of the 2nd type block, the N-D outputs of which are connected to a subset of N-D inputs block of the 1st type. 18. Quantum computing device according to claim 14, characterized in that the number of modules in the 2nd type block is two, and they are connected to the 1st type block in series, with N outputs of the 1st type block connected to N inputs of the first block module of the 2nd type, N outputs of which are connected to N inputs of the second module of the 2nd type block, while a subset of D outputs of the second module of the 2nd type block is connected to D inputs of the measurement block, and the remaining N-D outputs of the second module of block 2 of the 1st type are connected to the N-D inputs of the 1st type block. 19. Quantum computing device according to claim 14, characterized in that the N-M inputs of the block of the 1st type are supplied with signals described by identical quantum states, with a period T equal to or a multiple of m, while the time delays introduced by the block of the 2nd type , are multiples of T and are made with the possibility of programmable change. 20. Quantum computing device according to claim 14, characterized in that the computer is configured to change the transformation of quantum states performed by the 1st type block in a time less than T. 21. Quantum computing device according to claim 14, characterized in that the computer is configured to change the basis of measurements performed by the measurement unit in a time less than T. 22. Quantum computing device according to claim 14, characterized in that optical signals that encode quantum states are used as signals, while programmable interferometers are used as blocks of the 1st and 2nd types, where a block of the 2nd type is additionally contains time delay loops. 23. Quantum computing device according to claim 22, characterized in that the 2nd type block contains quantum memory elements capable of recording and reading optical signals. 24. Quantum computing device according to claim 23, characterized in that the quantum memory element is a solid-state quantum system in which it is possible to store quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a period of time of at least 2T. 25. Quantum computing device according to claim 23, characterized in that the quantum memory element is a quantum system implemented on the basis of alkali metal vapors, capable of storing quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a period of time not less than 2T. 26. Quantum computing device according to claim 24, characterized in that the quantum memory element is a quantum system of single neutral atoms in a trap or ions in a trap, in which it is possible to store quantum states of incoming signals in the form of excitation of quantum states of this quantum system over a segment time not less than 2T. 27. Quantum computing device according to claim 14, characterized in that it is made on the basis of a quantum system of single neutral atoms in a trap, or on the basis of a quantum system of single ions in a trap, or on the basis of a quantum system of superconductor chains, or on the basis of a quantum system of quantum dots , or based on a quantum system of defects in silicon or diamond. 28. Quantum computing device according to claim 14, characterized in that the block of the 1st type and blocks of the 2nd type are made on the basis of different quantum systems. 29. Quantum computing device according to claim 14, characterized in that blocks of the 2nd type are made on the basis of different quantum systems. 30. Quantum computing device according to claim 14, characterized in that the computer is configured to execute quantum variational algorithms.