RU2819142C1 - Method of transmitting discrete messages with encryption of codes and a system for its implementation - Google Patents

Abstract

FIELD: radio engineering and communication.

SUBSTANCE: invention relates to means of secret transmission of messages using a plurality of noise-like signals (NLS). Method consists in transmission of message elements by one of NLS ensemble. System comprises a converter of input discrete messages, a unit of switches, a NLS generator, a control unit, a communication channel, a matched filter, a resolver, code encryption key generator, message element restorer, decoder, decryption key generator.

EFFECT: higher security of message transmission owing to encryption of the NLS number, providing energy-secret transmission of messages to a user over a communication channel in the presence of noise and interference.

14 cl, 7 dwg

Description

Field of technology.

The invention relates to the field of radio engineering, computer technology, communications and systems for noise-resistant secret transmission of discrete messages in the presence of noise using a finite set of noise-like signals (NLS).

State of the art. There is a known method of transmitting information [1], in which the broadband carrier is a random process, modulated by changing the multidimensional probability distribution function in accordance with the information signal. The received carrier at the receiving end is demodulated by measuring said multivariate probability distribution function. The disadvantage of this method is the lack of the possibility of energetically secretive transmission of information and the lack of optimal detection and discrimination of signals in the presence (against the background) of noise (therefore, the transmission of signals in an optimal manner is not ensured).

There is a known method for secretly transmitting information [2]. The useful signal is converted into binary code and, through the first chaotic generator, the initial deterministic chaotic signal is generated, and the parameters of the chaotic signal are modulated by this useful digital signal. The received signal affects two chaotic oscillators, which are selected to provide generalized synchronization with the first chaotic oscillator. The useful signal disrupts the synchronization of one of the generators, which makes it possible, after subtracting the signals of the first and second generators, to determine the presence of this useful digital signal. Before transmission over the communication channel, the signal of the first chaotic generator is summed with the noise signal of the noise generator, which significantly exceeds the signal level of the chaotic generator itself. Energy secrecy is ensured. The disadvantage of this method is the inability to optimally detect and distinguish signals in the presence of noise in an optimal manner.

The method of covert information transmission [3] differs from the method [2] in that the characteristics of the noise generator are modulated by a digital or analog signal containing a false, insignificant or open information message. The disadvantages of this method are the same as those of method [2].

There is a known method for transmitting discrete information signals [4]. The method implements the mapping of symbols to be transmitted to disturbances in the physical medium and the detection of these disturbances in the signal-noise mixture on the receiving side; segments of periodic oscillations with a length equal to the length of the symbols transmitted through the propagation medium directly or used as modulating signals are used as generated disturbances. On the receiving side, the signal-noise mixture is divided into sections, the pseudo-spectrum of the resulting sections of the signal-noise mixture is assessed, and if a pseudo-spectral peak is detected, a decision is made about the presence of the transmitted symbol in this section. The disadvantage of this method is the lack of the possibility of energy-secret data transmission over a communication channel, since the signals for analyzing the pseudo-spectrum on the receiving side must have a sufficient level. In addition, the transmission of signals in an optimal manner is not ensured due to the lack of optimal detection and discrimination of signals in the presence of noise.

A coherent information transmission system is known [5]. A finite set of chaotic signals is used as a wide-spectrum NPS. The system contains transmitting and receiving sides. On the transmitting side, chaotic signals are formed, multiplied with the information sequence so that each bit is transmitted by its own segment of the chaotic signal, and synchronization of these signals on the transmitting and receiving sides is required. Copies of chaotic signals to isolate the information sequence are generated from the disk on the receiving side. The secrecy of the signal structure is ensured. The disadvantage of the analogue is the need to ensure synchronization of chaotic signals on the receiving and transmitting sides, which requires the use of signals of a sufficient level, but this leads to a lack of energy secrecy in the operation of the system. Synchronization also requires time, which reduces the performance of the system, since it is necessary to use an NPS with a wide spectrum, but the wider the spectrum, the longer the detection and synchronization time. In this case, system coherence only means the presence of synchronization of chaotic signals on the transmitting and receiving sides and does not ensure optimal signal processing (detection and discrimination) in the presence of noise. There is no possibility of varying the carrier signals on the transmitting side.

The prototype selected is a method for transmitting discrete messages and a system for its implementation [6, p. 16, 17]. The method consists in the fact that the information source (IS) generates at the input a sequence of pulses with a duration of T, corresponding to binary numbers ("1" and "0"), arriving at the input of the phase modulator; the NPS in the form of a phase-shifted modulator is received at its second input with a period T signal (FMS) of the same duration (represented by N=13 - Barker element code (KB)) from the FMS generator (its operation is controlled by a synchronizer). At the output of the phase modulator, KBs are formed, and in the interval corresponding to the AI signal equal to “1”, the PMS is not inverted by the phase detector, and in the interval where the AI signal is equal to “0”, the used KB is inverted in phase. The result is a sequence of ShPS in the form of KB (each of them is inverted or not), carrying information symbols. This sequence is fed to a modulator that modulates the carrier oscillations, which are created by a low carrier frequency generator. Modulated oscillations are amplified in power and radiated into space (the physical environment of the communication channel).

In the receiver, the SPS sequence is transferred to an intermediate frequency using a mixer and local oscillator, after which it is amplified. To implement synchronous reception, the FMS is searched for by frequency and time of arrival of signals, and signals are accumulated to ensure stable synchronization. For this purpose, a matched filter (MF), a synchronizer and a decision device are used. It is noted that the specified broadband receiver with a large base is a complex device and entering into synchronism requires a time interval that depends on the base of the broadband. After the search is completed and synchronization is achieved, an information sequence is formed in the form of binary symbols, which is transmitted to the output to the information recipient (PI).

The system contains in the transmitter an information source, a phase modulator, an NPS generator in the form of an FMS, a synchronizer, a modulator, a low-frequency generator, a power amplifier, and a communication channel. The receiver includes a mixer, local oscillator, intermediate frequency amplifier, SF, decision device, synchronizer, PI.

The prototype system is built and operates based on the described method. From the AI, the first input of the phase modulator receives an information sequence of binary “1” and “0”, and the second input receives the FMS from a generator controlled by synchronizer C ₁ (it generates control signals). The generator creates a sequence of ShPS in the form of an FMS. If a logical “1” is received from the AI, then the FMS at the output of the phase modulator does not change, and when “0” is supplied, then the FMS is inverted at the current interval. Thus, binary information symbols are transferred to the NPS. Next, the modulator carries out balanced modulation of the oscillations (the signals come from the low-frequency generator). The modulator implements the required inversion of the phase of the carrier oscillation when varying the binary signals of the AI. The received signals are amplified in power by an amplifier and radiated into space through an antenna (transmitted via a communication channel). Further operation of the system is described in the method.

The disadvantages of the prototype method and system are the need to search and synchronize signals in the transmitter and receiver. This reduces the performance of the system as a whole. Before transmitting message signals, it is necessary to spend time on preparation, and the higher the energy secrecy of the system, the lower the signal power at the input, the longer the detection time is required to search and synchronize signals [6, p. 9]. In addition, when synchronizing, it is necessary to use a system for searching and entering into synchronism, which reduces energy efficiency due to the complexity of the design of the prototype system [6, p. 16, 17]. At the same time, the operating frequency band is not used effectively. The main disadvantage should be considered the lack of a system for varying the choice of ShPS code numbers, which determines the essence of the code encryption system.

In discrete message transmission systems, message elements are logical “1” and “0”, and in computing systems data is represented in the form of bytes, for which pulses of different polarity “±1” are used.

Brief summary of the essence and composition of the claimed method and system. Let, for example, at the input of the system, there are elements of discrete messages in the form of logical “1” or “0”. There are g=2 different SPS (denoted S ₁ , S ₂ ) for each of which the level of side peaks (SPP) of the autocorrelation function (ACF) is not more than a positive number R, and the SPS values of the cross-correlation function (CCF) of these SPS is not more than a positive number W. Each “1” pulse is assigned to S ₁ , and any “0” pulse is assigned to St. These ShPS are energetically secretly and optimally transmitted to the receiver. With the help of two SFs, the signals transmitted over the communication channel (CC) are different [6, p. 158, 159] due to the restrictions imposed on the UBP of the ACF and VKF. At the outputs of different SF and threshold devices, pulses are generated, indicating that the receiver has received signals S ₁ or S ₂ . These pulses trigger, respectively, either shaper “1” or shaper “0” and the signals transmitted to the receiver are reproduced at the receiver output.

This approach is also applicable for the case when the input discrete message is divided into groups, blocks, for example, eight pulses (standard bytes). Each block in the form of a byte corresponds to one of the numbers 0, ..., 255 (total g1=256 numerical values for all elements of the coding system). It is required to use g=256 NPS (designated as S ₁ , S ₂ , ..., S _g ) with the specified restrictions on the UPS, which are one-to-one associated with blocks in the form of bytes with the same numerical values. These NPS are energetically secretly, in an optimal way, including in the presence of noise, transmitted to the receiving part. Using a set of SFs, they are detected against a background of noise and differ due to restrictions on the UBP of the ACF and VCF. Depending on the output of which SF a signal is detected that exceeds the threshold level, taking into account one-to-one, the corresponding byte is restored and transmitted to the PI.

The g=256 SPS required for operation are selected from a more extensive list (formula) of suitable signals, including g3≥g=g1 signals. The rule for selecting the required number of signals from among the available ones determines the order of encryption of the codes, specified by the user.

Thus, covert transmission with increased speed is ensured due to the absence of the need for signal synchronization; the design is simplified due to the absence of a signal search system. In addition, the NPS, which are assigned to blocks (bytes), have a longer duration than the KB in the prototype, therefore, in the claimed method and system, the signals occupy a smaller frequency band, that is, the frequency band within which the system operates is used more efficiently. Covert transmission with increased speed is provided due to the absence of the need for signal synchronization, the design is simplified due to the absence of a signal search system, and energy efficiency is increased.

Initially, you need to select characters and determine their number g1 in the coding system. In general, in the claimed method, elements of discrete messages can be grouped not only one or eight at a time, but also into an arbitrary number of pulses g2, with g2=log2 g1 (rounding up to the nearest integer), where g1 is the number of symbols in the system coding, g2 - the number of elements (pulses, bits) of discrete messages in blocks.

Secrecy of signal transmission means [6, p. 8, 9], that it is necessary to use special methods and devices to detect the fact of signal transmission in the presence of noise, and it is also necessary to measure the basic parameters of the signals. The optimality of signal processing in the presence of noise remains valid even in the presence of a wide range of interference (narrowband, pulsed, structural) [6, p. 7].

For example, R-codes [7, 8] and signals based on them, which are a type of FMS, can be used as NPS.

Some information about R codes and ensembles. ShPS [6], which have well-known advantages, are widely used in control, communication and radar systems. A type of ShPS are FMS. They consist of a sequence of N radio pulses with the same frequency and amplitude (we consider it equal to unity). The sequence of radio pulses with different initial phases is characterized by a binary code sequence or simply code G. In this case, the FMS based on these codes [7], in which the autocorrelation function (ACF) in the region of the side peaks varies within ±R (0≤R≤N- 1, R - integer), are called signals of the R kind (FMS-R). The set of g codes G=G ^x _R,N , (x=1,..., g), corresponding to such signals, is called R-codes (these are binary codes for which the ACF in the region of the side peaks varies within ±R, that is R is the highest permissible value of the side peaks of the ACF module). For a few CBs R=1. The largest value (peak) of the ACF modulus of such N-element codes is denoted by u _m and u _m - N, and the relative level of the side peaks (SPE) of the ACF is equal to B ₁ =R IN. The FMS base is equal to B=N, the signal energy E _{c is} directly proportional to N, that is, u _m is proportional to E _c . A sign of a signal being noisy is the validity of the condition that the base is large (B>>1) [6]. Pairs of codes are characterized by the largest value of the modulus of the cross-correlation function (CCF), designated W(1≤W≤N-1, W - integer). Fair: R<u _m , W<u _m .

FMS-R based on binary R codes are pulse signals. For optimal detection and discrimination between these codes and signals in the presence of noise, well-known methods and schemes (matched filters and correlators) are used [6].

Some sets of SPS have certain properties that allow us to consider them together as ensembles for constructing alphabets. The works [9-11] consider the issues of finding R-codes.

The symbol T indicates the duration of each of the N FMS-R radio pulses. The initial phases can be 0 or π (180°), and codes are usually represented as a sequence of coefficients, respectively (+1,-1), for example, (1,-1,-1,-1,-1,1) for N= 6; R=2. In general, the initial phases of radio pulses can be equal to ϕ ₀ +0, when the code coefficient is equal to (+1), or ϕ ₀ +π, in the case when the code coefficient is equal to (-1), where ϕ ₀ is a fixed component of the specified initial phase (the main thing is that the phase difference is 0 or k).

Further, signals based on binary codes are considered to be those BPSs that consist of radio pulses with initial phases equal to (ϕ ₀ +0) or (ϕ ₀ +π), and no restrictions are imposed on changes in the amplitudes and frequencies of radio pulses, but restrictions are introduced on the UBP of the ACF and VKF.

A variety of binary pulse codes are presented, in which the UBP ACF and VKF satisfy certain requirements, in the form

Where - binary code;

- coefficients of the x-th code of the ensemble;

x - code numbering index,

g - the number of codes in the set or signals based on them;

R is the highest permissible value of the side peaks of the ACF module, R - integer;

N is the number of coefficients in codes and in signals based on them.

An ensemble is a name given to a set of codes with introduced restrictions on the UBP of AKF and VKF. For example, for codes with

The restrictions on the ACF and VCF UBPs are formulated analytically [7, 8]. At moments t _k =k⋅T, where k=1,..., N-1, counted from the beginning of the ACF (k=0), the values of the ACF module take extreme or zero values and are equal to N at k = N.

The values of the TCF modulus of pairs of ensemble codes with indices “x” and “y” are considered at moments t _k =k⋅T, counted from the beginning of the TCF. Ensemble codes with restrictions on the UBP ACF and VKF according to [7-11] can be represented in the form of inequalities with respect to the coefficients:

Where - coefficients of the i-th code of the ensemble;

N is the number of coefficients in the ensemble codes or in signals based on them;

k - index of numbering of samples of time instants of the autocorrelation function;

R - permissible ACF UBP, specified by the user, R - integer;

g is the number of codes or signals based on them in the ensemble;

Where - coefficients of the x-th and y-th codes of the ensemble;

- indices of various codes in the ensemble, taking values from 1 to g;

g is the number of codes in the ensemble or signals based on them;

N is the number of coefficients in the ensemble codes or in signals based on them;

k - index of numbering of samples of time instants of the cross-correlation function;

W - permissible level of side peaks of the cross-correlation function specified by the user, W - integer;

g = g1 - number of characters in the coding system.

Ensemble codes (1) - (3) are a special case of the ShPS S ₁ , S ₂ , ..., S _g and are generated by the ShPS generator. The parameters N, R, W and g are interdependent.

When transmitting discrete messages in computer science and computer technology, each byte corresponds to a specific character of the coding system. If each character and, accordingly, byte is associated with a code from the ensemble, then an alphabet will be obtained. When using the well-known ASCII coding system (American Standard Code for Information Interchange) [12], consisting of g1 = 256 characters, an ensemble of codes of the same number g = g1 is required [9 - 11]. Characters correspond to numeric values ranging from 0 to 255, which, as we know, are represented by a set of eight bits that make up a byte. In general, for a g1 character encoding system, it is required to use g2=log ₂ g1 elements (bits, pulses) in each block. For a coding system of two symbols (g1=2) the block consists of a single element (g2=1) taking two values, an ensemble of two codes is required. In addition to symbols, the coding system can determine the correspondence of the levels of an arbitrary signal at certain times and their code values in the form of bytes or blocks.

The user (recipient) can create an encoding system at his own discretion, including as elements not only various symbols, but also their combinations, for example, syllables, words, sentences, media files.

Some terms used to simplify the description.

Alphabet is a one-to-one correspondence between the elements of a coding system and the codes or signals that make up the ensemble.

An ensemble is a set of binary codes or pulse signals based on them, for which restrictions are introduced on the UBP of the ACF (R) and VKF (W).

Signals based on binary codes are pulse signals consisting of radio pulses, the initial phases of which are equal to (ϕ ₀ +0) or (ϕ ₀ +π), where ϕ ₀ is a fixed component of the specified initial phase, and requirements for changes in the amplitude and frequency of radio pulses are not imposed; restrictions (2), (3) are introduced for them on the UBP of ACF and VKF. If the amplitudes and frequencies are constant, then there are FMS-R ensembles.

A block is a collection of a finite number of elements of a discrete message, for example, a block of eight bits is a byte.

Linganum is a user-specified function (rule, table) that defines a one-to-one correspondence between sets of numbers (0;1;…; g1-1) and a set of symbols of the selected coding system. ASCII is a special case of linganum.

A form is a set of codes for which a one-to-one correspondence of integers in order from 1 to g3 and ensemble codes (1) is specified, for example, we write, with g3=259.

A functional group is a set of elements of the same type, for example, a group of lines (group communication lines), input/output conductors, devices that perform the same operations (functions).

Renumbering of blocks (bytes) - changing the order of elements (bits), for example, logical ones and zeros, or positive and negative logical ones included in a block (byte) so that the numerical value determined by the elements of the block (byte) becomes equal to the assigned one number (key).

Comment. The elements of discrete messages that make up blocks can be logical ones and zeros, or positive and negative logical ones. The numerical values of blocks are determined by a sequence of elements that are considered as digits of the binary number system, and if positive and negative logical units are selected as elements, then when calculating the numerical values of a block, negative logical ones are replaced by zeros.

Sorting is the operation of transforming one finite sequence of numerical values into another so that the indices of the ordinal numbers of the elements of the original sequence are reduced by one and swapped with the values of the elements of this sequence, the ordinal numbers of the new numerical sequence are increased by one and the elements of the resulting sequence with their changed ordinal numbers are arranged in ascending order of these numbers.

Sorting is used to determine the linganum for the recovery of discrete messages and decryption keys based on the type of linganum and encryption keys, which allows the same operations and schemes to be used during decryption.

The sorting order is determined by the fact that the values of the original sequence must be replaced with new ones, and also take into account that these values and their indices differ by one (for example, in ASCII the indices vary as 1, 2, 3, ..., and the numeric values of the characters change in ascending order 0, 1, 2, …). To do this, the indices of the original sequence before the specified replacement are reduced by one, and the indices of the new sequence must be increased by one.

An example of single-operation (one-time) sorting. Initial sequence given written taking into account the serial number and meaning of the elements, using the correspondence sign . That is (ordinal number (original value → new value)): Another possible entry: (elements g1=6, and their values vary from 0 to g1-1=5). Sorting to determine the desired sequence: decreasing the index of the sequence number by one - swapping indices and values - increasing the indices of the new sequence by one - arrangement of elements in ascending order of indices - Another entry through the mark of conformity for verification: There is an unambiguous relationship between the obtained result and the original sequence presented above through the sign of correspondence (renumbering)

Initial sequence defines the operation of establishing a one-to-one correspondence between a finite set of numerical values (sequence elements) and a set of indices used for numbering.

For the second example, we assume that there are g3=10 numbers from 0 to g3-1 (that is, 0, ..., 9), from which g1=6 different values are selected and, for example, a sequence is created (indices vary from 1 to g1=6). Through the correspondence sign this can be represented as: Sorting operations: that is Reconciliation of elements confirms the accuracy of the result of the sorting operation. The index values of the sequence obtained after convolution vary within a wider range, from 1 to g3=10; some element values do not need to be entered, although their total number (g1=6) is unchanged. This can be written so that the indices of g1 elements vary in interval Elements with missing indexes are not specified; a space is assumed.

Representation of the encryption operation by renumbering the bytes. A variant description is presented for the case when a block corresponds to a byte. The bytes correspond to g1 numeric values (0,...,255), to which g codes from a form containing g3 codes are assigned one-to-one, and (there are more codes in the form than there are characters in the g1 coding system). As a result, wide variations in this one-to-one correspondence are possible. This process is determined by the code encryption keys, designated as follows:

sequence of values in binary and decimal representation (the first two and last bytes are written out), each value is one of the positive integers from 0 to (g3-1), used only once, where g1 is the number of characters in the data encoding system, g3 is the number codes or ShPS based on them in the form.

Some numbers remain unused (of the possible g3 values of code numbers from the form, only values by the number of characters in the coding system). For binary counting system specifies the i-th bit of the j-th byte. As follows from the example given with the indices of the elements in formulas (9) vary from 1 to g1. The values of the sequence M are arbitrarily specified by the user; they determine the values of the encryption keys for the code numbers, to obtain which the generator of the same name is used. The maximum numeric value can be (g3-1) and the highest index value is g1. Designation introduced:

input discrete messages in binary and decimal systems (only the first two bytes are written). The bytes of messages (5) in accordance with the encryption keys M of formula (4) are associated with NPS codes (1), which are transmitted to the input of the communication channel. Output discrete messages on the receiving side:

output data in binary and decimal systems (the first two bytes are written out). These values can be obtained using decryption keys generated by a generator of the same name. The decryption keys are obtained by sorting the encryption keys according to the rules outlined above.

The codes received at the receiving side are detected and recognition signals, individual for each code, are generated, according to which the corresponding blocks (bytes) encrypted with code encryption keys are regenerated:

discrete messages restored on the receiving side, elements written in binary and decimal systems (the first two bytes are written out), intended for further decryption;

i, j are bit and byte numbering indices.

Sequence values like the code encryption keys in formula (4), they take the values of positive integers from the interval and they are all different. Values in sequence are the initial signals of the decryption procedure, generated by the discrete message restorer. That is, the specified elements of the sequence are equal:

Where - block numbering index;

- value of the j-th block of input discrete messages;

- the value of the j-th block after encryption, varying from 0 to g3-1;

- sequence of key values generated by the code encryption key generator;

g1 - number of characters in the selected encoding system;

g3 is the number of selected noise-like signals placed in the form.

Decryption keys, for example, are specified as elements of the sequence:

sequence of linganum values for data recovery in binary and decimal representation (the first two and last bytes), each value in brackets in decimal representation is a positive integer from 0 to (g1-1), used in composing the linganum only once; g1 is the number of characters in the data coding system, g3 is the number of codes and signals based on them in the form. This decryption lingo is used as decryption keys in a corresponding generator, and decryption is realized by a switch control device and a switch block. In general, the sequence of decryption keys M' obtained after sorting, by analogy with the previously presented example related to has g1 elements, the indices are determined by specific values of the encryption keys, the values of the indices j take values from the interval from one to g3. Therefore, the sequence entry in general looks like:

The decryption results are obtained from formulas (7), (8) according to the rules:

decryption operations by replacing numeric values,

Where - byte numbering index;

- the value of the j-th byte before decrypting the code numbers, varying from 0 to g3-1;

- the value of the j-th byte of the system’s output discrete messages;

- sequence of decryption key values. To implement data operations in the claimed system, devices are used that have several inputs or outputs, for which, for the purpose of convenience of presentation, the following numbering has been introduced. Switch block - the first inputs are connected to the outputs of the discrete input message converter; the second group of inputs is connected to the functional groups of outputs of the switch control unit; Decryptor - the first input is the one that is connected to the output of the decryption key generator; the second input is the one that is connected to the restorer of discrete message elements; Decryption logical device - the first input is the one that is connected to the output of the decryption key converter; the second input is the one connected to the second input of the decryptor; Switches of the switch block - the first and second inputs of the switches are connected to the corresponding first and second inputs of the switch block.

The essence of the invention. The task to be solved by the claimed invention of the method and device for its implementation is to ensure the security of discrete messages from external influences when they are transmitted over a communication channel.

The problem is solved due to the fact that the method of transmitting discrete messages with encrypted codes, which consist of elements in the form of logical ones and zeros, or of positive and negative logical ones, includes on the transmitting side the conversion of one type of discrete message into a broadband signal and conversion elements of another type of this discrete message into another broadband signal, transmitting this sequence of broadband signals over a communication channel, receiving and transmitting broadband signals, followed by a coordinated filtering operation on the receiving side, comparing the received signal with a threshold level, as new features such operations as

selecting g1 different elements for the discrete message coding system and assigning to each of them a numerical value α varying from zero to (g1-1), grouping sequential elements of the input discrete message into blocks of duration T _b of g2 elements, where g2=log ₂ g1 rounded up to the nearest whole number or

setting the parameter g2 to a value equal to the number of elements in the block of the input encrypted discrete message or redundantly encoded message, with g1=2 ^a , where a=g2,

introducing a correspondence between each numeric value in the selected coding system and a set of elements of any block of grouped discrete messages, selection different noise-like signals, the level of the side peaks of the autocorrelation and cross-correlation functions of which is no more than positive numbers R and W, respectively, where R and W are numbers less than the largest value u _m of the modulus of the autocorrelation functions of these noise-like signals,

numbering of selected noise-like signals sequentially with integers from 1 to g3 and their location in the form,

composing encryption keys as a sequence , so that each value of this sequence A, specified by the user, is equal to the sequence number of one of the noise-like signals from the form reduced by one, is one of the positive integers from 0 to (g3-1) and is used only once, where g1 is the number of characters in coding system, g3 - the number of noise-like signals entered into the form,

establishing a one-to-one correspondence between each block of input discrete messages with a numerical value α and one of the noise-like signals from the form with number , designated

the location of each of the selected noise-like signals within the interval T _b following the interval where the block to which the corresponding noise-like signal is assigned is located, the creation of a sequence of noise-like signals S _A+1 selected in this way, which corresponds to a sequence of blocks from grouped elements of the input discrete messages,

transmitting a sequence of noise-like signals through the propagation medium of a communication channel directly or using them as modulating signals, implementing coordinated filtering of the received sequence with all g3 different optimal filters, each of which is matched with one of the noise-like signals included in the form,

comparison of each of the output signals of the matched filters with the corresponding threshold level U _n , which must be less than the largest values at the output of the matched filters when there is an NPS at the input of the filter with which this filter is matched, at the same time, the threshold levels U _n are selected greater than the largest of the numbers R and W,

checking whether each of the signals received after performing coordinated filtering of all received NPS, having the A+1th serial number in the form, exceeds the value of the corresponding threshold level U _p and in case of such an excess, generating recognition signals received noise-like signal at the A+1th output of the decision device,

formation based on recognition signals discrete message blocks the values and arrangement of elements of which correspond to the numerical values of A+1,

defining decryption keys as sequence elements each value of which is one of the positive integers from 0 to (g1-1), used in the sequence only once, and

elements of the sequence M' are obtained in such a way that the sequence numbers jx of the elements of the sequence of encryption keys are decreased by one and swapped with the values of the elements of this sequence, the serial numbers of this new created numerical sequence are increased by one and the elements of the resulting sequence with their changed serial numbers are arranged in ascending order of these numbers,

carrying out decryption by changing the arrangement of elements of each block of discrete messages so positive integers to which the blocks correspond are replaced by positive integer numbers specified by the decryption keys, which determine the values of X _out. and X _out is chosen so that if - block numbering index (bytes);

transmission of decrypted discrete messages _X out to the output of the recipient.

The proposed method is illustrated by diagrams in Fig. 1, 2. Explanation using an example. Let there be an input block (byte) with a numerical value α=0, to which, in accordance with the code encryption keys, the tenth NPS from the form is assigned. After coordinated filtering, a recognition signal is generated the tenth ShPS, which starts the block (byte) shaper with A+1=10. The decryptor transforms this block (byte) in accordance with the decryption keys into a block (byte) with α=0. Consequently, blocks of elements of the input discrete message are uniquely restored at the output. Note that counting the numerical values of blocks consisting of “±1” elements is possible if the logical “-1” is replaced by zero.

Notes. 1) If there is a recognition signal based on code decryption keys, it is possible to re-switch the inputs of the output discrete message generators that form the output signals, or it is permissible to generate undecrypted discrete messages that are renumbered into output messages using the decryption keys. The claimed system outlines the second approach; 2) Encryption of codes means encryption of the selection of ShPS numbers from the form.

The solution to the problem to which the invention is aimed is implemented due to the fact that the system for implementing the method of transmitting discrete messages with encrypted codes contains a generator of noise-like signals, a communication channel, a matched filter, a decision device, as new features are introduced, a converter of input discrete messages, a block of switches , switch control unit, decryption key generator, code encryption key generator, discrete message elements restorer, decryptor, wherein the input of the input discrete message converter is connected to the input of the discrete message transmission system with code encryption,

The converter of input discrete messages contains g1 outputs, which are connected respectively to the same number of inputs of the first functional group of inputs of the switch block, the second functional group of inputs of the switch block is connected to the functional group of outputs of the switch control block, the functional group of inputs of this block is connected to the outputs of the code encryption key generator , the functional groups of outputs of the switch block are connected to the functional group of inputs of the noise-like signal generator, the output of this generator is connected to the input of the communication channel, the output of which is connected to the input of the matched filter containing g3 outputs connected to the same number of inputs of the decision device having g1 outputs connected to the same number of inputs of the discrete message element restorer, the output of which is connected to the second input of the decryptor, the first input of the decryptor is connected to the output of the decryption key generator, the output of the decryptor is connected to the output of the entire system, while the code encryption key generator generates signals corresponding to the elements of the sequence M _j j = 1, 2, …, g1, g1 - number of characters in the selected coding system,

the decryption key generator generates signals corresponding to the elements of formula (8) of the sequence where g3 is the total number of codes in the ensemble or noise-like signals based on them entered into the form, each value is a positive integer from 0 to (g1-1), used only once, g1 is the number of symbols in the data encoding system, decryption key values obtained in such a way that

the serial numbers jx of the elements of the sequence of encryption keys for codes M are reduced by one and swapped with the values of the elements of this sequence, the serial numbers of the new numerical sequence are increased by one and the elements of the resulting sequence with their changed serial numbers are arranged in ascending order of these numbers, the decoder generates signals X _{out j} , where j = 1, 2, …, based on conditions (9), the generator of noise-like signals is a functional group of g=g3 code generators for an ensemble of noise-like signals or signals based on them, in which the level of the side peaks of the autocorrelation function of each signal is not exceeds R < _um - the largest value of the modulus of the autocorrelation functions of these noise-like signals, the level of the side peaks of the cross-correlation function of each noise-like signal with all other (g3 -1) generated signals does not exceed W < _um , R and W are positive numbers, together with those

all g3 inputs of the code generators of the ensemble of noise-like signals or signals based on them are inputs of the functional group of these generators, the outputs of the code generators of the ensemble of noise-like signals or signals based on them are connected in parallel and constitute the output of the functional group of these generators;

the switch block contains a functional group of g1 switches, the first inputs of which are connected to the corresponding inputs of the first functional group of inputs of the switch block, the second inputs of these switches represent functional groups of g3 inputs and are connected to the corresponding inputs of the second functional groups of inputs of the switch block, g3 outputs of each of the switches form functional groups and are connected to the outputs of the switch block; the switch control unit contains a functional group of g1 control generators, the inputs of which are connected to the inputs of the switch control unit (they are connected to the corresponding outputs of the code encryption key generator), the outputs of each control generator form a functional group of g3 outputs connected to the corresponding outputs of the switch control unit; a matched filter is a functional group of g3 matched filters, the inputs of which are connected in parallel, the impulse responses of each of the matched filters are optimal for one of the various signals of the noise-like signal generator, the inputs and outputs of the matched filters are the inputs and outputs of a functional group of these filters;

the solver for analyzing the output signals of each matched filter is a functional group of g3 solvers, the inputs and outputs of which are the inputs and outputs of the functional group; The converter of the input discrete messages contains a logical converter device and a converter interface device, the input of the converter interface device is connected to the input of the discrete message transmission system with code encryption, the output of the interface device is connected to the input of the converter logical device, the outputs of which represent a functional group g1 of outputs connected to the outputs converter of input discrete messages; the decryptor contains a decryption key converter, a decryption logical device and a decryptor interface device;

the input of the decryption key converter is the first input of the decryptor, the output of the decryption key converter is connected to the first input of the logical decryption device, the second input of the logical decryption device is the second input of the decryptor, the output of the logical decryption device is connected to the input of the decryptor mating device, the output of which is connected to the output of the discrete transmission system messages.

The presented set of essential features allows us to obtain a technical result and achieve the purpose of the invention, which is to increase the security of the transmission of discrete messages by encrypting the code numbers used to transmit blocks over the communication channel, to ensure energy-secret and optimal transmission of discrete messages, including in the presence noise

The proposed system is illustrated by a block diagram (Fig. 3). It follows from it that the input discrete messages (5) using code encryption keys (4) are put into a one-to-one correspondence with the NPS formulas (1-3), which are transmitted via the CS from the transmitting to the receiving side of the system, where they are optimally detected and recognized, As a result, appropriate recognition signals are generated. Based on these signals, blocks are restored (formula (7)), encrypted on the transmitting side with code encryption keys (formula (4)). Block elements are decrypted using decryption keys (formula (8)) according to rules (9) and output signals (6) corresponding to input signals (5) are generated.

List of figures in a graphic image.

Fig. 1 - diagrams explaining the method of transmitting discrete messages with encrypted codes in a particular case.

Fig. 2 - diagrams explaining the method of transmitting discrete messages with encrypted codes in the general case.

Fig. 3 - block diagram of a system for transmitting discrete messages with code encryption. Explanation of symbols: 1. Converter of input discrete messages; 2. Switch block; 3. ShPS generator; 4. Switch control unit; 5. Communication channel; 6. Matched filter; 7. Deciding device; 8. Decryption key generator; 9. Code encryption key generator; 10. Restorer of discrete message elements; 11. Decryptor; 12. Converter matching device; 13. Logical device of the converter; 14. First switch; 15. k-th commutator, k=2, …, g ₁ -1; 16. g _1st switch; 17. The first control shaper; 18. k-th control driver, k=2, …, g ₁ -1; 19. g _1st control driver; 20. Decryption key converter; 21. Logical decryption device; 22. Decryptor interface device.

Fig. 4 - table of transducer LF values.

Fig. 5 - table of values of LF arguments for byte renumbering.

Fig. 6 - table of LF values for byte renumbering.

Fig. 7 is an example of a table of byte renumbering key values.

Information confirming the possibility of implementing the invention.

1. Logical functions, device for renumbering blocks of discrete messages, sorting sequences.

1.1 Logical function of the converter.

The method and system make it possible to transmit input signals (5) via a communication channel and receive output signals (6), which requires the use of a logical function, which is compiled on the basis of a truth table (Fig. 4) according to the rules [13, p. 31; 14, p. 18].

The operation of the discrete message transmission system is, in particular, based on the use of the logical function (LF) of the converter, which controls the operation of the logical device of the converter. The relations and table of values used to describe the operation of the discrete message transmission system are obtained. The LF of the converter of input discrete messages is considered.

For definiteness, in a particular case, the option of grouping discrete messages into eight elements (byte-by-byte option) was chosen, which corresponds to the ASCII system (g1=256). A LF is presented that allows, when changing the numerical values of the bytes from 0 to 255, to obtain the output value of a logical “1” only for a single set of these numerical values. For the LF converter in which this LF is used, this result means that of all g1 outputs, a single signal for each byte with a different numerical value is generated at only one of the outputs, and at all other outputs it is equal to zero. The signal received at one of the outputs triggers the required driver of the ShPS generator.

The LF converter consists of components , which must be used to receive trigger pulses for the ShPS generator. Each input block (byte) corresponds to a number, which is designated It is required to receive an impulse (the corresponding LF values are marked in Fig. 4 as “1”) only at output from all available g ₁ = 256 outputs (the value and order number differ by one), and the remaining outputs should generate the value “0”. The received signal allows you to then use the ShPS generator to form only ShPS from all possible g ₁ =256 options. That is, if there is a byte at the input, for example, corresponding to the decimal number 184, then the LF will allow the formation of a “1” pulse only for - m output, which allows you to obtain the required 185th ShPS from the form.

In the table of Fig. 4 the following symbols are introduced: - arguments from formulas (5), j - index of variation across rows; - LF components of these arguments, and the LF value is equal to “1” only for - th set of arguments and for other options the signal is “0”. For simplicity, only a few numerical values are given. In the first column - numbers in order, in columns from the second to the tenth - decimal A and binary numeric values of the bits of a set of bytes, corresponding to ASCII characters. The remaining columns contain the required LF values.

If the signal is at the first output of a device that implements LF, then at all other outputs the function and the signal are equal to zero, if the signal is at the second output, then at all other outputs the signal is zero, and so on only for the nth byte, n=1,…, g1). Applying the known rules [13, p. 31; 14, p. 18], we obtain the components of the LF. For example:

Where - byte numbering index;

symbol (*) - inversion operation.

If we substitute the binary values of numbers from columns 3...10 of Fig.4 sequentially, for example, for j=1, 185, 256 (that is, when A and ) into formula (10), then we obtain, respectively, in the first case (other components are equal to zero), in the second option (other components are zero), for the third set it is only different from zero . These values determine the LF control of the SPS drivers, which is used in the logical device of the converter, which is included in the converter of input discrete messages.

In the general case, as indicated in the method, any block of discrete messages contains g2 elements (pulses, bits). To transmit them, g=g1 SPS is required; the considered LFs will contain the same number of components.

1.2 Logical function for block renumbering.

The construction of the LF required for renumbering blocks of discrete message elements using bytes as an example is considered. The required LF is further needed to implement the decryption procedure for discrete messages recovered on the receiving side, but not decrypted. Decryption uses decryption keys obtained by sorting encryption keys according to the rules outlined earlier. A general procedure for renumbering blocks (bytes) is presented.

To record LF renumbering, a truth table has been compiled, which indicates the numbers of symbols of the coding system and bytes before renumbering and after this operation. If you enter implicitly specified values of renumbering keys into the truth table, then the LF cannot be expressed explicitly. Therefore, as an example, one of the possible variants of linganum (renumbering keys) is given, which made it possible to write the LF in explicit form.

The arguments of the desired LF renumbering are input bytes (5), and the function values are encrypted bytes of type (7). Placing the input and output bytes in one table is difficult, so two tables are used. Figure 5 shows the values of the LF renumbering argument table for the lingamum chosen as an example. It does not contain the symbols of the coding system, but their serial numbers are given, the values of the binary digits and the decimal values of these binary numbers are indicated (numbering in order starts from one, and the values start from zero). For example, the symbol “E” corresponds to the binary and decimal numbers 1000101 ₂ =69 ₁₀ , the serial number in the table is 70. The first column contains the numbers in order, then eight columns with bit values for all byte options (binary representation of the number) and in the last column contains decimal values X ₁₀ (from 0 to 255 for g1=256).

If positive and negative logical units are selected as elements of discrete messages, then when counting the numerical values of blocks (bytes), the logical one is replaced by zero.

Figure 6 shows a table of argument values and a truth table for LF renumbering. The first column of the table in Fig. 6 is the byte numbers in order; the second - new decimal values; Columns 3…10 - renumbered binary values; Columns 11…18 are new binary values (they coincide with the values of columns 3…10, but are highlighted for the convenience of constructing the LF according to the rules [13, p. 31; 16, p. 18]).

Explanation of the designation. LF renumbering is a set of components designated which together with indexed by rows and columns. The variation in index i is carried out by introducing columns for the components of the LF, and the variation in j in the designation of the components in the specified table of Fig. 6 is not shown, since it is carried out in accordance with the known rules for constructing the LF. That is, the encrypted values in binary form of the j-th line are equal to the values of the components (line index j omitted). The inversion operation is indicated by the symbol (…)*. For a particular example of tables 5, 6, some high-order components of LF encryption F°8, F°7 are shown, which are equal to:

The ellipsis in the sums (11) means the possible presence of other terms (Fig. 6 shows part of the rows of the complete table of possible bytes). Other components of the LF are also compiled. These examples of expressions define the renumbering LF for any set of arguments (numeric values of all possible bytes before renumbering). 1.3 Sorting operation.

When restoring data, the decryption linganum (keys) (8) is used, the numerical values of which are the result of sorting the encryption linganum (keys) (4). A variant of such an operation is considered using the example of the values of the table in Fig. 7 (an expanded table is given in comparison with the table in Fig. 6).

Designations in the table: j - numbering index in the order of the numerical values of the coding system symbols; X ₁₀ - decimal numeric values of the bytes of the coding system; L _j - decimal numbers of the renumbering linganum (new numeric value of the bytes that need to be received). The following relation is valid: j=1+X ₁₀ . For the sake of brevity in presenting the example, this table shows only part of the numerical values of the coding system for g1=256. For example, the j=111th character of the coding system is described by a byte corresponding to the decimal number 110 ₁₀ , and in accordance with the linganum of the recording, the character is renumbered and corresponds to the decimal number 149, and so on: 256(255→255). Based on the table in Fig. 7, the renumbering linganum looks like:

For example, the element j=55 is equal to the decimal number L ₅₅ =54 and is renumbered to the number 250.

Recovery by decryption occurs in the reverse order. It is necessary to swap the first and second numbers (or change the direction of the arrows of the correspondence sign ) and sort (rearrange, change the order of writing) these pairs of numbers so that the numbers that become the first after the rearrangement (the left ones) increase.

Based on the previously described sorting procedure, we obtain step-by-step results of performing operations to obtain the required sequence L':

- reduction of indices by one;

- replacement of indices and values;

- increasing the indices in the new sequence by one and arranging the elements in ascending order of indices.

Therefore, the recovery linganum defining the decryption keys is:

The general procedure for sorting renumbering linganum values to construct decryption keys (13) is shown. In the particular case of the notations presented in this description, the sequences L and L' in formulas (12), (13) correspond to the encryption keys (4) and decryption keys (8). In the case of blocks, when (for example, g1=256, g3=259) all operations are carried out in the same way.

2. Example of the ShPS form.

An example form is provided. FMS in the form of R codes and signals based on them were chosen as the ShPS, for example,

The largest ACF value of any signal is determined by its energy [6]. At the same time, the modules of the peak values of the CCF are always less than the largest value of the ACF. This allows, through the operation of coordinated filtering of a selected (entered in the form) set of any NPS differing in parameters [6], to detect and distinguish them.

In relation to FMS, in particular, to R - codes and signals based on them, since R < N, W < N, the various codes of the presented form form an ensemble with parameters N, R, W and conditions (2), (3) are satisfied . This allows, by analyzing the UBP of the ACF and VKF, to distinguish codes and signals based on them from each other and to restore discrete messages transmitted over the communication channel. It is advisable to use ensembles of codes and signals based on them with the lowest possible values of the ACF and VCF SBP [7, 8].

3. Description of the method and system for transmitting discrete messages.

3.1 Method of transmitting discrete messages. The differences between the prototype and the claimed method are presented. Figure 1(a) shows an example of input discrete message signals. Figure 1 (b) shows a drawing related to a prototype in which for each element of the input discrete messages at subsequent time intervals a KB is generated if the element of the discrete message is equal to “1” or an inverted KB is created when the input is “O”.

The figures in Fig. 1 show the case T = T _b , when the discrete message pulses have a duration T and are grouped one at a time. Here the block consists of a single element (pulse) of the input signals, therefore, the duration of the block is equal to the duration of this pulse (Fig. 1 (a)), g1=2, g2=1. The numerical values of the blocks are equal to A=0 or 1. Figure 1 (c) shows an option related to the claimed system. For specificity, the elements selected are logical “1” and “0”. Two different SPS S ₁ , S ₂ are used, occupying part of the interval of duration T at which they are generated. The signals can be, in particular, any two FMS in the form of R - codes and signals based on them, specified by code encryption keys that determine the numbers of selected codes g1 from the number g3≥g1 presented earlier in the form. The choice of the ShPS takes into account the fulfillment of the restrictions on the UBP of the ACF and VKF. In accordance with the description of the method, if the element of the discrete message is equal to “1” (Fig. 1 (a)), then S ₁ is one-to-one associated with it, and if the input is “0”, then S ₂ is formed. As a result, there is a collection of two SPS, each of which is located within the intervals T=T _b following the elements of discrete messages to which these SPS were assigned. This sequence, after transmission over the CS, is subjected to the operation of coordinated filtering of the signals S ₁ and S ₂ . Figure 1 (d) outlines the main peaks of the autocorrelation functions (the structure of the side peaks is not shown) obtained during the operations of matched filtering S ₁ in relation to S ₁ and matched filtering S ₂ in relation to S ₂ . The values of the main peaks are designated U _m1 and U _m2 , respectively. At the same time, when carrying out operations of matched filtering S ₁ in relation to S ₂ and matched filtering S ₂ in relation to S ₁ , CCFs are formed whose peak values are less than U _m1 and _Um2 .

The operations of comparing with a threshold value and checking whether these values are exceeded are illustrated using the diagrams in Fig. 1 (d). It conventionally shows the correspondence of the levels of parameters R, W, U _p . Threshold values are selected in accordance with the stated method

The signals obtained after the matched filtering operation of S ₁ or S ₂ with respect to S ₁ or S ₂ are compared with threshold values. The absence or presence of exceeding the threshold values by these signals is recorded; if exceeded, a signal is generated recognition respectively S ₁ or S ₂ . Based on the recognition signals, the element generator “1” or “0” is launched and a discrete output message identical to the input one is generated (Fig. 1 (a)).

Figure 2 shows drawings illustrating the claimed method in the general case. The elements of the input discrete message grouped by g2 make up blocks of duration they are presented in figure 2(a). The values "0" or "1" of each element are specified, starting with the least significant bits, so that the byte corresponds to the number A, where A one-to-one correspondence is established between the bytes characterized by the number A and one of the noise-like signals from the form using encryption keys, so that each block with a numerical value A is associated with an NPS having a sequence number or index equal to A+1 in the sequence of encryption keys. For the selected coding system, the required g1 codes are selected from the g3 codes presented in the form.

Within the subsequent interval of duration _Tb, a signal S _A+1 is generated, the serial number of which determines the type of code or signal based on it.

For example, if the encryption keys are equal to a sequence of integers and if you do not take into account the ellipses, then for the sequence presented in Fig. 2 (a) and written in the generally accepted form from the most significant bits, we have 01001110 ₂ , A = 78, you need to use the code from the form under number 79.

The method and system can also be used in the case where discrete messages with redundant encoding or pre-encrypted discrete messages, for example, by block symmetric or asymmetric encryption, or encrypted in any other way, are input. Then it is considered that the grouping of discrete message elements into blocks has already been carried out and g2 is chosen equal to the number of elements in the input blocks, therefore,

Next, the operations outlined in the description of a special case of implementation of the claimed method are carried out (when g1=2, g2=1), that is: transmission over a communication channel, comparison of signals received after coordinated filtering with threshold values, checking whether these threshold values are exceeded, generation recognition signal, according to which, in accordance with the mutual unambiguity of the blocks and the NPS, the elements of discrete messages are restored, decryption is carried out and an identical input block of discrete messages is formed, sent to the output to the recipient.

3.2 Discrete message transmission system with code encryption. The block diagram is presented in Fig. 3; previously, a breakdown of the elements that make up the diagram is given, while

the input of the converter of input discrete messages 1 is connected to the input of the discrete message transmission system with code encryption,

discrete input message converter 1 contains g1 outputs, which are connected respectively to the same number of inputs of the first functional group of inputs of the switch block 2, the second functional group of inputs of the switch block 2 is connected to the functional group of outputs of the switch control block 4, the functional group of inputs of this block 4 is connected to the corresponding outputs of the code encryption key generator 9, the functional groups of outputs of the switch block are connected to the functional group of inputs of the noise-like signal generator 3, the output of this generator 3 is connected to the input of the communication channel 5, the output of which is connected to the input of the matched filter 6, containing g3 outputs connected to such the same number of functional inputs of the decision device 7, which has g1 outputs connected to the same number of inputs of the discrete message element recoverer 10, the output of which is connected to the second input of the decryptor 11, the first input of the decryptor 11 is connected to the output of the decryption key generator 8, the decryption output 11 is connected to the output of the entire system, while

the converter of input discrete messages 1 contains an interface device of the converter 12 and a logical device of the converter 13,

the input of the interface device of the converter 12 is connected to the input of the converter of the input discrete messages 1, the output of the interface device of the converter 12 is connected to the input of the logical device of the converter 13, g1 of the outputs of the logical device of the converter 13 is connected to the outputs of the converter of the input discrete messages 1;

switch block 2 contains a functional group of g1 switches, such as the first switch 14, k-th switch (k=2, ..., g1-1) 15, g1 - th switch 16, the first inputs of each switch are connected to the corresponding inputs of the first functional groups of inputs of the switch block 2, the second inputs of the switches represent a functional group of inputs and are connected to the corresponding inputs of the second functional groups of inputs of the switch block 2, g3 outputs of each switch represent a functional group connected to the corresponding group of outputs of the switch block 2;

the switch control unit 4 contains a functional group of g1 control drivers 17, 18, 19, the inputs of which are connected to the inputs of the switch control unit 4, the outputs of each control driver form a functional group of g3 outputs connected to the corresponding outputs of the switch control unit 4;

decryptor 11 contains a decryption key converter 20, a logical decryption device 21 that interfaces devices of the decryptor 22, the input of the decryption key converter 20 is connected to the first input of the decryptor 11, the output of the decryption key converter 20 is connected to the first input of the logical decryption device 21, the second input of the logical decryption device 21 connected to the second decryption input 11, the output of the logical decryption device 21 is connected to the input of the decryptor interface device 22, the output of which is the output of the decryptor 11 and the entire claimed system.

3.3 Implementation of the principle of renumbering blocks of discrete messages. Section 1.2 of this description provides an example of constructing a LF for renumbering blocks (bytes). Below is the composition and operation of a renumbering device that implements the specified LF, which can be built, for example, on the logical elements “AND”, “OR”, “NOT” [13, 14]. The renumbering device includes a key converter, a renumbering LU and an interface device.

A brief summary of the essence of operations in renumbering devices. To implement LF, as follows from expression (11), it is necessary to perform inversion operations, which is possible by using inverters, the operating mode of which is regulated by control signals. These operations are carried out in the renumbering LU, and the specified control signals are generated by the key converter. Control signals depend on the results of comparison (according to a certain rule) of bytes, conversion keys (they are specified by the user), with the bytes of the selected encoding system (they act as standards).

The purpose of inverters is to carry out the operation of inversion (negation) of a binary variable (denoted “A”) under the influence of an external control signal U. For example, variable A is converted to A* if U is equal to logical “1” and is not converted if U is equal to logical “0” ".

In particular, the inverter can be built from two electronic switches (Cl. 1.2) and a circuit that performs the “NOT” inversion function. The general circuit consists of two parallel branches. The first is located Kl. 1, in the second - the element “NOT” and sequentially with it Cl. 2. The inputs and outputs of the branches are also the inputs and outputs of the inverter. Cl.1 opens when a positive signal U is applied to the control input of the key (let’s denote it “+1”), and Cl. 2 closes when this signal is applied. In this case, the input variable A passes to the output through Cl.2 and is inverted (“+1” - there is inversion). If the opposite control signal is supplied (denoted by “0”), then Cl. 1 closes, and Cl. 2 opens. Input variable A passes to the output without inversion ("0" - no inversion). By changing the value of U, you can get the arguments of the LF in the required form, whether inverted or not. The LF for controlling inverters is set as follows: the inverter control device has two inputs, to which the logical values “B” and “C” are supplied, then the values of the control signals are formed at the output in the form of the ratio U=C⋅B*. This LF takes a non-zero value only for the set of arguments (B;C)=(0;1). Inverter control devices using U signals can be implemented using “AND” and “NOT” logic elements [13, 14].

Based on the established values of U (the value takes a single value only for a pair of arguments (0;1)), to carry out the inversion operation it is necessary to generate the following set of values: the variable “C” (the value of the conversion function) is equal to “1”, and the argument “B”( input signal) is "0".

Designation introduced: - je LF components, each of which is equal to the product of bits, some of which can be inverted. These values must and can be generated circuit-wise. So, the LF of renumbering is a set of quantities which are the sums of the specified LF components for all values (for example, g1=256).

In the relation U=C⋅B*, we consider that the variable “C” is similar to the values of the LF renumbering components and at the same time to the values of the renumbering linganum (table of Fig. 6), and “B” is the argument of this function (table of Fig. 5). Then, to carry out the inversion operation, the control signal U in the form of a logical "+1" will be created when "C" is equal to and "B" is equal to "0". For all other sets of variables (B;C), “0” will be generated at the output of the control signal generation circuit U. The U signal is determined by the specified rule for each i-th bit of any j-th byte in relation to each function k=1,…, 8 (Fig.6). Consequently, inverter control signals in general depend on the three indicated indices (i, j, k) and are therefore designated That is, the value “C” (the components of the LF and the values of the renumbering linganum) is the enabling signal for inverting the value “B” (the arguments of the LF).

The key converter included in the renumbering device generates control signals for inverters based on a user-selected linganum, which is implemented in the form of renumbering key signals, and the renumbering LU allows you to obtain components and build the required LF.

Key converter implementation diagram. In a possible key converter circuit for generating there is an input for the transform linganum values (keys) L, and there is also a coding system byte generator. The system bytes are known. For g 1=256, by analogy with (5), these bytes are designated The values take the values of integer decimal numbers from 0 to 255, and in the binary system they coincide with the numbers in the rows of the table in Fig. 5, 6 (from the set (0,...,0) to (1,...,1)). These values play the role of standards. Byte generator The coding system can be implemented on registers with weight taps and adders [6] or in the form of a storage device. This byte generator starts when the supply voltage is connected. Quantities there are values of byte numbers (standards) used in the preparatory mode to receive inverter installation signals. These installation signals are further used in the renumbering LU to form the renumbering (decryption) LF in operating mode.

Circuits for implementing the LF U=С⋅В* and the byte generator of the coding system are included in the key converter and can be built on the logical elements “NOT”, “AND” for all bits (i=1,…, 8) of the j-th byte . Similar circuits are needed for all different values of j=1,..., g1 in order to create control voltages for all inverters, which makes it possible to obtain the required LF.

For example, sequentially multiplied by the inversion of the values and signals are received . If multiplied by as a result, the values are formed and so on for all bytes j=1,…., g1. For ASCII quantity indices characterize: i=1,…,8 - dependence on the number of bits in the byte; j=1,…,256 - subordination of the byte number; k=1,…,8 - connection with the number of LF components encryption. Inverters are numbered with the same indices for their purpose, that is

Operation of the key converter. After connecting the power supply, the renumbering key generator and the encoding system byte generator are started. In accordance with these rules, control voltages for the inverters U are created. As a result, the key converter transforms the renumbering keys into control voltages for the inverters LU renumbering.

The renumbering LU is designed to perform the operation of renumbering blocks (bytes) in accordance with the renumbering linganum (keys) using inverter control voltages. To implement this task, you can use the logical elements “AND”, “OR”, “NOT” [13, 14].

In the structure of the LF expression (11), we note some features. Previously, arguments were designated and in the given example of expressions for single index numbering is used This is due to the fact that each term in the LF corresponds to a certain value of the index j, that is, the variation of this index is taken into account when constructing the LF, therefore, to simplify the entries, single-index numbering was introduced. When constructing the LU renumbering scheme, this circumstance was taken into account in that the scheme has two parts: one forms the components of the sums of various LFs, and the other combines them, resulting in the required entire function.

Each of the indicated LFs is represented by the sum of products of arguments as in formula (11), some of them are inverted. The number of terms for g1=256 is equal to the number of lines in the tables of Figs. 6, 7. Depending on the type of renumbering linganum, some of the terms of the specified sum of products are equal to zero, so they are absent in (11). In the general case, for each of the eight LF components (a block of eight bits is considered), during their circuit implementation it is required to form all g1 terms (for example, g1=256).

According to the rules [13, p. 31; 14, p. 18] of the formation of any LF, sets of arguments are identified for which the function is equal to one (marked in Fig. 6 with a sign (*)). Inverters are used to invert the null values from this set of arguments. Inverters controlled by signals generated by renumbering key converters. In the preparatory mode, control voltages for the operation of inverters are generated, and in the operating mode, bytes of input messages are supplied to the inputs of the corresponding devices.

That is, the renumbering LU consists of component shapers each j-th byte (this is the product of bits, some of which may be inverted) and adders to obtain a set of LF encryption

The circuit composition of one of the potential options for implementing driver components may include inverters (for example, g 1=256); and multipliers of binary signals (8 input elements "AND"). In the renumbering mode, the values of input messages (LF arguments) are supplied to the inputs of the component shapers The output contains the values of the LF components for each value j=1,..., g1, and these components are products of the values of the input data (LF arguments) and some of them are inverted. As a result, terms are formed for the components of each of the LFs, corresponding to all j=1,..., g1. Next, the summation is carried out over all j values.

The circuit for implementing the LF component driver also has an input for inverter control signals (i - index for changing the bits of input bytes; j - index of variation of input bytes; k - index of numbering of LF components

For example, for inverters allowing to receive input bits inverted or not, 1, 2, ..., 8th bits of the jth byte of input data are supplied as well as recording control signals As a result of multiplying the signals at the outputs of the inverters, the LF component is obtained Other inverters are used in the same way, in particular if the inverters send recording control signals , then the LF component will be found Such operations are carried out for all index values j=1,…, g1 (for example, g1=256). Circuits are used for each specified value] separately, which differ in the state of the inverters (different control signals are supplied, depending on the linganum).

Schemes for summing the terms that make up the LF components for different j and schemes for forming a set of LFs are used. Let the example be expression (11) for one of the functions of the set, let’s say Each component summation circuit (“OR” elements) receives signals from the generators of these components for different j. Components related to the same LF, but for different values of j, are summed up at the “OR” elements, which allows us to obtain the required LF.

The output of the component summation circuit contains the values of a set of LF renumbering corresponding to the bits of the renumbered bytes.

It is advisable to use a renumbering interface device to coordinate the renumbering LU with the transmission line (more details in clause 4.11).

In operating mode, blocks (bytes) of discrete messages are supplied to the input of the renumbering device. The inverters are set by control signals in the preparatory mode, so the required LF renumbering to perform the necessary operations is available. This allows you to assign a new number to each of the input symbols (input bytes) according to the renumbering LF, which is what you need to get.

The question presented in this paragraph is the basis for describing the operation of decryptor 11 in paragraph 4.11.

4. Composition and operation of individual system devices.

Devices 1-4 from the diagram in Fig. 3 constitute the transmitting part (side), and devices 6-11 are assigned to the restoring part (side), both parts are connected via KS 5 into a system for transmitting discrete messages with code encryption.

4.1 Converter of input discrete messages. Let the encoding system be initially selected and its elements and their number g1 known. Input discrete message converter (IDMC) 1 is designed to perform the operations specified in the claimed method of transmitting discrete messages, namely: grouping sequentially the following elements of input discrete messages into blocks of g2 elements (pulses, bits), where g2=log ₂ g1 (rounding up to the nearest whole number); generation of trigger pulses for the ShPS generator 3, as well as for matching the LU of the converter 13 with the transmission line through which the elements of these messages are received at the input of the discrete message transmission system (for example, matching the resistances and the form of presentation of discrete messages).

PVDS 1 consists of a logical device of the converter 13 and a mating device of the converter 12. The LU of the converter 13 implements the LF control of the SPS drivers according to relation (10).

The transducer interface 12 is designed to perform several functions. First of all, this is the control of grouping sequentially subsequent elements of a discrete message into blocks of g2 elements. For this purpose, in particular, a clock generator of pulses can be used, following with a period of duration _Tb . It can be made on elements of analog or discrete circuitry [13-15], and be part of the interface device of the converter 12. Pulses of discrete messages through the interface device of the converter 12 enter the LU input register of the converter 13, filling all its g2 cells. Based on the pulses of the clock generator, which records the end of the time interval for filling all cells of the input register, the block sizes are set. Also in the logical device of the converter 13 (according to the LF of the converter type (10)), operations are performed to convert the signals of the input block (byte) coming from the register into a trigger pulse for the generator 3. The beginning and end of blocks and the number of elements in the block are regulated by the pulses of the clock generator , further actions to transform the blocks.

The interface device of the converter 12 is also intended to coordinate the LU of the converter 13 with the communication line through which input signals of discrete messages are supplied to the input of the system from the source, or to coordinate the form of presentation of the input messages, or to apply known rules that must be implemented for the operation of the LU of the converter 13 . Coordination of the form of messages may consist, for example, in converting sequential transmission of blocks in the form of bytes into a parallel sequence of bytes or in the use of certain protocols and data transmission/reception standards. Elements of analog and discrete circuitry are used. Matching the resistances using the coupling device of the converter 12 makes it possible to transmit input message signals to the PVDS 1 energy-efficiently and without distortion. In uncoordinated communication lines, data distortion is possible [15, p. 29-32]. They can be reduced by using a matching device [15, p. 32-40] or data input/output standards [15, p. 43-53], which also applies to the function of the coupling device. The interface device of the converter 12 can be made on passive or active elements [13-15] (transistors, microcircuits), in the form of a universal serial bus USB. All options provide the same technical result.

The LU of the converter 13 implements the LF type (10). The purpose of the converter is that the combination of input signals (block elements, input byte bits) is converted into another set of signals required for carrying out the operations of generating the NPS.

To make the presentation more specific, just as in formulas (10) of the considered example, g1=256 was chosen. The components of an LF are the product of the arguments that enter it with or without inversion. At the input of the LU converter 13 there is a register of g1 cells connected to branches, which consist of multipliers that form the product of g2 signals from the register cells included in it with or without inversion (depending on the type of LF type (10)). The connection of inverters to multipliers is carried out during manufacture and is unchanged; control signals are not required. The inverter can be built on "NOT" elements. As a result, each branch of the circuits allows one to obtain one of the LF components n=1,…, g1 (10). The multiplication results are fed to g1 outputs of the LU converter 13 in the form of the result of the influence of the LF on the input signals.

The LU of the converter 13 can be built, for example, on the logical elements “AND”, “OR”, “NOT” [13, 14], and can also be made in the form of a programmable logic array (FPGA) [14, 15 p. 494, 534] either on its variety, or on a new type of FPGA that may be created in the future. All options provide the same technical result.

Operation of PVDS 1 using the example of the case when g2=8 and blocks are bytes. The input elements of discrete messages in the form of bytes are supplied to the input of the coupling device of the converter 12, which ensures effective transmission of signals to the LU of the converter 13, which converts the bytes in accordance with the LF of the converter. This makes it possible to receive a trigger signal at one of the g1 outputs (Fig. 3), which is then transmitted to the NPS generator 3. Subsequently, one of the NPS forms, specified by the code encryption keys, is formed using this signal. For example, if the sequence of these keys is a sequence of integers, one after the other, then the number corresponds one-to-one to lines 3-10 of the table of Fig. 6 (the numeric values of the bytes are given in binary form): j = A+1 - number in numerical order ensemble code in the form. This allows the required BPS+1 to be generated according to the method of transmitting discrete messages.

4.2 Switch block. To redirect the trigger signals to the corresponding inputs of the ShPS generator 3 in accordance with the code encryption keys, a block of switches 2 is used.

The switch block 2 contains g1 switches (in the diagram of Fig. 3 they are conventionally designated 14, 15, 16). The input of each of the switches is connected to one of the corresponding inputs of the switch block 2. The output of each switch is a functional group of g3 outputs, which are connected to groups of outputs of the switch block 2 and connected in series to all inputs of the ShPS generator 3. Which of the outputs of each of the g1 switches , included in the block of switches 2, is active, depends on the control signals arriving at the second group of inputs of each of the g1 switches. The second groups of inputs of any of these g1 switches are connected to the second inputs of the switch block 2 (Fig. 3).

Each of the g1 switches of the switch block 2 may consist, for example, of a functional group g3 of electronic keys (according to the number of switch outputs), the first inputs of which are connected in parallel and constitute the switch input. The second (control) functional groups of electronic key inputs are connected to the second inputs of each switch. The g3 outputs of each of the electronic keys form a functional group and are the outputs of each of the g1 switches.

In operating mode, depending on the control signals arriving at all switches of the switch block 2, each output signal of the code generator trigger is connected to one of the inputs of the ShPS generator 3. As a result, coded signals are created at the output of the ShPS generator 3, put in one-to-one correspondence with the trigger (clock) pulses generated by the input discrete message converter (IDMS) 1. For example, the signal from the first output of IDMS 1 can be connected to any but the only input of the SPS generator 3 in accordance with the code encryption keys.

The switches of switch block 2 can be made on elements of analog and digital circuitry [13, 14] or on FPGA [14, 15, p. 494, 534] or its variants. All embodiments provide the same technical result.

4.3 ShPS generator. To generate the ShPS with serial numbers from the form specified by the code encryption keys (4), the ShPS 3 generator was used.

For the purpose of specification, FMS was selected in the form of R codes. The ensemble codes and signals based on them satisfy the requirements (1) - (3) and correspond to the serial numbers x = A + 1 of the form, where A are the numerical values specified by the code encryption keys. One of the ensemble codes is formed. All outputs of the shapers are connected to the adder, the output of which is the only output of the ShPS 3 generator.

Generator SHPS 3 is a set of g3 ensemble code generators with individual inputs. One of the ensemble codes is formed. All outputs of the shapers are connected to an adder, the output of which is the output of the ShPS 3 generator. The shapers can be built on microcircuits [6, Fig. 3.11, p. 47 example for KB, p. 357] or in the form of devices based on surface acoustic waves (SAW) [16, 18]. The sequence of alternating symbols in the codes determines the geometric arrangement of the electrodes of the surfactant converters in the specified devices. SAW devices allow the use of codes and signals based on them with coefficients (+1, -1) (1), which ensures high energy efficiency and microminiaturization of the system.

In operating mode, at one of the individual inputs of the generator generator ShPS 3, a trigger pulse is received from the switch unit 2, and at all other inputs there is no such pulse. The number of output groups is equal to the number of g3 code generators. Therefore, one of the shapers responds with the corresponding code (1) - (3), appearing at the output of the adder and the entire generator 3. As a result, each byte is assigned a one-to-one correspondence with the required ensemble code or a signal based on this code presented in the form. The codes are transmitted via KS 5 for further conversion in the restoring part of the claimed system.

It is possible to generate ensemble codes in a form suitable for transmitting a sequence of broadband signals over a communication channel directly or as modulating signals of carrier oscillations, then the BPS generator 3 implements an additional modulation function (to generate signals based on selected codes at the required carrier frequency). SAW devices allow you to immediately receive signals based on selected ensemble codes for transmission via CS 5 at a carrier frequency in a fairly wide frequency range.

The SPS generator 3 can be made in the form of a storage device into which all required signals are recorded and from which can be retrieved. These signals are the outputs for the specified generator. The ShPS 3 generator can be made in the form of an FPGA [14, 15, p. 494, 534] or a variation thereof or a new variant that may be created in the future. Then the output signal is determined by the corresponding logical function that specifies the control signals for the operation of the FPGA.

4.4 Switch control unit. To create control signals for the operating modes of the switch unit 2, a control unit 4 is used. The operation of the switch control unit itself is determined by the output signals of the code encryption key generator 9.

The switch control unit 4 consists of g1 control drivers (in Fig. 1 they are conventionally designated 17, 18, 19), the inputs of which are connected to the corresponding inputs of the switch control unit 4, and the outputs of all control drivers are connected to the corresponding outputs of the switch control unit 4. Any The control driver has g3 outputs in the form of a functional group.

Control drivers, in particular 17, 18, 19, can be made, for example, in the form of logical control devices. Each of these control generators implements LFs similar in appearance and essence to expression (10). The control generators perform the same functions as the LU of the converter 13. As a result, an output signal is generated at only one of the outputs of the output functional groups of each of the control generators, in particular, 17, 18, 19 (Fig. 3), and at all other outputs of the specified it is missing from output functional groups. These generated signals are sent to the corresponding outputs of the control unit 4. This ensures the closure of the electronic keys of the switch block 2 in such a way as to ensure the required one-to-one correspondence between the input blocks (bytes) and the signals of the NPS generator 3, specified by the code encryption keys.

The switch control unit 4 can be built, for example, on logical elements “AND”, “OR”, “NOT” [13, 14], made in the form of an FPGA [14, 15, p. 494, 534] or a variation thereof or an FPGA variant that may be created in the future. FPGA control signals allow the implementation of proper LF. All embodiments provide the same technical result.

4.5 Communication channel. To carry out the transmission of NPS (R - ensemble codes or signals based on them) to the restoring part of the proposed device, KS 5 is used. According to [16, p. 189] communication channel (a similar term - communication line) is a set of technical means and physical environment that ensures the propagation of message signals. Technical means may include a modulator (for example, a mixer with an amplifier), a transmitter (for example, amplifiers and antennas), a receiver (for example, a frequency converter with an amplifier), and a demodulator. Physical media: solid, liquid, gaseous, vacuum. There are channels in the form of electrical communication lines (wired and radio communication), sound (acoustic) and light (optical) communication.

Discrete messages can be transmitted using electromagnetic waves propagating through wires, cables, waveguides, light guides, as well as in air and airless space. In particular, through twisted pair, fiber-optic cable (FOC), coaxial cable, radio channel of terrestrial or satellite communication [17].

An example of a solid physical medium is sound ducts of surface and volumetric acoustic waves made of, for example, piezoquartz and lithium niobate. The length of the sound pipes is short, but they are practically insensitive to external influences, excluding direct physical destruction. Devices based on volumetric and surface acoustic waves for sound (acoustic) KS 5 are described in [18].

Sound (acoustic) communication lines in a liquid medium are considered in [19], and the features of sound-underwater communication are indicated. KS 5 as light optical communication lines are presented in [20]. Auxiliary equipment (converters, amplifiers, antennas) are not considered here. All variants of KS 5 provide the same technical result.

4.6 Matched filter. To detect and distinguish NPS received by KS 5 against a background of noise, SF 6 is used, which is a functional group consisting of g3 optimal matched filters [6, p. 26] for each code or signal generated by the ShPS 3 generator and entered into the form. A possible version of the SF 6 circuit may consist of branches with parallel-connected inputs. Any branch includes the SF for one of the ensemble codes (x=1,..., g3, for example g3=259) from the form. The SFs in the branches are numbered in the same way as the codes themselves; the functional group has one input and g3 outputs.

Filters can be implemented on microcircuits [6, p. 48, fig. 3.13, p. 366, fig. 22.5] or on surfactant devices [6, p. 357, fig. 21], [16, 18]. The structure of interdigital SAW SF converters is associated with alternation in codes (1) - (3).

The input of the functional group of filters is connected to KS 5 (Fig. 3), and its outputs are connected to the g3 inputs of the decision device 7. All parallel branches are supplied with the input signal received from KS 5. At the output of the SF of the corresponding branch, the ACF signal of the code will be generated. which was used to transmit the corresponding byte. The ACF consists of two areas of side peaks, between which there is a main peak with a high signal level. At all outputs of other SF there is a CCF signal, which can have several peaks, but the largest of them is always lower than the main ACF peak. It is necessary to use ensembles of codes with a low level of VCF peaks, which improves the quality of distinguishing codes, that is, different symbols of the coding system. The signals from the block output are further analyzed in the solver 7.

4.7 Deciding device. The output signals of the filter block SF 6 are compared with the threshold level in the decision device 7, which has g3 inputs and the same number of outputs. The solver (RU) 7 is used to analyze the output signals of each matched filter and is a functional group consisting of g3 private solvers. The inputs and outputs of RU 7 are connected to the inputs and outputs of functional groups. The signal of each filter of the SF 6 functional group is supplied to the input of the corresponding branch with a private solver. Next, a recognition signal is generated in the case when the signal at the input of the RU 7 branch exceeds the set threshold which means the arrival at the input of the SF 6 block of a code with a certain number according to the form agreed with the SF of this branch. Code recognition signals are indicated , for example, g=g3=259. For each byte of discrete messages, one of the recognition signals is equal to, for example, "1", and all others are equal to "0". RU 7 generates recognition signals received noise-like signal at the A+1th output of each SF.

A differential cascade circuit or a digital comparator can be used as a threshold comparison device [14]. The threshold must be set above the level R of the side peaks of the ACF and the largest value W of all VCF codes, but below the level of the main peak of the ACF of all codes in the ensemble. This ensures a response only to ACF peaks, without a response to VCF signals. As a result, in the operating mode, the form codes are distinguished and then the received signals are transmitted to the discrete message element restorer (VEDS) 10.

The operation of RU 7 is that when a signal from SF 6 is received at one of its inputs, the threshold device is triggered and one of the detection and recognition signals (for example, a pulse) is generated a specific ShPS code and, accordingly, a block (byte) due to their one-to-one uniqueness. The recognition signal is applied to the corresponding output and transmitted further (Fig. 3) to restore the byte (in the general case of a block) of the output discrete message.

4.8 Decryption key generator. To generate signals corresponding to the decryption keys in formula (8), a decryption key generator 8 is used. The signals represent a set of g1=g bytes corresponding to the j-th elements in expression (8), for example, in a binary system.

Generator 8 can be made using discrete circuitry elements, for example, shift registers with taps [6]. Inverters are connected to the corresponding taps, which allows the adder to receive signals from all taps corresponding to the required numerical combination of bits (the necessary bytes of the decryption linganum). The key generator 8 can be made in the form of a storage device in which all the required signals are recorded and from which they can be retrieved.

The decryption key generator 8 can be made in the form of an FPGA [14, 15, p. 494, 534] or its variation or variant that may be created in the future. Control signals allow you to implement the proper LF and obtain the required bytes of decryption keys. All options provide the same technical result.

4.9 Code encryption key generator. The generation of signals corresponding to the elements M of formula (4) is provided by a code encryption key generator 9, which is similar to the previously presented decryption key generator 8. The device can be made on discrete circuitry elements, for example, on shift registers with taps [6], so that Inverters are connected to the corresponding taps, which allows the signals from all taps to receive the required numerical combination of elements (bits), that is, the required bytes of code encryption keys, at the adder.

A possible embodiment is in the form of a storage device in which all the required signals are recorded and from which they can be retrieved. These signals are the output for the code encryption key generator 9, which can also be made in the form of an FPGA [14, 15, p. 494, 534] or its variation or variant that may be created in the future. Control signals supplied to the FPGA make it possible to implement the proper LFs and obtain the required byte sequences. In any case, the same technical result is ensured.

4.10 Restorer of discrete message elements. To restore blocks (bytes) corresponding to codes detected and recognized by SF 6 and RU 7 or signals based on them received via KS 5, a discrete message element restorer 10 is used. This operation is unambiguous, since there is a one-to-one correspondence of blocks (bytes) ) and ShPS.

Let blocks correspond to bytes. Code recognition signals are received from the output of RU 7 to the input of VEDS 10 as a result, recovered bytes are formed consisting of elements in the form of bits any j-th byte.

When working correctly, they are bytes (7), which are then decrypted.

The circuit of a possible variant of VEDS 10 may include parallel branches, each of which consists of a byte generator of the selected coding system. For example, the first branch consists of the former of the first byte with the numeric value zero, the second branch - of the second byte with the numeric value one, and so on until the last 256th branch to form the 256th byte, corresponding to the number 255, when g 1=256. The numerical values of the bytes of the encoding system chosen for the example are presented in columns (3...10) in Fig. 5 in the binary number system. Each branch is activated by the recognition signal corresponding to this branch

Each byte shaper is a generator of one of various blocks (bytes), which consist of elements (logical “1”, “0” or “±1”) and form sets of pulses of the reconstructed byte. Formers of all kinds of bytes can be made on elements of discrete circuitry, for example, on shift registers with taps [6, p. 47, 48]. Inverters are connected to the appropriate taps, which makes it possible to obtain the required combination of elements, bits, on the adder of signals from all taps.

VEDS 10 can be made in the form of a permanent storage device containing the values of all blocks, each of which is retrieved in the presence of code recognition signals

In operating mode, a code recognition signal is received from RU 7 to one of the inputs of VEDS 10, for example h-th which starts the pulse shaper of this branch. As a result, a set of elements (bits) corresponding to the h-th block of recovered messages is formed. Due to the one-to-one correspondence between the type of input blocks and the codes from the form, the reconstructed blocks follow in the same order as they were in the input discrete message. Recovered blocks (bytes) ) are then transmitted to the input of the decoder 11. VEDS 10 can be made in the form of a storage device from which the required signals can be extracted. VEDS 10 can be made in the form of an FPGA [14, 15, p. 494, 534] or its variation, or a new version that may be created in the future. Memory and FPGA control signals allow the required sequences of blocks to be reproduced at the output. All embodiments provide the same technical result.

Comment. The codes at the input of SF 6 or the signals at the input of RU 7 can be re-switched for each optimal filter and then decrypted, or at the outputs of SF 6 it is possible to generate responses of optimal filters to input influences, which are then regenerated into output discrete messages by means of decoder 11. The proposed system implements the second option.

4.11 Decryptor. Device 11 is designed to decrypt received discrete messages generated in accordance with decryption keys (8) according to rules (9). For this, renumbering LF and circuits for its implementation are used, which can be built, for example, on logical elements “AND”, “OR”, “NOT” [13, 14] or on an FPGA. Decryption is implemented using a decryption key converter 20, a decryption LU 21, and a decryptor interface device 22.

The decryption key converter 20 allows you to convert the values of the decryption keys into control voltages that determine the operating mode of the inverters from the decryption LU 21. The decryption keys are generated by the corresponding generator 8.

The description of the decryptor is based on the materials in paragraphs. 1.2, 3.3, so the renumbering LF is constructed in such a way as to implement decryption operations. The decryption LF is compiled using the method discussed in the example to obtain the required LF, similar to that presented in formula (11).

For ease of presentation, the following has been introduced: - control signals for the inverters of the decoder 11, used in the decryption LU 21, where i is the index for numbering the bits; j - byte variation index; k is the index of the LF decryption components.

Implementation diagram of decryption key converter 20. To form in this circuit there is an input for the values of the decryption keys transmitted to the first input of the decryptor 11 from the decryption key generator 8. The byte generator of the encoding system selected by the user is also used. These pre-known bytes, for example, for g 1=256, by analogy with formula (5), are designated The values of these bytes, which act as standards, take on the values of integer decimal numbers from 0 to 255, and in the binary system they coincide with the numbers in the rows of the tables in Fig. 4-6 (from the set (0,...,0) to (1, …,1)). Byte generator The coding system can be implemented on registers with weight taps and adders [6] or in the form of a storage device. This byte generator starts when the supply voltage is connected. Elements - these are the reference numeric byte values used in the preparation mode to receive signals installation of inverters that are used in operating mode in decryption LU 21.

Next, on the logical elements “NOT” and “AND”, the LF V=С⋅В* is repeatedly implemented for all bits (i=1,…, 8) of each j-th byte (as in paragraphs 1.2, 3.3). Similar circuits for different values of j=1,..., g1 make it possible to obtain the required LFs for the control signals of all inverters of the decryption LU 21.

The interfacing device of the decoder 22 is designed to match the resistance of the decryption LU 21 with the transmission line through which discrete output messages are sent from the claimed system or to coordinate the form of data presentation. This allows messages to be transmitted to the system output in an energy efficient and distortion-free manner. Coordination of the data form may consist, for example, in converting serial transmission of bytes into a parallel sequence of bytes or in the use of known protocols or standards for data transmission/reception.

In uncoordinated communication lines, data distortion is possible [15, p. 29-32]. They can be reduced by using matching devices [15, p. 32-40] or data input/output standards [15, p. 43-53], which is also provided by the coupling device 22. It can be made on passive or active elements (transistors, microcircuits) or in the form of a universal serial bus USB. For any option, the same technical result is provided.

Operation of the decryption key converter 20. After connecting the power supply, the decryption key generator 8 and the byte generator X' of the encoding system are started, as a result of which inverter control signals are generated. As a result, the decryption key converter 20 transforms the decryption keys into control signals of the inverters located in the decryption LU 21.

The decryption LU 21 is designed to perform the decryption operation of discrete messages received at the input of the decoder 11 by renumbering them in accordance with the data recovery linganum, using the inverter control voltages. To implement this task, the principles of block renumbering and their implementation discussed in section 3.3 were used. Circuit design LU decryption 21 can be implemented on logical elements "AND", "OR", "NOT" and on the FPGA.

Inverters I' _i,j,k , through which the required arguments of the LF are inverted according to the rules [13, 14], are controlled by signals generated by decryption key converters 20 in preparatory mode. As a result of the preliminary installation, only the bits of discrete messages received at the input of the decryptor 11 necessary for data decryption are inverted.

Decryption LU 21 consists of component shapers each j-th byte (this is the product of bits, some of which can be inverted) and adders of the specified components to obtain a set of LF decryption for all values j=1,…, g1 (for example, g1=256). The essence of LU decryption operations 21. The circuit of one of the possible implementation options for the driver LF components consists of inverters g1 (for example, g 1=256); k=1,…, 8 and binary signal multipliers (8 input “AND” elements to obtain the product of eight bit values of each byte, some of which are inverted). In the recovery mode, encrypted elements of discrete messages are supplied to the input of the shapers of the LF components, which in this case are the input signals and arguments of the LF. Inverters have an input for control signals (i - index for changing the bits of the input bytes; j - index of the variation of the input bytes; k - index of the LF components). As a result, the output of these circuits contains the values of the LF decryption components To obtain a set of decryption LFs, these terms are summed over all possible values of the index j, which is implemented by component adders (OR circuits). Each of these circuits receives signals from the shapers of these components, that is, LF terms for different index values]. As a result, components related to the same LF, but for different values], are summed up at g1 - input elements "OR" (for example, g1=256). After summing the components, a set of decryption LFs is generated which in operating mode correspond to the bits of the bytes recovered as a result of decryption (6).

As noted earlier, encryption and decryption as presented is a renumbering procedure, hence the values of the table in FIG. 6 can be used in both cases.

In operating mode, inverter control signals are supplied to the first input of decryption LU 21 and encrypted messages (7) from the output of the discrete message element restorer 10. In accordance with the decryption LF F', the necessary renumbering operations are implemented, resulting in the regeneration of messages in their original form

The decoder circuits 11 can be made on logical elements or in the form of an FPGA [14, 15, p. 494, 534] or on its variety or variant that may be created in the future. All options provide the same technical result.5. Operation of the claimed system based on the claimed method. Using the example of symbols, the operations of the method and the operation of the system for transmitting input discrete messages (4) are considered. Suppose you want to transmit the word N0 in the ASCII system. We use [12], where the numerical value of the byte (in this description this is parameter A) is called a code, we find for N and O the corresponding numbers 78 and 79. Let the code encryption keys be chosen so that they correspond to code numbers 179 and 180 from the form.

The input bytes of the discrete message N0 from the source pass through the coupling device of the converter 12 in an energetically optimal way and are fed to the LU of the converter 13, where for the N symbol byte only at the 79th output, and for the O symbol byte only at the 80th output, trigger signals are generated, which are a consequence reactions of the LF components used in the LU of the converter 13 to the input signals. It was noted that the output numbers are one greater than the numerical values of the bytes.

From outputs 79 and 80 of converter 1, trigger signals are sent to the input of switch block 2 and then to switches with the same numbers. At the same time, the corresponding signals are generated at the output of the encryption key generator, so that bytes of binary signals corresponding to values 179 and 180 are created at the 79th and 80th outputs, which are then transmitted to the inputs of the control generators included in the switch control unit 4. The control generators implement LF type (10), as a result of which only the 179th and 180th outputs of the control generators generate signals sent to the inputs of the switches of the switch block 2. The switches, both inputs of which received control signals, are closed and the start signal is received to the corresponding 179 and 180 inputs of the ShPS generator 3. This leads to the formation of the corresponding codes or signals based on them. When using R-codes or signals based on them (1)-(3) as NPS in the example, codes from the form given earlier with the required numbers will be generated (similar to Fig. 1 (a)).

The generated signals arrive at KS 5 and are transmitted to the inputs of SF 6, which consists of a filter block for all signals from the form. As a result, only at the 179th output of SF 6 will the ACF of this NPS associated with the transmission of the symbol N be formed, and only at the 180th output - for the transmitted symbol O.

The decision device 7 generates recognition signals based on the ACF peaks h=179 and 180 respectively. Note that these signals are transmitted to the inputs of VEDS 10 at different times. In accordance with the used principle of mutual unambiguity of bytes and NPS, the bytes of encrypted discrete messages N and O are restored at the output of device 10, which are then decrypted in decryptor 11. Decryption key generator 8 and decryptor 11 provide complete regeneration, that is, restoration of the transmitted discrete message.

The driver interface 22 (which may be USB 2.0 or any other faster standard that may be developed in the future) ensures optimal transmission of the message to the output to the consumer. The work of transmitting a discrete NO message from input to output is completed.

When using a coding system with g1 characters, the form must include g3≥g=g1 NPS, it is required to group discrete messages into blocks of g2=log ₂ g1 (round up to the nearest integer) elements.

6. Justification for achieving a technical result.

The technical result consists in increasing the security of the transmission of discrete messages by encrypting codes and ensuring energy-secret transmission of discrete messages to the user via a communication channel, including in the presence of noise, in an optimal manner.

Energetically secretive transmission of discrete messages is ensured by transmission of the broadband in the form of ensemble codes at a level below the noise level (ρ ² <<1, where ρ ² is the ratio of the powers of the broadband and interference) [6]. The signal-to-noise ratio at the output of the SF or correlator at optimal reception is 2⋅ times greater than at the input [6, p. 6]. It is necessary to use ensemble codes with a base B>>1 (codes with B=N=30 are presented). The larger the base, the greater the excess over noise and the higher the secrecy [6, p. 9]. In case of unauthorized access, it will be necessary to use special methods and devices to resolve the question of whether any signals are being transmitted, or whether there is only noise [6, p. 6]. The use of a receiving device in the form of a set of SFs for each ensemble code allows for optimal detection and discrimination of signals in the presence of noise [6].

7. Security of the device from unauthorized access.

Unauthorized access can only be carried out by searching through all possible options for converting byte numbers (their number is equal to the factorial and versions of ShPS, determined by the number of combinations as well as analysis of the results obtained. For example, for each option with g1=256, g3=259, a significant period of time is required. To establish the presence of informative significance in the received data (to determine whether it makes sense), a high-speed intelligent system is required, which increases the time consumption. Statistical methods for finding decryption keys are not applicable in this case. For any set of decryption keys, the output will be obtained; it is valid only for a single set of decryption keys. The number of options for enumerating encryption keys in two-operation encryption is equal to (g1 is the number of elements in the coding system, g3 is the number of codes from which a choice can be made, this parameter can be equal to thousands, tens of thousands or more [9, 10]). that is, the increase in the number of variations is nonlinearly greater than with any single operation, and the security against unauthorized access is the same number of times higher.

Preventing the possibility of unauthorized access increases the security of data transmission from source to user. Encryption keys must be kept secret, updated frequently, and it is advisable to make the encryption and decryption key generators disconnectable from the power supply.

8. Application options for the claimed method and system.

The claimed method and system can be applied if the source of discrete input messages are signals from sensors or a database; the information can be transmitted to the consumer via twisted pair cable, fiber optic cable, or radio channel. At the same time, the function of secretly transmitting discrete messages is implemented, including in conditions of noise and interference. KS 5 can use different physical environments.

The claimed device can be used in covert and secure remote control systems for objects designed to move and perform required operations in various physical environments in the presence of interference. Objects can be robotic systems, aircraft and swimming vehicles. It is possible to transmit discrete messages at the noise level in the same frequency range and time interval as high-level signals that significantly exceed the noise level. This will increase the total volume of messages transmitted to the consumer per unit of time. The method and system can be used in the case of transmission of pre-encrypted discrete messages [21] and redundantly encoded messages.

9. Power supply.

Energy supply is determined based on the use case of the system, for example, from stationary sources or from small-sized batteries. The type of connectors depends on the type of KS 5 (USB connectors, high-frequency connectors).

Bibliographic list.

1. Patent RU No. 2309547, “Method of transmitting information”; MPK N04K 1/00; published 10.27.2007, Bull. No. 30.

2. Patent RU No. 2349044, “Method of covert transmission of information”; IPC H04L 9/00; published 03/10/2009, Bull. No. 7.

3. Patent RU No. 2509423, “Method of covert transmission of information”; IPC H04L 9/00, G06F 21/60; published 03/10/2014, Bull. No. 7.

4. Patent RU No. 2652434, “Method for transmitting and receiving discrete information signals”; IPC H04L 7/00, Н04 В 1/69, Н04 В 1/7073, H04L 29/02; published 04/26/2018, Bulletin. No. 12.

5. Patent RU No. 2326500, “Coherent system for transmitting information by chaotic signals”; IPC: H04L 9/00; published 06/10/2008, Bull. No. 16.

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7. Cheprukov Yu.V., Sokolov M.A. Synthesis of phase-shift keyed signals with the required level of ACF side peaks // Radio engineering. 1991. No. 5. P.68-70.

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9. Cheprukov Yu. V., Sokolov M. A. Correlation characteristics and application of some binary R3 codes // Information and control systems. 2014. No. 3. P.93-102.

10. Cheprukov Yu. V., Sokolov M. A. Correlation characteristics of some binary K4 codes and ensembles of signals based on them // Information and control systems. 2014. No. 5. P.87-96.

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12. ftp://ftp.vt.tpu.ru/studv/Malchukov/public/PHDL/Projects/ascii.pdf, November 28, 2020

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Claims (72)

1. A method for transmitting discrete messages with code encryption, in which discrete messages consist of elements in the form of logical ones and zeros or of positive and negative logical ones, including on the transmitting side the conversion of one type of discrete message into a wideband signal and the conversion of elements of another type of this discrete messages into another broadband signal, transmitting this sequence of broadband signals over a communication channel, followed by a coordinated filtering operation on the receiving side, comparing the received signal with a threshold level, characterized in that selecting g1 different elements for the discrete message coding system and assigning to each of them a numerical value a, varying from zero to (g1-1), grouping sequential elements of the input discrete message into blocks of duration T _b of g2 elements, where g2=log ₂ g1 rounded up to the nearest whole number or setting parameter g2 to a value equal to the number of elements in the block of the input encrypted discrete message or redundantly encoded message, with g1=2 ^a , a=g2, introducing a correspondence between each numerical value a in the selected coding system and a set of elements of any block of grouped discrete messages, selecting g3≥g1 different noise-like signals, the level of the side peaks of the autocorrelation and cross-correlation functions of which is no more than positive numbers R and W, respectively, where R and W - numbers less than the largest value u _t of the modulus of autocorrelation functions of these noise-like signals, numbering of selected noise-like signals sequentially with integers from 1 to g3 and their location in the form, compiling encryption keys in the form of a sequence M _j , j=1, 2, ... g1, so that each value of this sequence A, specified by the user, is equal to the sequence number of one of the noise-like signals from the form reduced by one, is one of the positive integers from 0 to (g3-1) and is used only once, where g1 is the number of symbols in the coding system, g3 is the number of noise-like signals entered into the form, establishing a one-to-one correspondence between each block of input discrete messages with a numerical value a and one of the noise-like signals from the form with the number A+1=M _α+1 +1, designated S _A+1 , the location of each of the selected noise-like signals within the interval following the interval where the block of elements of the input discrete message is located, to which, according to the encryption keys, the proper noise-like signal is assigned, creating a sequence of noise-like signals S _a+1 selected in the specified manner, which corresponds to a sequence of blocks of grouped elements of input discrete messages, transmitting a sequence of noise-like signals through the communication channel propagation medium to the receiving side directly or using this sequence as modulating signals of carrier oscillations, implementing coordinated filtering of the received sequence with all g3 different optimal filters, each of which is matched with one of the noise-like signals included in the form, comparing each of the output signals of the matched filters with the corresponding threshold level U _p , which is selected greater than the largest of the numbers R and W and which must be less than the largest value of the signal at the output of the matched filter when there is a noise-like signal at the filter input with which this filter is matched, checking whether each of the signals received after performing coordinated filtering of all received noise-like signals S _A+1 with number A+1 exceeds the value of the corresponding threshold level U _p and, if exceeded, generating a recognition signal D _{A+1 of} the received noise-like signal, setting its number in form, restoration from recognition signals D _A+1 of the sequence Х°=(X° _j , j=1, 2, …), 0≤Х°≤(g3-1), each element of which corresponds to one of the encryption keys A used on the transmitting side and is equal to the value of one of the blocks of discrete messages, definition of decryption keys in the form of elements of the sequence M'=(M' _j , 1≤j≤g3), each value of which is one of the positive integers from 0 to (g1-1), used in the sequence only once, and the elements of this sequence are obtained in such a way that the serial numbers jx of the elements of the sequence of encryption keys M _j , j=l, 2, ..., g1 are reduced by one and swapped with the values of the elements of this sequence, the serial numbers of this new created numerical sequence are increased by one and the elements of the resulting sequence with their modified serial numbers are arranged in ascending order of these numbers, carrying out decryption by changing the arrangement of the elements of each block of encrypted discrete messages X° _j , j=1, 2, ..., so that the values of X° to which these blocks correspond are replaced with decryption keys, which determines the sequence of elements of the blocks of output discrete messages: "If" X° _j =0, "THEN" _Xoutj =M' ₁ , or "If" X° _j =1, "THEN" X _outj =M' ₂ , or "If" X° _j =2, "THEN" X _outj =M' ₃ , or... "If" X° _j =(g3-1), "THEN" _Xoutj =M' _g3 , where j=1, 2, … - block numbering index; X° _j is the value of the j-th encrypted block of discrete messages; X _outj - the value of the j-th decrypted block of output discrete messages; M' ₁ M'₂;…;M' _g3 - sequence of decryption key values, transmission of discrete messages X _out to the output of the recipient. 2. The method according to claim 1, characterized in that all elements of the encoding system are different and can be presented in the form of numbers, or symbols, or combinations of symbols, or combinations of symbols and numbers, or in the form of multimedia files. 3. The system for transmitting discrete messages with encryption contains a generator of noise-like signals, a communication channel, a matched filter, a decision device, characterized in that the system additionally includes a converter of input discrete messages, a switch unit, a switch control unit, a decryption key generator, a code encryption key generator, a restorer of discrete message elements, a decoder, wherein the input of the input discrete message converter is connected to the input of the discrete message transmission system with code encryption, the discrete input message converter contains g1 outputs, which are connected respectively to the same number of inputs of the first functional group of inputs of the switch block, the second functional group of inputs of the switch block is connected to the functional group of outputs of the switch control block, the functional group of inputs of the switch control block is connected to the outputs of the encryption key generator codes, the functional groups of outputs of the switch block are connected to the functional group of inputs of the noise-like signal generator, the output of the noise-like signal generator is connected to the input of the communication channel, the output of which is connected to the input of the matched filter containing g3 outputs connected to the same number of inputs of the decision device having g3 outputs , connected to the same number of inputs of the discrete message element restorer, the output of which is connected to the second input of the decryptor, the first input of the decryptor is connected to the output of the decryption key generator, the output of the decryptor is connected to the output of the entire system, where g3 is the number of noise-like signals entered into the form, while the generator of noise-like signals generates a set g3 of noise-like signals that satisfy such conditions that the level of the side peaks of the autocorrelation function of each signal does not exceed a positive number R, where R<u _m is the largest value of the modulus of the autocorrelation functions of these noise-like signals, and the level of the side peaks of the cross-correlation function each code or noise-like signal based on them with all other (g3-1) generated codes or signals also does not exceed a positive number W, where W<u _m , where g3 is the number of selected noise-like signals; the code encryption key generator generates signals corresponding to the elements of the sequence M=(M _j , j=1, 2, ..., g1), each value of which is one of the positive integers from 0 to (g3-1), used only once; the code decryption key generator generates signals corresponding to the elements of the decryption key sequence M'=(M' _j , 1≤j≤g3), each value is a positive integer from 0 to (g1-1), used only once, the decryption key values are obtained So the serial numbers j-x of the elements of the sequence of encryption keys for codes M are reduced by one and swapped with the values of the elements of this sequence, the serial numbers of the new numerical sequence are increased by one and the elements of the resulting sequence with their changed serial numbers are arranged in ascending order of these numbers; The reconstructor of elements of discrete messages, based on signals from the decision device, reproduces on the receiving side blocks of previously encrypted and transmitted via a communication channel of discrete messages X° _j , j=1, 2, ... of the form: "If" X _вxj =0, "THEN" X° _j =M ₁ , or "If" X _вxj =1, "THEN" X° _j =М ₂ , or "If" X _inj =2, "THEN" X° _j =M ₃ , or ... "If" X _inxj =(g1-1), "THEN" X° _j =M _g1 , where j=1, 2, … - block numbering index; X _input j - value of the j-th block of input discrete messages; Х° _j is the value of the j-th encrypted block of discrete messages; M ₁ ; _M2 ; …, M _g1 - sequence of code encryption key values; g1 - number of characters in the selected encoding system; g3 - number of selected noise-like signals; the decoder generates decrypted signals _Xуxj , j=1, 2, …, based on the conditions: "If" X° _j =0, "THEN" X _vyxj =M' ₁ , or "If" X° _j =1, "THEN" X _vyxj =M' ₂ , or "If" X° _j =2, "THEN" X _vyxj =M' ₃ , or ... "If" X° _j =(g3-1), "THEN" X _outj =M' _g3 , where j=1, 2, … - block numbering index; X° _j is the value of the j-th block of discrete messages before decryption; X _outj - the value of the j-th block of output discrete messages of the system; M'₁;M'₂; …, M' _g3 - sequence of decryption key values, g3 - number of selected noise-like signals. 4. The system according to claim 3, characterized in that the converter of input discrete messages contains a coupling device of the converter and a logical device of the converter, the input of the coupling device is connected to the input of the converter of input discrete messages, the output of the coupling device is connected to the input of the logical device of the converter, g1 of which outputs are connected with corresponding outputs of the converter of input discrete messages; the logical device of the converter is made on logical elements or programmable logic matrices; the interface device is made of passive elements, or transistors, or microcircuits, or in the form of a universal serial bus USB. 5. The system according to claim 3, characterized in that the generator of noise-like signals is a functional group of g3 shapers for each of the noise-like signals, the inputs of the shapers form a functional group of generator inputs, the outputs of the shapers are connected in parallel and form a functional group of outputs of the generator of noise-like signals; noise-like signal generators are made in the form of devices based on surface acoustic waves or discrete circuitry elements, or in the form of a storage device, or on programmable logic matrices for direct transmission over a communication channel; The noise-like signal shapers are made in the form of devices for generating codes of noise-like signals or noise-like signals themselves, and in the form of a carrier oscillation modulator for transmitting said codes and signals over a communication channel, so that the modulating signals are these codes and signals. 6. The system according to claim 3, characterized in that the switch block contains a functional group of g1 switches, the first inputs of which are connected to the corresponding inputs of the first functional group of inputs of the switch block, the second switch inputs represent g1 functional groups, each of which consists of g3 inputs connected to the corresponding inputs of the second functional groups of inputs of the switch block, each switch contains g3 outputs that are connected to the outputs of the switch block, where g1 is the number of symbols in the encoding system, g3 is the number of selected noise-like signals; The switch block is made on elements of analog or digital circuitry or programmable logic matrices. 7. The system according to claim 3, characterized in that the switch control unit contains a functional group of g1 control drivers, the inputs of which are connected to the inputs of the switch control unit, the outputs of each control driver form a functional group of g3 outputs connected to the corresponding outputs of the switch control unit , g1 is the number of symbols in the coding system, g3 is the number of selected noise-like signals; The switch control unit is made on elements of analog or digital circuitry or programmable logic matrices. 8. The system according to claim 3, characterized in that the code encryption key generator is made on discrete circuitry elements, or in the form of a storage device, or on programmable logic matrices. 9. The system according to claim 3, characterized in that the decryption key generator is made on discrete circuitry elements, or in the form of a storage device, or on programmable logic matrices. 10. The system according to claim 3, characterized in that the communication channel is a set of technical means, such as a modulator, transmitter, receiver, demodulator, and a physical medium, such as a gas, or a liquid, or a solid, or a vacuum; the communication channel is a line of wired electrical communication, or radio communication, or an audio acoustic communication channel, or a light optical communication line; The communication channel is made in the form of conductors of circuit elements or a fiber-optic cable, or a coaxial cable, or a waveguide, or an audio cable, or a twisted pair, or a radio channel for terrestrial or satellite communications. 11. The system according to claim 3, characterized in that the matched filter is a functional group of g3 matched filters, the inputs of which are connected in parallel, the impulse responses of each of the matched filters are optimal for one of the various signals of the noise-like signal generator, the outputs of each of the matched filters are functional groups of outputs of all matched filters, where g3 is the number of selected noise-like signals; The matched filter is made on elements of analog or digital circuitry, devices on surface acoustic waves. 12. The system according to claim 3, characterized in that the decision device is a functional group of g3 decision devices, the inputs and outputs of which are the inputs and outputs of this functional group, where g3 is the number of selected noise-like signals; The decisive device is made on elements of analog or digital circuitry. 13. The system according to claim 3, characterized in that the restorer of discrete message elements is made on discrete circuitry elements, or in the form of a storage device, or on programmable logic matrices. 14. The system according to claim 3, characterized in that the decryptor contains a decryption key converter, a decryption logical device, a decryptor interface device, the input of the decryption key converter is connected to the first input of the decryptor, the output of the decryption key converter is connected to the first input of the decryption logical device, the second input the decryption logical device is connected to the second input of the decryptor, the output of the decryption logical device is connected to the input of the decryptor interface device, the output of the interface device is the output of the decryptor and the entire claimed system; the decryptor is made on logical elements or programmable logic matrices; The interfacing device of the decryptor is made of passive elements, or transistors, or microcircuits, or as a universal serial bus USB.

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