RU2817330C1 - Power converter and heat pump system equipped with it - Google Patents

Abstract

FIELD: physics.

SUBSTANCE: invention relates to power converters. For this purpose, a power converter is proposed, in which inverter (21) of the compensation unit supplies current by switching elements (Sr1, Sr2, Ssl, Ss2, Stl, St2) compensating current (Ia(uvw)) to AC power supply (2) through current compensation unit throttle (23) so that expression (1) is satisfied: Td ≤ (34.00/fsw−0.145)(1.55−0.055*Pmax), where fsw (kHz) represents the carrier frequency used to generate the excitation signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), and Td (µs) is nonworking time for the excitation signal (Sd).

EFFECT: higher efficiency of compensation for harmonic component contained in load current in power converter including current compensation unit.

14 cl, 31 dwg

Description

Field of technology to which the invention relates

[0001] The present disclosure relates to a power converter including a power conversion unit that performs power conversion for three-phase alternating current output from an AC power supply, and a current compensation unit that supplies compensating current to the AC power supply, and to a system heat pump, including a power converter.

State of the art

[0002] Patent Document 1 discloses a power converter including a power conversion unit that performs power conversion for three-phase alternating current output from an AC power supply, and a current compensation unit that supplies compensating current to the AC power supply. In this power converter, the current compensation unit includes a current compensation unit inverter including a plurality of switching elements, a current compensation unit capacitor connected between nodes on the DC side of the current compensation unit inverter, a current compensation unit inductor connected between the AC side of the inverter a current compensation unit and an AC power supply, a compensation controller that receives a command value of the output voltage so that a harmonic component contained in the power supply current supplied to the power converter from the AC power supply is reduced by the compensation current, and a driving signal generator, which generates a driving signal for driving a plurality of switching elements in a three-phase modulation manner based on a command value of the output voltage.

List of links

Patent document

[0003] Patent document

1: Japanese Unexamined Patent Publication No. 2015-92813

The essence of the invention

Technical problem

[0004] Such a power converter including a current compensation unit as in Patent Document 1 cannot achieve significant compensation of the harmonic component in the load current in some cases if the carrier period of the inverter current compensation unit includes a long non-operating time ("dead time"). time").

[0005] An object of the present disclosure is to more effectively compensate for the harmonic component contained in a load current in a power converter including a current compensation unit.

Solution

[0006] The first aspect of the present disclosure is directed to a power converter including a power conversion unit (10) that performs power conversion for three-phase alternating current output from an alternating current power source (2); and a current compensation unit (20) that supplies a compensating current (Ia(uvw)) to the AC power source (2), wherein the current compensation unit (20) includes: a current compensation unit inverter (21), including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a capacitor (22) of the current compensation unit, connected between the nodes (21a, 21b) on the DC side of the inverter (21) of the current compensation unit; a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the power supply current (Is(uvw)) supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); and an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) by three-phase modulation, the inverter (21) of the current compensation unit supplies, through the switching operation of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23) of the compensation unit current, and Expression (1) below is satisfied:

[0007]

where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), and Td (μs) represents the non-operating time (dead time) for the driving signal (Sd ).

In the first aspect, compared with the case where Expression (1) is not satisfied, the harmonic component contained in the current (Is(uvw)) of the power supply can be more effectively reduced. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2, which is the harmonic vibration standard set by the International Electrotechnical Commission (IEC).

[0008] The second aspect of the present disclosure is directed to a power converter including a power conversion unit (10) that performs power conversion for three-phase alternating current output from an alternating current power source (2); and a current compensation unit (20) that supplies a compensating current (Ia(uvw)) to the AC power source (2), wherein the current compensation unit (20) includes: a current compensation unit inverter (21), including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2); a current compensation unit capacitor (22) connected between the nodes (21a, 21b) on the DC side of the current compensation unit inverter (21); a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the current (Is(uvw)) of the power supply supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); and an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) by a two-phase modulation method, an inverter (21) of the current compensation unit supplies, through the switching operation of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23) of the compensation unit current, and Expression (2) below is satisfied:

[0009]

where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), and Td (μs) represents the non-operating time for the driving signal (Sd).

In the second aspect, compared with the case where Expression (2) is not satisfied, the harmonic component contained in the current (Is(uvw)) of the power supply can be more effectively reduced. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2, which is the harmonic vibration standard set by IEC.

[0010] Since the two-phase modulation method is used to generate the drive signal (Sd), the non-operating time can be set to be longer compared with the case when the three-phase modulation method is used.

[0011] The third aspect of the present disclosure is directed to a power converter including a power conversion unit (10) that performs power conversion for three-phase alternating current output from an alternating current power source (2); and a current compensation unit (20) that supplies a compensating current (Ia(uvw)) to the AC power source (2), the current compensation unit (20) includes: a current compensation unit inverter (21) including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2); a current compensation unit capacitor (22) connected between the nodes (21a, 21b) on the DC side of the current compensation unit inverter (21); a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the current (Is(uvw)) of the power supply supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); and an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) by three-phase modulation, the inverter (21) of the current compensation unit supplies, through the switching operation of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23) of the compensation unit current, and Expressions (3) and (4) below are satisfied:

[0012]

where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), Td (μs) represents the non-operating time for the driving signal (Sd), and Lac ( mH) represents the inductance of the current compensation unit inductor (23) when the current flowing in the current compensation unit inductor (23) is 0 A.

In the third aspect, compared with the case where at least one of Expression (3) or (4) is not satisfied, the harmonic component contained in the current (Is(uvw)) of the power supply can be more effectively reduced. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2, which is the harmonic vibration standard set by IEC.

[0013] The fourth aspect of the present disclosure is directed to a power converter including a power conversion unit (10) that performs power conversion for three-phase alternating current output from an alternating current power source (2); and a current compensation unit (20) that supplies a compensating current (Ia(uvw)) to the AC power source (2), wherein the current compensation unit (20) includes: a current compensation unit inverter (21), including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2); a current compensation unit capacitor (22) connected between the nodes (21a, 21b) on the DC side of the current compensation unit inverter (21); a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the current (Is(uvw)) of the power supply supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); and an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) by a two-phase modulation method, an inverter (21) of the current compensation unit supplies, through the switching operation of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23) of the compensation unit current, and Expressions (5) and (6) below are satisfied:

[0014]

where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), Td (μs) represents the non-operating time for the driving signal (Sd), and Lac ( mH) represents the inductance of the current compensation unit inductor (23) when the current flowing in the current compensation unit inductor (23) is 0 A.

In the fourth aspect, compared with the case where at least one of Expression (5) or (6) is not satisfied, the harmonic component contained in the current (Is(uvw)) of the power supply can be more effectively reduced. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2, which is the harmonic vibration standard set by IEC.

[0015] Since the two-phase modulation method is used to generate the drive signal (Sd), the non-operating time can be set to be longer compared with the case when the three-phase modulation method is used.

[0016] The fifth aspect of the present disclosure is an embodiment of the third or fourth aspect. In the fifth aspect, the ratio of the inductance of the current compensation unit inductor (23) when the current flowing in the current compensation unit inductor (23) is a peak current to the inductance of the current compensation unit inductor (23) when the current flowing in the inductor (23) current compensation unit is 0 A, set to 1/3 or more.

[0017] In the fifth aspect, the harmonic component contained in the current (Is(uvw)) of the power supply can be more reliably reduced, and the compensation current (Ia(uvw)) can be stably adjusted compared with the case where the ratio is set to less than 1/3.

[0018] The sixth aspect of the present disclosure is an embodiment of any one of the first through fifth aspects. In the sixth aspect, the power converter includes: a filter (24) inserted between the AC power supply (2) and a current compensation unit inductor (23), the filter (24) includes a filter inductor (24a) with a lower inductance than with the inductance of the current compensation unit inductor (23) and the filter capacitor (24b) and has a resonant frequency of 4 kHz or higher.

[0019] In the sixth aspect, the influence of the resonance of the filter (24) on the compensation current (Ia(uvw)) can be reduced at a frequency below 4 kHz. Thus, in the case where the frequency of the three-phase alternating current is 50 Hz or 60 Hz, harmonic components up to 40th in the power supply current (Is(uvw)) can be reliably reduced, and the compensating current (Ia(uvw)) can steadily regulated.

[0020] The seventh aspect of the present disclosure is an embodiment of the second or fourth aspect. In the seventh aspect, the driving signal generator (27) generates a driving signal (Sd) based on the output voltage command signal (Vid, Viq), so that the amplitude percentage of the AC side mains voltage relative to the DC voltage (Vdc) between the nodes (21a, 21b) on the DC side of the inverter (21) of the current compensation unit is 70% or more.

[0021] In the seventh aspect, compared with the case where the percentage is less than 70%, the rapid change in the on duration of the switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) of the inverter (21) of the current compensation unit when switching the target phase modulation can be more restrained, and therefore the harmonic component contained in the current (Is(uvw)) of the power supply can be more reliably reduced.

[0022] The eighth aspect of the present disclosure is an embodiment of the second or fourth aspect. In the eighth aspect, the compensation controller (26) includes a voltage command value calculating unit (29) that calculates an output voltage command value (Vid, Viq) based on the DC voltage (Vdc) between the DC side nodes (21a, 21b) inverter (21) of a current compensation unit and based on the command value (Vdc*) of the DC voltage, and a unit (28) for calculating the command value of the DC voltage, which calculates the command value (Vdc*) of the DC voltage based on the command value (Vid, Viq) of the output voltage, so that the command value (Vdc*) of the DC voltage is equal to or less than twice the average mains voltage on the AC side of the inverter (21) of the current compensation unit or the fundamental frequency component of the mains voltage on the AC side of the inverter (21) of the compensation unit current.

[0023] In the eighth aspect, compared with the case where the command value (Vdc*) of the DC voltage is higher than twice the average line voltage on the AC side of the inverter (21) of the current compensation unit or the fundamental frequency component of the line voltage on the AC side of the inverter ( 21) current compensation unit, the rapid change in the switching duration of the switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) of the inverter (21) current compensation unit when switching the phase of the modulation target can be more restrained, and therefore the harmonic component, contained in the current (Is(uvw)) of the power supply can be more reliably reduced.

[0024] The ninth aspect of the present disclosure is an embodiment of any one of the first through eighth aspects. In the ninth aspect, the power conversion unit (10) includes: a rectifier circuit (11) that rectifies three-phase alternating current into direct current, a power conversion unit inverter (12) that converts direct current into alternating current, a conversion unit capacitor (14). power connected between the nodes (12a, 12b) on the DC side of the inverter (12) of the power conversion unit and configured to allow fluctuations in the output voltage of the rectifier circuit (11), and the inductor (13) of the power conversion unit connected between the source ( 2) AC power and one end of the capacitor (14) of the power conversion unit.

[0025] In a ninth aspect, the power conversion unit capacitor (14) and the power conversion unit inductor (13) form a filter (LC1). Thus, by setting the capacitance of the power conversion unit capacitor (14) correctly, the fluctuation in the current flowing between the power conversion unit inverter (12) and the AC power source (2) according to the carrier wave frequency of the power conversion unit inverter (12) due to the switching operation the inverter (12) of the power conversion unit can be stopped.

[0026] In addition, the capacitor (14) of the power conversion unit allows the output voltage of the rectifier circuit (11) to fluctuate, so that the fluctuation of the compensating current (Ia(uvw)) can be suppressed, and the harmonic component contained in the current (Is(uvw) )) power supply can be more reliably reduced.

[0027] The tenth aspect of the present disclosure is an embodiment of the ninth aspect. In the tenth aspect, the capacitance of the capacitor (22) of the current compensation unit is greater than the capacitance of the capacitor (14) of the power conversion unit.

[0028] In the tenth aspect, the capacitance of the capacitor (22) of the current compensation unit can be set large enough to suppress the ripple of the DC voltage (Vdc) between the nodes (21a, 21b) on the DC side of the inverter (21) of the current compensation unit compared to DC voltage ripple between nodes (12a, 12b) on the DC side of the inverter (12) of the power conversion unit. In this way, the harmonic component contained in the current (Is(uvw)) of the power supply can be more reliably reduced.

[0029] The eleventh aspect of the present disclosure is an embodiment of any one of the first through tenth aspects. In the eleventh aspect, the inverter (21) of the current compensation unit includes six unipolar transistors forming three branches as switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), and the driving signal generator (27) generates the driving signal (Sd ) so as to force the inverter (21) of the current compensation unit to perform a synchronous rectification operation.

[0030] In the eleventh aspect, the voltage generated when the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) are turned on may be lower than the voltage in the case where bipolar transistors are used as the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2). Thus, an error caused in the output voltage (Va(uvw)) output from the current compensation unit inverter (21) relative to the output voltage command value (Vid, Viq) due to such voltage can be suppressed. Accordingly, the harmonic component contained in the current (Is(uvw)) of the power supply can be more reliably reduced.

[0031] The twelfth aspect of the present disclosure is an embodiment of the eleventh aspect. In the twelfth aspect, the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) are elements made of wide bandgap semiconductor material as the main material, and the on-state resistance of each switching element (Sr1, Sr2, Ss1, Ss2 , St1, St2) is 100 mOhm or less.

[0032] In the twelfth aspect, the switching speed of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) can be increased, and therefore the non-operating time can be easily reduced. Accordingly, it is easy to reduce the harmonic component contained in the current (Is(uvw)) of the power supply.

[0033] The thirteenth aspect of the present disclosure is an embodiment of any one of the first through twelfth aspects. In the thirteenth aspect, the carrier frequency is 100 kHz or less.

[0034] In the thirteenth aspect, the non-operating time can be kept longer than the non-operating time in the case where the carrier frequency is set above 100 kHz.

[0035] The fourteenth aspect of the present disclosure is directed to a heat pump system including a power converter according to any one of the first to thirteenth aspects, a power conversion unit (10) receiving a three-phase alternating current input through three conductors (601, 602, 603), and the heat pump system (1) further includes a harmonic oscillation generating source (300, 400) that generates a harmonic oscillation in the current in at least one (601, 602) of the three conductive wires (601, 602, 603 ).

[0036] In the fourteenth aspect, in the heat pump system (1), the harmonic component contained in the current (Is(uvw)) of the power supply can be effectively reduced. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2, which is the harmonic vibration standard set by IEC. Brief description of drawings

[0037] FIG. 1 is a block diagram showing the configuration of an air conditioning system.

Fig. 2 is a block diagram showing the configuration of a power converter according to the first embodiment of the present disclosure.

Fig. 3 is a circuit diagram of the inverter current compensation unit.

Fig. 4 is a graph showing the relationship between the non-operating time for the driving signal and the ratio of the magnitude of the harmonic component emitted in the experiment to the upper limit of harmonic current emissions that is defined in IEC61000-3-2 when the three-phase modulation method is applied.

Fig. 5 is a graph showing the relationship between the maximum input power of the power conversion unit and the ratio of the magnitude of the harmonic component emitted in the experiment to the upper limit of harmonic current emissions, which is defined in IEC61000-3-2, when the three-phase modulation method is applied, and the two-phase modulation method is applied. .

Fig. 6 is a table showing, for a variety of types of second carrier frequencies, the non-operating time with which the magnitude of the harmonic component in the power supply current reaches the upper limit for harmonic current emissions, which is defined in IEC61000-3-2, when a three-phase modulation method or a two-phase modulation method is applied. modulation.

Fig. 7 is a graph corresponding to the table in FIG. 6.

Fig. 8 is a graph showing a graph of the upper limit for harmonic current emissions, which is defined in IEC61000-3-2, and the values of the harmonic component current contained in the power supply current, with respect to orders of magnitude in the case where the second carrier frequency is 32 kHz, the maximum input power The power conversion unit is 10 kW, and the non-operating time is 0.5 μs and 1.0 μs when the three-phase modulation method is applied.

Fig. 9A is a timing diagram of the power supply current, compensation current and load current in the case where the non-operating time of the driving signal is 0.5 μs, the second carrier frequency is 16 kHz, the maximum input power of the power conversion unit is 10 kW, and the inductance of the unit inductor is current compensation with a current of 0 A flowing in the choke of the current compensation unit is 1.0 mH.

Fig. 9B is a timing chart corresponding to FIG. 9A, illustrating the case where the maximum input power of the power conversion unit is 10 kW, and the inductance of the current compensation unit inductor with a current of 0 A flowing in the current compensation unit inductor is 2.2 mH.

Fig. 9C is a timing diagram corresponding to FIG. 9A, illustrating the case where the maximum input power of the power conversion unit is 5 kW, and the inductance of the current compensation unit inductor with a current of 0 A flowing in the current compensation unit inductor is 1.0 mH.

Fig. 9D is a timing chart corresponding to FIG. 9A, illustrating the case where the maximum input power of the power conversion unit is 5 kW, and the inductance of the current compensation unit inductor with a current of 0 A flowing in the current compensation unit inductor is 2.2 mH.

Fig. 10 is a circuit diagram showing an equivalent circuit of a current compensation unit.

Fig. 11 is a block diagram showing a current control system included in a current compensation unit.

Fig. 12A shows a gain diagram of the transfer functions Gp, Gc and their sum.

Fig. 12B shows a phase diagram of the transfer functions Gp, Gc and their sum.

Fig. 13A is a graph showing the DC stacking characteristics of the inductor of the current compensation unit in the case where the ratio of the peak current inductance to the zero current inductance is less than 1/3.

Fig. 13B is a graph corresponding to FIG. 13A, illustrating a case where the ratio of the peak current inductance to the zero current inductance is 1/3 or more.

Fig. 14A is a timing chart of examples of power supply current, load current and compensation current in the case where the maximum input power of the power conversion unit is 10 kW, and the capacitance value of the power conversion unit is set such that fluctuation in the output voltage of the rectifier circuit is absorbed by the capacitance.

Fig. 14B is a timing diagram corresponding to FIG. 14A, illustrating a case where the capacitance value of the power conversion unit capacitor is set such that fluctuation in the output voltage of the rectifier circuit is allowed.

Fig. 15A is a timing diagram showing, as an example, the power supply current, compensation current and DC voltage in the case where the capacitance of the current compensation unit capacitance is 195 μF, and the capacitance of the power conversion unit is 30 μF.

Fig. 15B is a timing chart corresponding to FIG. 15A, illustrating the case where the capacitance of the current compensating unit is 15 μF, and the capacitance of the power conversion unit is 30 μF.

Fig. 16 is a graph showing the relationship between the conducting voltage and the current flowing in the return diode in the case where a Si-PiN diode is provided as the return diode in counter-parallel to the switching element, or the current flowing in the opposite direction in the switching element in the case of , when the switching element is a MOSFET.

Fig. 17 is a graph corresponding to FIG. 4, illustrating a case where a two-phase modulation method is used.

Fig. 18 is a graph showing a graph of the upper limit for harmonic current emissions, which is defined in IEC61000-3-2, and the values of the harmonic component current contained in the power supply current, with respect to orders of magnitude in the case where the second carrier frequency is 48 kHz, the maximum input power The power conversion unit is 10 kW, and the non-operating time is 0.5 μs and 1.0 μs when the two-phase modulation method is applied.

Fig. 19A is a timing chart showing the DC voltage, power supply current, load current and compensation current in the case where the second carrier frequency is 48 kHz, the maximum input power of the power conversion unit is 10 kW, and the non-operating time is 0.5 μs.

Fig. 19B is a timing diagram corresponding to FIG. 19A, illustrating the case where the non-operating time is 1.0 μs.

Fig. 20 is a block diagram showing the configuration of a driving signal generator according to the second embodiment.

Fig. 21A is a graph showing the relationship between on-times and phases of three switching elements of the upper arm of the inverter of the current compensation unit in the case where the modulation ratio is 40%.

Fig. 21B is a graph corresponding to FIG. 21A illustrating the case where the modulation ratio is 70%.

Fig. 22 is a diagram corresponding to FIG. 2 illustrating the third embodiment.

Description of Embodiments

[0038] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. The following embodiments are merely exemplary embodiments in nature and are not intended to limit the scope, application or use of the present invention.

[0039] "First Embodiment"

Fig. 1 shows an air conditioning system (1) as a heat pump system. The air conditioning system (1) includes a power converter (100) according to the first embodiment of the present disclosure, an interference filter (200), an indoor unit (300) as a harmonic source, an outdoor fan (400) as a harmonic source, and a compressor (500).

[0040] The power converter (100) performs power conversion for three-phase alternating current output from the alternating current power source (2) and received through the noise filter (200). The AC power supply (2) is a three-phase, four-wire AC power supply. Three-phase alternating current is introduced into the power converter (100) through three first to third conductive wires (601, 602, 603).

[0041] The indoor unit (300) is driven by alternating current received through the first conductive wire (601) and the neutral wire (604). The indoor unit (300) generates a harmonic in the first conductor (601).

[0042] The outdoor fan (400) is driven by power received through the second conductive wire (602) and the neutral wire (604). The outdoor fan (400) generates a harmonic in the second conductor (602).

[0043] The compressor (500) includes a motor (501) (see FIG. 2). The motor (501) receives alternating current obtained through power conversion performed by the power converter (100).

[0044] As shown in FIG. 2, the power converter (100) includes a power conversion unit (10) and a current compensation unit (20).

[0045] The power conversion unit (10) performs power conversion for three-phase alternating current output from the alternating current power source (2) and received through the first to third conductors (601, 602, 603). More specifically, the power conversion unit (10) includes a rectifier circuit (11), a power conversion unit inverter (12), a power conversion unit inductor (13), a power conversion unit capacitor (14), and a conversion control unit (15).

[0046] The rectifier circuit (11) rectifies the three-phase alternating current output from the alternating current power supply (2) into direct current and outputs the direct current to the first and second output nodes (11a, 11b). More specifically, the rectifier circuit (11) is a full-wave rectifier circuit. The rectifier circuit (11) includes six diodes (not shown) connected in a bridge configuration. These diodes have their cathodes facing the first output node (11a) and their anodes facing the second output node (11b).

[0047] The inverter (12) of the power conversion unit converts the direct current output from the rectifier circuit (11) into alternating current, and outputs the alternating current to the motor (501) of the compressor (500). More specifically, the power conversion unit inverter (12) includes six switching elements (not shown) and six flyback diodes (not shown). Six switching elements are connected in a bridge configuration. That is, the inverter (12) of the power conversion unit includes three switching branches connected between the first and second DC nodes (12a, 12b). Each switching branch includes two switching elements connected to each other in series.

[0048] Each of the three switching branches includes an upper leg switching element and a lower leg switching element, and the midpoint between the upper and lower switching elements is connected to the corresponding one of the phase windings (i.e., u-phase windings, v-phase windings). phase or w-phase) of the motor (501). The return circuit diodes are connected to the corresponding one of the switching elements in an anti-parallel manner.

[0049] One end of the inductor (13) of the power conversion unit is connected to the first output node (11a) of the rectifier circuit (11), and the other end of the inductor (13) of the power conversion unit is connected to the first DC node (12a) of the inverter (12) of the unit power conversion.

[0050] The power conversion unit capacitor (14) is connected between the first and second DC nodes (12a, 12i) of the power conversion unit inverter (12). Thus, the power conversion unit inductor (13) is connected between the AC power source (2) and one end of the power conversion unit capacitor (14).

[0051] The capacitance value of the capacitor (14) of the power conversion unit is set such that the capacitance value can successfully reduce the ripple voltage caused due to the switching operation of the inverter (12) of the power conversion unit, while the capacitance value can enable fluctuation in the output voltage rectifier circuits (11). The ripple voltage is a voltage fluctuation corresponding to the switching frequency of the switching element. Thus, the DC link voltage, which is the voltage of the capacitor (14) of the power conversion unit, contains a pulsating component that oscillates according to the frequency of the AC voltage of the AC power source (2).

[0052] More specifically, the capacitance of the power conversion unit capacitor (14) is set such that the fluctuation in the voltage of the power conversion unit capacitor (14) during a switching cycle is 1/10 or less for the average voltage of the power conversion unit capacitor (14). Thus, the minimum required capacitance of the power conversion unit capacitor (14) is determined depending on the switching frequency and the motor current flowing between the motor (501) and the power conversion unit capacitor (14).

[0053] By setting the value C of the capacitance of the power conversion unit capacitor (14) such that Expression (I) below is satisfied, the fluctuation in the voltage of the power conversion unit capacitor (14) during a switching cycle can be 1/10 or less for the average voltage capacitor (14) of the power conversion unit. In Expression (I), the fluctuation in the output voltage of the rectifier circuit (11) superimposed on the DC link voltage is ignored, VAdc represents the average value of the DC link voltage, Imax represents the peak value of the motor current obtained at maximum AC power, and Ts represents switching cycle.

[0054]

Here, the switching cycle is the duration of the intervals at which the switching element is repeatedly turned on and off. In the first embodiment, the switching element is under PWM control. Thus, the switching cycle corresponds to the carrier period for the first carrier wave used for PWM control.

[0055] The capacitor (14) of the power conversion unit is configured as a film capacitor, for example.

[0056] With such a relatively small capacitance, the power conversion unit capacitor (14) barely smoothes the output voltage of the rectifier circuit (11). As a result, the ripple component corresponding to the frequency of the AC power source (2) remains in the DC link voltage. The AC power supply (2) is a three-phase power supply. Thus, the ripple component corresponding to the frequency of the AC power source (2) has a frequency that is six times higher than the frequency of the AC power source (2).

[0057] The inductance component between the AC power supply (2) and the power conversion unit capacitor (14) and the power conversion unit capacitor (14) form the power conversion unit filter (LC1). The inductance component includes an inductor (13). The capacitance of the capacitor (14) of the power conversion unit is set such that the filter (LC1) of the power conversion unit attenuates the first carrier frequency component contained in the current. Here, the first carrier frequency is the frequency of the first carrier wave used to generate a control signal for the inverter (12) of the power conversion unit. This configuration can reduce fluctuation in the current flowing between the power conversion unit inverter (12) and the AC power supply (2), the fluctuation corresponding to the first carrier frequency due to the switching operation of the power conversion unit inverter (12).

[0058] The conversion control unit (15) controls the on/off switching of each switching element of the power conversion unit inverter (12) according to the control signal (Smd).

[0059] The current compensation unit (20) supplies a compensation current (Ia(uvw)) to the AC power source (2). Here, the direction of the compensation current (Ia(uvw)) from the AC power supply (2) to the current compensation unit (20) is considered to be the negative direction. For each phase, the power supply current (Is(uvw)) supplied from the AC power source (2) is the difference between the load current (Io)uvw)) directed from the AC power source (2) to the conversion unit (10) power, and compensating current (Ia(uvw)).

[0060] The current compensation unit (20) includes an inverter (21) of the current compensation unit, a capacitor (22) of the current compensation unit, chokes (23) of the current compensation unit corresponding to the corresponding phases, filters (24) of the current compensation unit corresponding to the corresponding phases, voltage sensor (25), compensation controller (26) and exciting signal generator (27).

[0061] As shown in FIG. 3, the inverter (21) of the current compensation unit includes six switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2). The switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) are unipolar transistors and are metal-oxide-semiconductor field-effect transistors (MOSFETs) made of wide bandgap semiconductor material as the base material. The on-resistance of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) is 100 mOhm or less. Six switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) form three switching branches connected between the first and second nodes (21a, 21b) on the DC side. Each switching branch includes two switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) connected to each other in series.

[0062] Each of the three switching branches includes a high-side switching element (Sr1, Ss1, St1) and a low-side switching element (Sr2, Ss2, St2), and the midpoint between the upper and lower switching elements is an AC side node . Each switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) includes a parasitic diode (RD). The parasitic diode (RD) serves as a flyback element that forces current to flow in the reverse direction.

[0063] Instead of unipolar transistors, the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) can be insulated gate bipolar transistors (IGBTs), which are a bipolar transistor. In this case, the return circuit diodes are connected to the corresponding switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) in an anti-parallel manner.

[0064] Even in the case where the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) are unipolar transistors as in the first embodiment, the flyback diodes, which have a lower forward voltage compared to the parasitic diode (RD) as in a configuration in which the switching elements (Sr1, Sr2, Ss1, SS2, St1, St2) are a plurality of IGBTs, can be connected to the corresponding switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) in an anti-parallel manner.

[0065] The current compensation unit capacitor (22) is connected between the nodes (21a, 21b) on the DC side of the current compensation unit inverter (21). The voltage of the capacitor (22) of the current compensation unit, that is, the voltage between the nodes (21a, 21b) on the DC side of the inverter (21) of the current compensation unit, is the voltage (Vdc) of direct current. The capacitance of the capacitor (22) of the current compensation unit is larger compared to the capacitance of the capacitor (14) of the power conversion unit.

[0066] One end of the current compensation unit inductor (u-phase, v-phase or w-phase current compensation unit inductor) (23) of each phase is connected to any one of the nodes on the AC side of the inverter (21) of the current compensation unit . The other end of each inductor (23) of the current compensation unit is connected to the AC power source (2) through the corresponding one of the filters (24) of the current compensation unit. That is, the current compensation unit inductor (23) is connected between the AC side of the current compensation unit inverter (21) and the AC power source (2).

[0067] The filter (24) of the current compensation unit of each phase is inserted between the AC power supply (2) and the inductor (23) of the current compensation unit. Each filter (24) of the current compensation unit has a filter inductor (24a) having a lower inductance compared to the inductance of the inductor (23) of the current compensation unit, and a filter capacitor (24b). The resonant frequency of each filter (24) of the current compensation unit is set to 4 kHz or higher.

[0068] The voltage sensor (25) detects the line voltage between the lines corresponding to two of the three phases of the power supply voltages output from the AC power source (2).

[0069] According to the above-described configuration, the current compensation unit inverter (21) supplies, according to the switching operation of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensation current (Ia(uvw)) to the AC power supply (2). through the chokes (23) of the current compensation unit.

[0070] The compensation controller (26) obtains, based on the DC voltage (Vdc) between the nodes (21a, 21b) on the DC side of the current compensation unit inverter (21) and based on the load current (Io(uvw)) flowing in power conversion unit (10) from the AC power source (2), command values (Vid, Viq) of the output voltage, so that the harmonic component contained in the current (Is(uvw)) of the power source supplied to the power converter (100), is reduced by a compensating current (Ia(uvw)). More specifically, the compensation controller (26) includes a phase detection unit (26a), first and second dq conversion units (26b, 26c), a high-pass filter (26d), a first subtraction unit (26e), and an adjustment unit (26f). voltage, the first summation block (26q), the second and third subtraction blocks (26h, 26i), and the first and second current control blocks (26j, 26k).

[0071] The phase detection unit (26a) detects the phase (ωt) of the power supply voltage based on the line voltage detected by the voltage sensor (25). The voltage sensor (25) can detect the difference between the voltage of the power supply of one of the three phases from the AC power supply (2) and the voltage of the neutral wire (604), i.e., the phase voltage, so that the phase detection unit (26a) can detect phase (ωt) of the power supply voltage based on the phase voltage.

[0072] The first dq conversion block (26b) detects at least the two phase currents (il(rt)) from the current (il(rst)) proportional to the load current (Io(uvw)) and obtains the d- component axis and component (iq*) of the q-axis of current (Io(uvw) of the load through three-phase/two-phase conversion, d-axis and q-axis are the coordinate axes of the rotating coordinate system synchronized with each phase (ωt) detected by the block (26a ) phase detection. The d-axis component is the active component and the q-axis component is the reactive component. The current (il(rst)) has three phases, and therefore, if the currents (il(rt)) of two phases can be detected, The d-axis component and the q-axis component (iq*) of the load current (Io(uvw)) can be obtained by calculating the current of the remaining one phase.

[0073] The second dq conversion block (26 s) detects the inductor currents (ia(uv)) for two phases from the current (ia(uvw)) proportional to the current flowing into the inductor (23) of the current compensation unit, and obtains the component ( id) d-axis and q-axis component (iq) for compensating current (Ia(uvw)) through three-phase/two-phase conversion. The current (ia(uvw)) has three phases, and therefore, if the currents (ia(uv)) of two phases can be detected, the d-axis component (id) and the q-axis component (iq) of the compensating current (Ia(uvw )) can be obtained by calculating the current of the remaining one phase.

[0074] The high-pass filter (26d) outputs a high-frequency component (idh) for the d-axis current component (Io(uvw)) of the load obtained by the first dq transform block (26b).

[0075] The first subtraction unit (26e) subtracts, from the output voltage command value (Vdc*), the DC voltage (Vdc) between the nodes (21a, 21b) on the DC side of the current compensation unit inverter (21) and outputs the subtraction result.

[0076] The voltage control unit (26f) performs proportional integral control on the subtraction result output from the first subtraction unit (26e) to thereby obtain a correction value.

[0077] The first summing unit (26g) sums the high-frequency component (idh) for the d-axis component output from the high-pass filter (26d) and the correction value obtained by the voltage control unit (26f), and outputs the result of the addition as a command value (id*) for the d-axis component.

[0078] The second subtraction block (26h) subtracts the d-axis component (id) of the compensating current (Ia(uvw)) obtained by the second dq transform block (26s) from the command value (id*) output from the first block (26g) addition, and outputs the result of the subtraction.

[0079] The third subtraction block (26i) subtracts the compensating current q-axis current (Ia(uv)) obtained by the second dq-conversion block (26 s) from the q-axis current (Io) current (iq*) (uvw)) load obtained by the first dq transform block (26b), and outputs the subtraction result.

[0080] The first current control unit (26j) generates an output voltage command value (Vid) for the d-axis component, so that the subtraction result output from the second subtraction unit (26h) is reduced. The first current control unit (26j) may generate an output voltage command value (Vid) for the d-axis component through proportional-integral control, for example.

[0081] The second current control unit (26k) generates an output voltage command value (Viq) for the q-axis component, so that the subtraction result output from the third subtraction unit (26i) is decreased. The second current control unit (26k) may generate an output voltage command value (Viq) for the q-axis component through proportional-integral control, for example.

[0082] Through the three-phase modulation method, the drive signal generator (27) generates, based on the command values (Vid, Viq) of the output voltage, a drive signal (Sd) for driving the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) of the inverter (21) of the current compensation unit so as to force the inverter (21) of the current compensation unit to perform a synchronous rectification operation. The second carrier frequency, which is the frequency of the second carrier wave used to generate the driving signal (Sd), is set to 100 kHz or less. In the case where the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) are driven according to the driving signal (Sd) with a non-operating time for the driving signal (Sd), an error is caused between the actual output voltage (Va(uvw)) on the side AC inverter (21) current compensation unit and the command value (Vid, Viq) of the output voltage.

[0083] In the power converter (100) configured as described above, the ratio between the non-operating time for the driving signal (Sd) and the ratio of the magnitude of the harmonic component contained in the current (Is(uvw)) of the power supply in the experiment to the upper emission limit harmonic current, which is defined in IEC61000-3-2, which is the harmonic vibration standard set by the International Electrotechnical Commission (IEC) (ie, the ratio of the experimental value to the standard value), is as shown in FIG. 4. Fig. 4 shows cases where the second carrier frequency is 16 kHz, 32 kHz and 48 kHz. The second carrier frequency is the frequency of the second carrier wave used to generate the driving signal (Sd). Based on the relationship shown in FIG. 4, it is estimated that, for a larger second carrier frequency, the non-operating time must be shorter in order for the current (Is(uvw)) of the power supply to satisfy the standard.

[0084] In the power converter (100) configured as described above, the relationship between the maximum input power of the power conversion unit (10) and the ratio (ratio of the experimental value to the standard value) of the magnitude of the harmonic component contained in the current (Is(uvw)) power supply in the experiment, to the upper limit for harmonic current emissions, which is defined in IEC61000-3-2 (ie, the ratio of the experimental value to the standard value), is as shown in FIG. 5. Fig. 5 shows the case where the three-phase modulation method is used to generate the driving signal (Sd) in the case where the two-phase modulation method is used to generate the driving signal (Sd), under the condition that the second carrier frequency is 16 kHz and the non-operating time is 3.0 μs. Based on the relationship shown in FIG. 5, it is estimated that when the maximum input power of the power conversion unit (10) increases, the magnitude of the harmonic component increases.

[0085] FIG. 6 is a table showing, for a variety of types of second carrier frequencies, the non-operating time (μs) when the magnitude of the harmonic component contained in the current (Is(uvw)) of the power supply reaches the upper limit of harmonic current emissions, which is defined in IEC61000-3- 2, in the case where the maximum input power of the power conversion unit (10) is 10 kW. Fig. 7 is a graph corresponding to the table in FIG. 6. Fig. 6 and 7 show the non-operating time in the case where the three-phase modulation method is used to generate the drive signal (Sd), and the case where the two-phase modulation method is used to generate the drive signal (Sd).

[0086] FIG. 8 shows the current values of the harmonic component contained in the current (Is(uvw)) of the power supply relative to the orders in the case where the second carrier frequency is 32 kHz, the maximum input power of the power conversion unit (10) is 10 kW, and the non-operating time is 0. 5 µs and 1.0 µs. In the case where the non-operating time is 1.0 µs, the harmonic component at order 35 exceeds the upper limit for harmonic current emissions, which is defined in IEC61000-3-2. In the case where the non-operating time is 0.5 µs, the harmonic components fall below the upper limit for harmonic current emissions, which is defined in IEC61000-3-2, at all orders.

[0087] Based on the information shown in FIG. 4-8, the inventors have discovered that by setting the dead time for the driving signal (Sd) so that Expression (II) below is satisfied, the harmonic component contained in the current (Is(uvw)) of the power supply can be effectively reduced, and the current (Is(uvw)) of the power supply can easily satisfy IEC61000-3-2.

[0088] Hereinafter, in Expression (II) below, fsw (kHz) represents the second carrier frequency, Pmax (kW) represents the maximum input power of the power conversion unit (10), and Td (μs) represents the non-operating time for the driving signal (Sd).

[0089]

In the first embodiment, the drive signal generator (27) generates a drive signal (Sd), so that Expression (II) below is satisfied.

[0090] In the first embodiment, the driving signal generator (27) generates a driving signal (Sd), so that not only Expression (II), but also Expressions (III) and (IV) below are satisfied.

[0091] In Expressions (III) and (IV), fsw (kHz) represents the second carrier frequency, Pmax (kW) represents the maximum input power of the power conversion unit (10), Td (μs) represents the non-operating time for the driving signal (Sd), and Lac (mH) represents the inductance of the current compensation unit inductor (23) when the current flowing into the current compensation unit inductor (23) is 0 A.

[0092]

Fig. 9A shows the power supply current (Is(uvw)), the compensation current (Ia(uvw)) and the load current (Io(uvw) in the case where the non-operating time for the driving signal (Sd) is 0.5 μs, the second carrier frequency is 16 kHz, the maximum input power of the power conversion unit (10) is 10 kW, and the inductance of the current compensation unit inductor (23) with a current of 0 A flowing into the current compensation unit inductor (23) is 1.0 mH. FIG. is a timing diagram corresponding to FIG. 9A illustrating the case where the drive signal dead time (Sd) is 0.5 μs, the second carrier frequency is 16 kHz, the maximum input power of the power conversion unit (10) is 10 kW, and the inductor inductance ( 23) of the current compensation unit with a current of 0 A flowing into the inductor (23) of the current compensation unit is 2.2 mH. FIG. 9C is a timing diagram corresponding to FIG. 9A illustrating the case where the non-operating time of the driving signal (Sd) is equal to. 0.5 μs, the second carrier frequency is 16 kHz, the maximum input power of the power conversion unit (10) is 5 kW, and the inductance of the current compensation unit inductor (23) with a current of 0 A flowing into the current compensation unit inductor (23) is 1.0 mH. Fig. 9D is a timing diagram corresponding to FIG. 9A, illustrating the case where the dead time of the driving signal (Sd) is 0.5 μs, the second carrier frequency is 16 kHz, the maximum input power of the power conversion unit (10) is 5 kW, and the inductance of the inductor (23) of the current compensation unit with current 0 A flowing into the inductor (23) of the current compensation unit is equal to 2.2 mH.

[0093] In FIG. 9B, the inductance of the inductor (23) of the current compensation unit is greater than the inductance in the case of FIG. 9A, and therefore the gradient of change in compensating current (Ia(uvw)) according to the change in load current (Io(uvw)) is flatter compared to the gradient of SLA in FIG. 9A. Accordingly, the harmonic component contained in the power supply current (Is(uvw)) increases, and the waveform of the power supply current (Is(uvw)) is distorted. Thus, it is difficult to make the power supply current (Is(uvw)) satisfy IEC61000-3 -2. Also in Fig. 9D, the inductance of the inductor (23) of the current compensation unit is greater than the inductance in the case of Fig. 9C, and therefore the gradient of the change in the compensating current (Ia(uvw)) according to the change in the current (Io(uvw)) load is flatter compared to the SLC gradient in Fig. 9C However, the maximum input power of the power conversion unit (10) is smaller, and hence the harmonic component contained in the power supply current (Is(uvw)) and the waveform distortion. The current waves (Is(uvw)) of the power supply are equivalent to the harmonic component and distortion in Fig. 9A. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2.

[0094] The inverter (21) of the current compensation unit is connected to the power supply system through the chokes (23) of the current compensation unit and the filters (24) of the current compensation unit, and therefore the circuit of the current compensation unit (20) can be represented by an equivalent circuit that shown in Fig. 10. In FIG. 10 "is" represents the current (Is(uvw)) of the power supply, "ii" represents the current (Io(uvw)) of the load, "Vs" represents the voltage of the power supply, "va" represents the output voltage (Va(uvw)) output from the inverter (21) of the current compensation unit, "ia" represents the inductor current (ia(uvw)) flowing in the inductor (23) of the current compensation unit, "La" represents the inductance of the inductor (23) of the current compensation unit, "Lf" represents the inductance filter inductor (24a), "Cf" represents the capacitance of the filter capacitor (24b), "if" represents the current flowing in the filter inductor (24a), "ic" represents the current flowing in the filter capacitor (24b), and "vc" represents voltage of the filter capacitor (24b). The transfer function Gp "ia" for "va" is given by Expression (V) below.

[0095] [Mat.1]

[0096] As shown in Expression (V), when the inductance of the current compensation unit inductor (23) is greater than the inductance of the filter inductor (24a), the transfer function Gp has characteristics substantially inversely proportional to the inductance of the current compensation unit inductor (23).

[0097] The compensation controller (26) performs, based on the detected inductor current (ia(uvw)), feedback control via the first and second current control units (26j, 26k) such that the current values (id, iq) calculated from the inductor current (ia(uvw)) coincide with the command values (id*, iq*) obtained by subtracting the harmonic component from the load current (Io(uvw)). Assuming that the transfer function of the output voltage (Va(uvw)) output from the inverter (21) of the current compensation unit for the current (ia(uvw)) of the inductor is equal to Gc, the current control system included in the current compensation unit (20) can be represented as shown in FIG. eleven.

[0098] FIG. 12A shows a gain diagram of the transfer functions Gp, Gc and their sum, and FIG. 12B shows a phase diagram of the transfer functions Gp, Pc and their sum. If the gain characteristics of the first and second current control units (26j, 26k) are constant, the gain characteristics of the entire current compensation unit (20) change according to the inductance of the current compensation unit inductor (23). In fig. 12A, resonance of the current compensation unit filter (24) occurs at the location surrounded by the dashed line.

[0099] In order to ensure stability of current regulation, flat DC superposition characteristics of the current compensation unit inductor (23) are preferred. If the current regulation is set such that its stability is ensured when the current flowing into the inductor (23) of the current compensation unit is at the peak current, the regulation performance is deteriorated when the current is weak, and such degraded regulation performance results in an increase in the harmonic component contained in the current (Is(uvw)) of the power source. The ratio of the peak current inductance to the zero current inductance is set to 1/3 or more, where the peak current inductance is the inductance of the current compensation unit inductor (23) when the current flowing into the current compensation unit inductor (23) is at the peak current and the inductance zero current is the inductance of the current compensation unit inductor (23) when the current flowing into the current compensation unit inductor (23) is 0 A. Thus, the stability of current regulation can be ensured, and the harmonic current can be reduced.

[0100] In the first embodiment, the ratio of the peak current inductance to the zero current inductance is set to 1/3 or more.

[0101] In FIG. 13A, the peak current (Ipeak) is 12 A, the zero current inductance (Lzero) is 2.2 mH, and the peak current inductance (Lpeak) is 0.6 mH. Thus, the ratio of the inductance (Lpeak) of the peak current to the inductance (Lzero) of the zero current is less than 1/3.

[0102] In FIG. 13V peak current (Ipeak) is 12 A, zero current inductance (Lzero) is 1.3 mH, and peak current inductance (Lpeak) is 0.6 mH. Thus, the ratio of peak current inductance (Lpeak) to zero current inductance (Lzero) is 1/3 or more.

[0103] Also, as shown in FIG. 12A and 12B, the resonance frequency of the current compensation unit filter (24) is set to 4 kHz or higher, and therefore the effect of the resonance of the current compensation unit filter (24) on the compensation current (Ia(uvw)) can be reduced at a frequency below 4 kHz . Thus, in the case where the frequency of the three-phase alternating current is 50 Hz or 60 Hz, the harmonic components in the current (Is(uvw)) of the power supply up to 40th orders of magnitude can be reliably reduced, and the compensating current (Ia(uvw)) can be stably adjusted.

[0104] As shown in Expression (V) above, the inductance of the filter inductor (24a) is preferably set to be smaller than that of the current compensation unit inductor (23).

[0105] In the first embodiment, the capacitance value of the capacitor (14) of the power conversion unit is set small enough to allow fluctuation in the output voltage of the rectifier circuit (11), and therefore, the fluctuation range of the output current of the rectifier circuit (11) can be reduced, and the peak value of the compensating current (Ia(uvw)) can be more suppressed compared with the case where the capacitance value of the power conversion unit capacitor (14) is set large enough to absorb the fluctuation in the output voltage of the rectifier circuit (11).

[0106] FIG. 14A shows, as an example, the power supply current (Is(uvw)), the load current (Io(uvw)), and the compensation current (Ia(uvw)) in the case where the maximum input power of the power conversion unit (10) is 10 kW , and the capacitance value of the capacitor (14) of the power conversion unit is set in such a way that the fluctuation in the output voltage of the rectifier circuit (11) is absorbed, i.e., the so-called input type capacitor is used. Fig. 14B is a timing chart corresponding to FIG. 14A, illustrating a case where the maximum input power of the power conversion unit (10) is 10 kW, and the capacitance value of the power conversion unit capacitor (14) is set such that fluctuation in the output voltage of the rectifier circuit (11) is allowed.

[0107] In FIG. 14A, the effective value of the compensating current (Ia(uvw)) is 6.8 A, and the peak value of the compensating current (Ia(uvw)) is 15.3 A. On the other hand, in FIG. 14 V, the effective value of the compensating current (Ia(uvw)) is 4.5 A, and the peak value of the compensating current (Ia(uvw)) is 11.0 A. That is, the effective value and the peak value of the compensating current (Ia (uvw)) can be restrained to 2/3 for the case in Fig. 14A.

[0108] Compared with the case where the capacitance of the capacitor (22) of the current compensation unit is equal to or less than the capacitance of the capacitor (14) of the power conversion unit, the DC voltage (Vdc) ripples between the nodes (21a, 21b) on the DC side of the inverter (21 ) of the current compensation unit can be more restrained, so that the harmonic component contained in the current (Is(uvw)) of the power supply can be more reliably reduced.

[0109] FIG. 15A shows, as an example, the current (Is(uvw) of the power supply, the compensation current (Ia(uvw)) and the voltage (Vdc) of the direct current in the case where the capacitance of the capacitor (22) of the current compensation unit is 195 μF, and the capacitance of the capacitor (14) of the power conversion unit is 30 μF. Fig. 15B is a timing diagram corresponding to Fig. 15A illustrating the case where the capacitance of the capacitor (22) of the current compensation unit is 15 μF, and the capacitance of the capacitor (14) of the power conversion unit is 30 μF. .

[0110] In FIG. 15V, the voltage fluctuation range (Vdc) of the DC current is more significant, and the current distortion (Is(uvw)) of the power supply is more significant compared with the voltage fluctuation range and current distortion in FIG. 15A.

[0111] In the first embodiment, the synchronous rectification operation is performed using unipolar transistors as switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) of the inverter (21) of the current compensation unit, and therefore the conduction voltage generated when any of the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) is turned on, can be reduced compared to the case when bipolar transistors are used as switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2 ). Thus, the error in the output voltage (Va(uvw)) output from the inverter (21) of the current compensation unit due to the conduction voltage can be suppressed, so that the harmonic component contained in the current (Is(uvw) of the power supply can be more reliably reduced.

[0112] FIG. 16 is a graph showing the relationship between the conducting voltage and the current flowing in the flyback diode in the case where a p-intrinsic-n (Si-PiN) structure silicon diode is provided as the flyback diode in back-to-back parallel with the switching element ( Sr1, Sr2, Ss1, Ss2, St1, St2), or the current flowing in the opposite direction in the switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) in the case where the switching element (Sr1, Sr2, Ss1, Ss2 , St1, St2) is a MOSFET.

[0113] Here, it is assumed that the peak value of the current flowing in the switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) is 12 A (indicated by the reference symbols ip in Fig. 16), Vf represents the conduction voltage for a conventional diode, and Vsd represents the conducting voltage for the MOSFET. While Vf is 1.8 V, Vsd is 1.1 V, as shown in Expression (VI) below, assume the on-resistance is 100 mΩ.

[0114]

Thus, according to the first embodiment, the driving signal generator (27) generates the driving signal (Sd), so that Expressions (II)-(IV) above are satisfied, and hence the harmonic component contained in the current (Is(uvw)) power supply can be effectively reduced. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2.

[0115] The ratio of the inductance (Lpeak) of the peak current to the inductance (Lzero) of the zero current is set to 1/3 or more, and therefore the harmonic component,

contained in the current (Is(uvw)) of the power supply can be more reliably reduced, and the compensation current (Ia(uvw)) can be stably adjusted compared with the case where the ratio is set to less than 1/3.

[0116] The switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) is an element made of wide bandgap semiconductor material as the main material, and the on-state resistance of the switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) is 100 mOhm or less. Thus, it is easy to increase the switching speed of the switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) and reduce non-working time. Accordingly, it is easy to reduce the harmonic component contained in the current (Is(uvw)) of the power supply.

[0117] The second carrier frequency is set to 100 kHz or less, and therefore, the non-operating time can be maintained longer than the non-operating time in the case where the second carrier frequency is set above 100 kHz.

[0118] "Second Embodiment"

In the second embodiment, the driving signal generator (27) generates the driving signal (Sd) by a two-phase modulation method based on the command values (Vid, Viq) of the output voltage, so that the current compensation unit inverter (21) performs a synchronous rectification operation. The second embodiment is the same or similar to the first embodiment except for the differences mentioned above.

[0119] In the case where a two-phase modulation method is used to generate a driving signal (Sd), the ratio between the non-operating time for the driving signal (Sd) and the ratio (ratio of the experimental value to the standard value) of the magnitude of the harmonic component contained in the current (Is(uvw )) of the power supply in the experiment, to the upper limit for harmonic current emissions, which is defined in IEC61000-3-2, is as shown in FIG. 17. Fig. 17 shows cases where the second carrier frequency is 16 kHz, 32 kHz and 48 kHz. Based on the relationship shown in FIG. 17, it is estimated that, for a larger second carrier frequency, the non-operating time must be shorter in order for the current (Is(uvw)) of the power supply to satisfy the standard.

[0120] FIG. 18 shows the current value for the harmonic component contained in the current (Is(uvw)) of the power supply in the case where the two-phase modulation method is used, the second carrier frequency is 48 kHz, the maximum input power of the power conversion unit (10) is 10 kW, and the non-operating the time is 0.5 µs and 1.0 µs. In the case where the non-operating time is 1.0 µs, the harmonic components at 8th, 34th, 35th and 40th orders exceed the upper limit for harmonic current emissions as defined in IEC61000-3-2. In the case where the non-operating time is 0.5 µs, the harmonic components at all orders fall below the upper limit for harmonic current emissions, which is defined in IEC61000-3-2.

[0121] FIG. 19A shows the DC voltage (Vdc), current (Is(uvw)) of the power supply, current (Io(uvw)) of the load and compensating current (Ia(uvw)) in the case where the second carrier frequency is 48 kHz, the maximum input power power conversion unit (10) is 10 kW, and the non-working time is 0.5 μs. Fig. 19B is a timing chart corresponding to FIG. 19A, illustrating the case where the second carrier frequency is 48 kHz, the maximum input power of the power conversion unit (10) is 10 kW, and the non-operating time is 1.0 μs. As described above, FIG. 19A, the harmonic component contained in the current (Is(uvw)) of the power supply is reduced compared to FIG. 19V.

[0122] Based on the information shown in FIG. 6, 7 and 17-19, the inventors have discovered that by setting the dead time for the driving signal (Sd) such that Expression (VII) below is satisfied, the harmonic component contained in the power supply current (Is(uvw)) can be effectively is reduced, and the current (Is(uvw)) of the power supply can easily satisfy IEC61000-3-2.

[0123] Hereinafter, in Expression (VII) below, fsw (kHz) represents the second carrier frequency, Pmax (kW) represents the maximum input power of the power conversion unit (10), and Td (μs) represents the non-operating time for the driving signal (Sd).

[0124]

In the second embodiment, the drive signal generator (27) generates a drive signal (Sd), so that Expression (VII) below is satisfied.

[0125] In the second embodiment, the drive signal generator (27) generates a drive signal (Sd), so that not only Expression (VII) but also Expressions (VIII) and (IX) below are satisfied.

[0126] In Expressions (VIII) and (IX), fsw (kHz) represents the second carrier frequency, Pmax (kW) represents the maximum input power of the power conversion unit (10), Td (μs) represents the non-operating time for the driving signal, and Lac ( mH) represents the inductance of the current compensation unit inductor (23) when the current flowing into the current compensation unit inductor (23) is 0 A.

[0127]

In the second embodiment, the driving signal generator (27) generates a driving signal (Sd) based on the command values (Vid, Viq) of the output voltage, so that the amplitude percentage of the AC side mains voltage relative to the DC voltage (Vdc) is 70% or more . More specifically, as shown in FIG. 20, the excitation signal generator (27) includes a modulation coefficient calculation unit (27a), a limiter (27b) and a PWM modulation unit (27c).

[0128] The modulation coefficient calculation unit (27a) calculates the phase (ψ) and modulation coefficient (ks) based on the output voltage command values (Vid, Viq) generated by the first and second current control units (26j, 26k). The modulation factor (ks) means the percentage of the amplitude (maximum value) of the AC side mains voltage relative to the DC voltage (Vdc).

[0129] Assuming that ψ represents the phase value, and Vid and Viq represent the command values (Vid, Viq) of the output voltage, ψ can be calculated according to Expression (X) below.

[0130]

Assuming that ks represents the modulation coefficient (ks), ks can be calculated based on Expressions (XI) and (XII) below. Here, Vi is the effective value of the mains voltage on the AC side of the inverter (21) of the current compensation unit.

[0131]

[0132] [Mat.2]

[0133] In the case where the modulation coefficient (ks) calculated by the modulation coefficient calculating unit (27a) is 0.7 or more, the limiter (27b) outputs the modulation coefficient (ks) calculated by the modulation coefficient calculating unit (27a). In the case where the modulation coefficient (ks) falls below 0.7, the limiter (27b) outputs 0.7 as the modulation coefficient (ks).

[0134] The PWM modulation block (27 s) generates a drive signal (Sd) based on the phase (ψ) and modulation coefficient (ks) output from the limiter (27b). The second carrier wave is used to generate the excitation signal (Sd) by the PWM modulation block (27 s). A frequency of 100 Hz or less is used as the second carrier frequency, which is the carrier frequency for the second carrier wave.

[0135] In the second embodiment, the modulation ratio (ks) is 70% or more, and therefore a rapid change in the on-time of the switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) of the inverter (21) of the current compensation unit when switching the phase of the modulation target can be suppressed compared to the case where the modulation coefficient (ks) is less than 70%. Accordingly, the harmonic component contained in the current (Is(uvw)) of the power supply can be more reliably reduced.

[0136] FIG. 21A shows the relationship between the on-times and the phases of the three switching elements (Sr1, Ss1, St1) of the upper link of the inverter (21) of the current compensation unit in the case where the modulation coefficient (ks) is 40%. Fig. 21B is a graph corresponding to FIG. 21A and showing the case where the modulation coefficient (ks) is 70%. In the case when the modulation coefficient (ks) is 70%, the change in the switching duration of the switching element (Sr1, Ss1, St1) of the inverter (21) of the current compensation unit when switching phases of the modulation target is smaller compared to the case when the coefficient (ks) modulation is 40%.

[0137] Thus, according to the second embodiment, the driving signal generator (27) generates the driving signal (Sd), so that Expressions (VII) to (IX) above are satisfied, and therefore the harmonic component contained in the current (Is( uvw)) of the power source can be effectively reduced. Thus, it is easy to make the current (Is(uvw)) of the power supply satisfy IEC61000-3-2.

[0138] "Third Embodiment"

Fig. 22 shows a power converter (100) according to the third embodiment of the present disclosure.

[0139] In the third embodiment, the drive signal generator (27) does not include a limiter (27b), and the PWM modulation unit (27c) generates a drive signal (Sd) based on the modulation coefficient (ks) output from the unit (27a ) calculation of the modulation coefficient.

[0140] The compensation controller (26) further includes a unit (28) for calculating the DC voltage command value.

[0141] The DC voltage command value calculation unit (28) calculates the DC voltage command value (Vdc*) based on the output voltage command value (Vid) for the d-axis component, so that the DC voltage command value (Vdc*) is or less compared to twice the average grid voltage on the AC side of the inverter (21) of the current compensation unit. More specifically, the DC voltage command value calculation unit (28) has an average value calculation unit (28a), and a multiplication unit (28b).

[0142] The average value calculation unit (28a) calculates the average command value (Vid) of the output voltage for the d-axis component.

[0143] The multiplying unit (28b) multiplies the average value calculated by the average value calculating unit (28a) by a predetermined gain (K _VI ), thereby calculating the DC voltage command value (Vdc*). The predetermined gain (K _VI ) is set to 2 or less.

[0144] Phase detection block (26a), first and second dq conversion blocks (26b, 26c), high-pass filter (26d), first subtraction block (26e), voltage control block (26f), first summation block (26g) , the second and third block (26h, 26i) of subtraction and the first and second blocks (26j, 26k) of current regulation of the compensation controller (26) form a block (29) for calculating the command voltage value, which calculates the command values (Vid, Viq) of the output voltage at based on the DC voltage (Vdc) and the DC voltage command value (Vdc*).

[0145] The DC voltage command value calculation unit (28) can calculate the DC voltage command value (Vdc*) based on the effective value of the mains voltage on the AC side of the current compensation unit inverter (21), so that the command value (Vdc*) DC voltage is equal to or less than twice the average network voltage on the AC side of the inverter (21) of the current compensation unit. The relationship between the effective value of the mains voltage on the AC side of the current compensation unit inverter (21) and the command value (Vid) of the output voltage for the d-axis component is as shown in Expression (XI) above.

[0146] The third embodiment is the same or similar to the second embodiment except for the differences mentioned above. Thus, like reference symbols are assigned to like components, and their detailed description will not be repeated herein.

[0147] Thus, according to the third embodiment, the DC voltage command value (Vdc*) is calculated such that the DC voltage command value (Vdc*) is equal to or less than twice the average grid voltage on the AC side of the inverter (21) of the unit current compensation, and therefore the percentage of the amplitude of the AC side mains voltage relative to the DC voltage (Vdc) becomes 70% or more. Thus, compared with the case where the command value (Vdc*) of the DC voltage is higher than twice the average grid voltage on the AC side of the inverter (21) of the current compensation unit, the rapid change in the ON duration of the switching element (Sr1, Sr2, Ss1, Ss2 , St1, St2) of the inverter (21) of the current compensation unit when switching phases of the modulation target can be more restrained, and the harmonic component contained in the current (Is(uvw)) of the power supply can be more reliably reduced.

[0148] "Other options"

In the first to third embodiments, the harmonic generating source is connected to the first and second conductors (601, 602) of the first to third conductors (601, 602, 603), but may only be connected to one of the first to third conductors (601, 602, 603) or be connected to all three conductive wires.

[0149] In the third embodiment, the DC voltage command value calculating unit (28) calculates the DC voltage command value (Vdc*) such that the DC voltage command value (Vdc*) is equal to or less than twice the average AC side network voltage current of the inverter (21) of the current compensation unit, but the DC voltage command value calculation unit (28) can calculate the DC voltage command value (Vdc*) such that the DC voltage command value (Vdc*) is equal to or less than twice the main value frequency component of the network voltage on the AC side of the inverter (21) of the current compensation unit. That is, the average value calculation unit (28a) can calculate the fundamental frequency component of the command value (Vid) of the output voltage for the d-axis component.

[0150] In the first embodiment, the drive signal generator (27) generates the drive signal (Sd) such that Expressions (II) to (IV) are satisfied, but the drive signal generator (27) can generate the drive signal (Sd) such that that not Expression (II), but only Expressions (III) and (IV) are satisfied. The drive signal generator (27) may generate the drive signal (Sd) such that one or both of Expressions (III) and (IV) are not satisfied and Expression (II) is satisfied.

[0151] In the second embodiment, the drive signal generator (27) generates the drive signal (Sd) such that Expressions (VII) to (IX) are satisfied, but the drive signal generator (27) can generate the drive signal (Sd) such that that not Expression (VII), but only Expressions (VIII) and (IX) are satisfied. The drive signal generator (27) may generate the drive signal (Sd) such that one or both of Expressions (VIII) and (IX) are not satisfied and Expression (VII) is satisfied.

[0152] In the first to third embodiments, the power converter (100) is provided in the air conditioning system (1), but the power converter (100) may be provided in another type of heat pump system, such as systems for controlling temperature, humidity, etc. d. More specifically, the power converter (100) may be provided in heat pump systems of an air/water heating system, a display case, a refrigerator, a freezer, and a water heater to regulate the internal temperature, etc.

Industrial applicability

[0153] As described above, the present disclosure is usefully applicable to a power converter including a power conversion unit that performs power conversion for three-phase alternating current output from an AC power supply, and a current compensation unit that supplies compensating current to the power supply AC power supply, and to a heat pump system including such a power converter.

Description of symbols

[0154] 1 Air conditioning system (heat pump system)

2 AC power supply

10 Power conversion unit

11 Rectifier circuit

12 Power conversion unit inverter

12a First DC node

12b Second DC node

13 Power conversion unit choke

14 Power conversion unit capacitor

20 Current compensation block

21 Current compensation unit inverter

21a, 21b DC nodes

22 Current compensation unit capacitor

23 Current compensation unit choke

24 Current compensation filter

24a Filter choke

24b Filter capacitor

26 Compensation controller

27 Excitation signal generator

28 Block for calculating the command value of DC voltage

29 Block for calculating the command voltage value

100 Power converter

300 Indoor unit (source of harmonic generation)

400 Outdoor fan (source of harmonics)

601 First conductive wire

602 Second conductive wire

603 Third conductive wire

Ia (uvw) Compensating current

Io (uvw) Load current

Vid, Viq Output voltage command value

Vdc DC Voltage

Vdc* DC voltage command value

Sr1, Sr2, Sr3, Sr4, Sr5, Sr6 Switching elements

Sd Excitatory signal

Claims (66)

1. Power converter containing: a power conversion unit (10) that performs power conversion for three-phase alternating current output from the alternating current power source (2); And a current compensation unit (20) that supplies a compensation current (Ia(uvw)) to the AC power source (2), wherein the current compensation block (20) includes: inverter (21) of the current compensation unit, including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a current compensation unit capacitor (22) connected between terminals (21a, 21b) of the inverter (21) on the DC output side of the current compensation unit inverter (21); a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the power supply current (Is(uvw)) supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); And an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) by three-phase modulation, wherein the inverter (21) of the current compensation unit supplies, through the operation of switching the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23 ) of the current compensation block so that expression (1) will be satisfied: Td ≤ (34.00/fsw - 0.145)(1.55-0.055*Pmax) … (1), where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), and Td (μs) represents the non-operating time for the driving signal (Sd). 2. Power converter containing: a power conversion unit (10) that performs power conversion for three-phase alternating current output from the alternating current power source (2); And a current compensation unit (20) that supplies a compensation current (Ia(uvw)) to the AC power source (2), wherein the current compensation block (20) includes: inverter (21) of the current compensation unit, including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2); a current compensation unit capacitor (22) connected between terminals (21a, 21b) of the inverter (21) on the DC output side of the current compensation unit inverter (21); a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the power supply current (Is(uvw)) supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); And an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) using a two-phase modulation method, wherein the inverter (21) of the current compensation unit supplies, through the operation of switching the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23 ) of the current compensation block so that expression (2) will be satisfied: Td ≤ (45.23/fsw - 0.135)(1.48-0.048*Pmax) … (2), where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), and Td (μs) represents the non-operating time for the driving signal (Sd). 3. Power converter containing: a power conversion unit (10) that performs power conversion for three-phase alternating current output from the alternating current power source (2); and a current compensation unit (20) that supplies a compensating current (Ia(uvw)) to the AC power source (2), wherein the current compensation unit (20) includes: a current compensation unit inverter (21), including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2); a current compensation unit capacitor (22) connected between terminals (21a, 21b) of the inverter (21) on the DC output side of the current compensation unit inverter (21); a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the power supply current (Is(uvw)) supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); And an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) by three-phase modulation, wherein the inverter (21) of the current compensation unit supplies, through the operation of switching the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23 ) of the current compensation unit so that expressions (3) and (4) will be satisfied: Lac ≤ 16/Pmax. . . (3) and Td ≤ (34.00/fsw - 0.145) . . . (4), where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), Td (μs) represents the non-operating time for the driving signal (Sd) and Lac (mH ) represents the inductance of the current compensation unit inductor (23) when the current flowing in the current compensation unit inductor (23) is 0 A. 4. Power converter containing: a power conversion unit (10) that performs power conversion for three-phase alternating current output from the alternating current power source (2); And a current compensation unit (20) that supplies a compensating current (Ia(uvw)) to an alternating current power source (2), wherein the current compensation unit (20) includes: an inverter (21) of a current compensation unit, including a plurality of switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2); a current compensation unit capacitor (22) connected between terminals (21a, 21b) of the inverter (21) on the DC output side of the current compensation unit inverter (21); a current compensation unit inductor (23) connected between the AC side of the current compensation unit inverter (21) and the AC power supply (2); compensation controller (26) which receives the command value (Vid, Viq) of the output voltage so that the harmonic component contained in the power supply current (Is(uvw)) supplied to the power converter (100) from the AC power source (2) , is reduced by compensating current (Ia(uvw)); And an exciting signal generator (27) that generates, based on the command value (Vid, Viq) of the output voltage, an exciting signal (Sd) for exciting the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) using a two-phase modulation method, wherein the inverter (21) of the current compensation unit supplies, through the operation of switching the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), a compensating current (Ia(uvw)) to the AC power source (2) through the inductor (23 ) of the current compensation unit so that expressions (5) and (6) will be satisfied: Lac ≤ 16/Pmax. . . (5) and Td ≤ (45.23/fsw - 0.135) . . . (6), where fsw (kHz) represents the carrier frequency used to generate the driving signal (Sd), Pmax (kW) represents the maximum input power of the power conversion unit (10), Td (μs) represents the non-operating time for the driving signal (Sd), and Lac ( mH) represents the inductance of the current compensation unit inductor (23) when the current flowing in the current compensation unit inductor (23) is 0 A. 5. The power converter according to claim 3 or 4, wherein the ratio of the inductance of the inductor (23) of the current compensation unit, when the current flowing in the inductor (23) of the current compensation unit is a peak current, to the inductance of the inductor (23) of the current compensation unit, when the current flowing in the inductor (23) of the current compensation unit is 0 A, is set to 1/3 or more. 6. Power converter according to any one of claims. 1-4 containing: a filter (24) inserted between the AC power source (2) and the current compensation unit inductor (23), wherein the filter (24) includes a filter inductor (24a) with a lower inductance compared to the inductance of the current compensation unit inductor (23) and a filter capacitor (24b) and has a resonant frequency of 4 kHz or higher. 7. The power converter according to claim 2 or 4, wherein the driving signal generator (27) generates a driving signal (Sd) based on the command value (Vid, Viq) of the output voltage such that the percentage of the amplitude of the AC side mains voltage relative to the voltage The DC (Vdc) between the terminals (21a, 21b) of the inverter (21) on the DC output side of the inverter (21) of the current compensation unit is 70% or more. 8. The power converter according to claim 2 or 4, wherein the compensation controller (26) includes a voltage command value calculation unit (29), which calculates the output voltage command value (Vid, Viq) based on the DC voltage (Vdc) between terminals (21a, 21b) of the inverter (21) on the DC output side of the inverter (21) of the current compensation unit and based on the command value (Vdc*) of the DC voltage, and a DC voltage command value calculating unit (28) that calculates a DC voltage command value (Vdc*) based on the output voltage command value (Vid, Viq), so that the DC voltage command value (Vdc*) is equal to or less than twice the average the mains voltage on the AC side of the inverter (21) of the current compensation unit or the fundamental frequency component of the mains voltage on the AC side of the inverter (21) of the current compensation unit. 9. Power converter according to any one of claims. 1-4, while the power conversion block (10) includes: rectifier circuit (11), which rectifies three-phase alternating current into direct current, inverter (12) power conversion unit, which converts direct current into alternating current, a power conversion unit capacitor (14) connected between the nodes (12a, 12b) on the DC side of the power conversion unit inverter (12) and configured to allow fluctuation in the output voltage of the rectifier circuit (11), and a power conversion unit inductor (13) connected between the AC power source (2) and one end of the power conversion unit capacitor (14). 10. Power converter according to claim 9, in this case The capacitance of the capacitor (22) of the current compensation unit is larger compared to the capacitance of the capacitor (14) of the power conversion unit. 11. Power converter according to any one of claims. 1-4, while the inverter (21) of the current compensation unit includes, as switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2), six unipolar transistors forming three branches, and The drive signal generator (27) generates the drive signal (Sd) so as to force the current compensation unit inverter (21) to perform a synchronous rectification operation. 12. The power converter according to claim 11, wherein the switching elements (Sr1, Sr2, Ss1, Ss2, St1, St2) are elements made of wide bandgap semiconductor material as the main material, and the on-state resistance of each switching element (Sr1, Sr2, Ss1, Ss2, St1, St2) is 100 mOhm or less. 13. Power converter according to any one of claims. 1-4, where the carrier frequency is 100 kHz or less. 14. A heat pump system, comprising: a power converter according to any one of paragraphs. 1-4, a power conversion unit (10) receiving three-phase alternating current input through three conductors (601, 602, 603), and wherein the heat pump system (1) includes a source (300, 400) for the formation of a harmonic oscillation, which generates a harmonic oscillation in the current in at least one (601, 602) of the three conductive wires (601, 602, 603).