RU2793272C2 - Reduction of the number of regularly-coded resolution elements for decoding coefficients using threshold value and rice parameter - Google Patents

Abstract

FIELD: means for video coding.

SUBSTANCE: threshold value of regular-coded bins for the first decoding pass is determined. For the first set of coefficients, the context bin decoding of the syntax elements of the coefficient group is performed until a threshold value of regular-coded bins is reached. The context decoded resolution elements of syntax elements contain one or more significance flags, one or more parity level flags, and one or more first flags. Each of the one or more significance flags indicates whether the absolute level for the corresponding coefficient is zero. Each of the one or more parity level flags indicates whether the absolute level for the corresponding coefficient is even or odd. Each of the one or more first flags indicates whether the absolute level for the corresponding factor is greater than two.

EFFECT: increase in the efficiency of video coding.

38 cl, 19 dwg

Description

[0001] This application claims priority:

- U.S. Patent Application No. 16/704995, filed December 5, 2019, which claims priority:

- Provisional Patent Application (USA) 62/776379, filed December 6, 2018; And

- U.S. Provisional Patent Application 62/787681, filed January 2, 2019;

the contents of each of which are hereby contained in their entirety by reference.

The field of technology to which the invention belongs

[0002] This disclosure relates to video coding and video decoding.

State of the art

[0003] Support for digital video can be included in a wide range of devices, including digital television receivers, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, electronic readers. books, digital cameras, digital recorders, digital media players, video game devices, video game consoles, cellular or satellite radio telephones, so-called "smartphones", video conferencing devices, video streaming devices, and the like. Digital video devices implement video coding technologies such as the video coding technologies described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264/MPEG-4 Part 10 Advanced Coding video (AVC), the High Efficiency Video Coding (HEVC) standard, and the ITU-T H.265/High Efficiency Video Coding (HEVC) standard and extensions of such standards. Video devices can transmit, receive, encode, decode and/or store digital video information more efficiently by implementing such video coding technologies.

[0004] Video coding techniques include spatial (intraframe) prediction (prediction) and/or temporal (interframe) prediction in order to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (eg, a video frame or portion of a video frame) may be segmented into video blocks, which may also be referred to as "coding tree units (CTU)", "coding units (CU)", and/or "coding nodes". Video blocks in an inner (I-) slice (slice) of a frame are encoded using spatial prediction with respect to reference samples (samples) in adjacent blocks in the same frame. Video blocks in an inter-coded (P- or B-) slice of a frame may use spatial prediction with respect to reference samples in adjacent blocks in the same frame, or temporal prediction with respect to reference samples in other reference frames. Frames may be referred to as "pictures" and reference frames may be referred to as "reference pictures".

The essence of the invention

[0005] Video coding (e.g., video coding and/or video decoding) typically involves predicting a video block from either an already coded video block in an identical frame (e.g., intra prediction) or from an already coded video block in a different frame (e.g., , mutual prediction). In some cases, the video encoder also calculates residual data by comparing the predictive block with the original block. Thus, the residual data represents the difference between the prediction block and the original block of video data. To reduce the number of bits required to transmit the residual data, the video encoder converts the residual data into transform coefficients, quantizes the transform coefficients, and transmits the transformed and quantized coefficients in the encoded bitstream. The compression achieved by the transformation and quantization processes may be lossy, which means that the transformation and quantization processes may introduce distortion into the decoded video data. This disclosure describes techniques related to transform coefficient coding.

[0006] A method for decoding video data includes determining a threshold number of regularly encoded bins for a first decoding pass; for the first set of coefficients, context decoding the syntax element bins of the coefficient group until a threshold number of regularly encoded bins is reached, wherein the context decoded bins of the syntax elements contain one or more significance flags, one or more parity level flags and one or more first flags, wherein each of the one or more significance flags indicates whether the absolute level for the corresponding coefficient is zero or not, each of the one or more parity level flags indicates whether the absolute level for the corresponding coefficient is even or odd, and each of the one or more first flags indicates whether or not the absolute level for the corresponding factor 2 is exceeded; determining values for the first set of transform unit coefficients based on the context decoded bins of the syntax elements; responsive to reaching a threshold number of regular-coded bins, for the second coefficient set, bypassing decoding the additional syntax elements, wherein the bypass decoding of the additional syntax elements comprises, for a coefficient from the second coefficient set, extracting a value for a Rice parameter; and determining values for a second set of transformation unit coefficients based on the additional syntax elements, wherein determining values for the second set of transformation unit coefficients based on the additional syntax elements comprises determining a value for the null parameter based on the Rice parameter, wherein the value for the null parameter identifies the encoded value , which corresponds to the coefficient level zero; receiving a first encoded value for a first coefficient from the second coefficient set; and, based on the value for the null parameter and the first coded value for the first coefficient, determining a level for the first coefficient.

[0007] An apparatus for decoding video data includes a memory configured to store video data and one or more processors implemented in the circuit and configured to determine a threshold number of regularly-encoded bins for a first decoding pass; for the first set of coefficients, context-decode the syntax element bins of the coefficient group until a threshold number of regular-coded bins is reached, wherein the context-decoded bins of the syntax elements contain one or more significance flags, one or more parity level flags and one or more first flags, wherein each of the one or more significance flags indicates whether the absolute level for the corresponding coefficient is zero or not, each of the one or more parity level flags indicates whether the absolute level for the corresponding coefficient is even or odd, and each of the one or more first flags indicates whether or not the absolute level for the corresponding factor 2 is exceeded; determine values for the first set of transformation unit coefficients based on the context-decoded bins of the syntax elements; in response to reaching a threshold number of regularly-encoded bins, for the second set of coefficients, perform bypass decoding of additional syntax elements, wherein, in order to perform bypass decoding of additional syntax elements, one or more processors are configured to extract, for the coefficient from the second a set of coefficients, a value for the Rice parameter; and determining values for the second set of transformation unit coefficients based on the additional syntax elements, wherein in order to determine values for the second set of transformation unit coefficients based on the additional syntax elements, one or more processors are configured to determine a value for the null parameter based on the parameter Rice, wherein the value for the null parameter identifies the encoded value that corresponds to the coefficient level zero; receive a first encoded value for a first coefficient from the second coefficient set; based on the value for the null parameter and the first coded value for the first coefficient, determine the level for the first coefficient.

[0008] According to one or more examples, the computer-readable storage medium stores instructions that, when executed by one or more processors, cause one or more processors to determine a threshold number of regularly-encoded bins for a first decoding pass; for the first set of coefficients, context-decode the syntax element bins of the coefficient group until a threshold number of regular-coded bins is reached, wherein the context-decoded bins of the syntax elements contain one or more significance flags, one or more parity level flags and one or more first flags, wherein each of the one or more significance flags indicates whether the absolute level for the corresponding coefficient is zero or not, each of the one or more parity level flags indicates whether the absolute level for the corresponding coefficient is even or odd, and each of the one or more first flags indicates whether or not the absolute level for the corresponding factor 2 is exceeded; determine values for the first set of transformation unit coefficients based on the context-decoded bins of the syntax elements; in response to reaching a threshold number of regularly-encoded bins, for the second set of coefficients, perform bypass decoding of additional syntax elements, wherein, in order to perform bypass decoding of additional syntax elements, instructions instruct one or more processors to extract, for a coefficient from the second set coefficients, the value for the Rice parameter; and determining values for the second set of transformation unit coefficients based on the additional syntax elements, wherein in order to determine values for the second set of transformation unit coefficients based on the additional syntax elements, the instructions cause one or more processors to determine a value for the null parameter based on the Rice parameter. , wherein the value for the null parameter identifies the encoded value that corresponds to the coefficient level zero; receive a first encoded value for a first coefficient from the second coefficient set; and, based on the value for the null parameter and the first coded value for the first coefficient, determine the level for the first coefficient.

[0009] According to one example, equipment for decoding video data includes means for determining a threshold number of regularly-encoded bins for a first decoding pass; means for context decoding, for the first set of coefficients, the syntax element bins of the coefficient group until a threshold number of regularly encoded bins is reached, wherein the context decoded bins of the syntax elements contain one or more significance flags, one or more parity level flags and one or more first flags, each of the one or more significance flags indicating whether the absolute level for the corresponding coefficient is zero or not, each of the one or more parity level flags indicating whether the absolute level for the corresponding coefficient is even or odd, and each of the one or more first flags indicates whether or not the absolute level for the corresponding factor 2 is exceeded; means for determining values for the first set of transformation unit coefficients based on the context decoded bins of the syntax elements; means for bypassing decoding additional syntax elements, for the second set of coefficients, in response to reaching a threshold number of regularly-coded bins, wherein the means for bypassing decoding additional syntax elements comprises means for extracting, for a coefficient from the second set of coefficients, a value for the Rice parameter ; and means for determining values for a second set of transformation unit coefficients based on the additional syntax elements, wherein the means for determining values for the second set of transformation unit coefficients based on the additional syntax elements comprises means for determining a value for a null parameter based on the Rice parameter, wherein the value for a null parameter, identifies an encoded value that corresponds to a coefficient level of zero; means for receiving a first encoded value for a first coefficient from a second set of coefficients; and means for determining a level for the first coefficient based on a value for the null parameter and a first encoded value for the first coefficient.

[0010] Details of one or more examples are set forth in the accompanying drawings and in the description below. Other features, purposes and advantages should become apparent from the description, drawings and claims.

Brief description of the drawings

[0011] FIG. 1 is a block diagram illustrating an exemplary video encoding and decoding system that may perform the techniques of this disclosure.

[0012] FIG. 2A and 2B are conceptual diagrams illustrating an exemplary quadtree binary tree (QTBT) structure and corresponding coding tree unit (CTU).

[0013] FIG. 3 shows an exemplary order for syntax elements representing absolute level values for coefficients in a coding group (CG).

[0014] FIG. 4 shows an illustration of the benchmark used to select probabilistic models.

[0015] FIG. 5 shows an example of an interleaved Gt2 flag in the first pass after the Par flag.

[0016] FIG. 6 shows an example of an interleaved Gt2 flag in the first pass after the Gt1 flag.

[0017] FIG. 7 shows an example of partial last coefficient coding in which the regular-coded bins limit is reached for SIG-Gt1-Par-Gt2 coding in the first coding pass.

[0018] FIG. 8 shows an example of a partial last coefficient encoding in which the regularly encoded bin limit is reached for SIG-Gt1-Gt2-Par encoding in the first encoding pass.

[0019] FIG. 9 is a block diagram illustrating an exemplary video encoder that may implement the techniques of this disclosure.

[0020] FIG. 10 is a block diagram illustrating an exemplary video decoder that may implement the techniques of this disclosure.

[0021] FIG. 11A and 11B are conceptual diagrams illustrating a range update process in binary arithmetic coding.

[0022] FIG. 12 is a conceptual diagram illustrating an output process in binary arithmetic coding.

[0023] FIG. 13 is a block diagram illustrating a context adaptive binary arithmetic coding (CABAC) encoder in a video encoder.

[0024] FIG. 14 is a block diagram illustrating a CABAC encoder in a video decoder.

[0025] FIG. 15 is a flowchart illustrating exemplary operation of a video encoder.

[0026] FIG. 16 is a flowchart illustrating exemplary operation of a video decoder.

[0027] FIG. 17 is a flowchart illustrating exemplary operation of a video decoder.

Implementation of the invention

[0028] Video coding (e.g., video coding and/or video decoding) typically involves predicting a video block from either an already coded video block in the same frame (e.g., intra prediction) or from an already coded video block in a different frame (e.g., , mutual prediction). In some cases, the video encoder also calculates residual data by comparing the predictive block with the original block. Thus, the residual data represents the difference between the predictive block and the original block of video data. To reduce the number of bits required to transmit the residual data, the video encoder transforms and quantizes the residual data and transmits the transformed and quantized residual data in the encoded bitstream. The compression achieved by the transformation and quantization processes may be lossy, which means that the transformation and quantization processes may introduce distortion into the decoded video data.

[0029] The video decoder decodes and adds the residual data to the prediction block to generate a reconstructed video block that matches the original video block more closely than just the prediction block. Due to the losses introduced by transforming and quantizing the residual data, the reconstructed block may have distortion or artifacts. One common type of artifact or distortion is called "blocking" when the boundaries of the blocks used to encode video data are visible.

[0030] To further improve the quality of the decoded video, the video decoder may perform one or more filtering operations on the reconstructed video blocks. Examples of these filtering operations include deblocking filtering, sampled adaptive offset (SAO) filtering, and adaptive loop filtering (ALF). The parameters for these filtering operations may either be determined by the video encoder and be explicitly transmitted in the encoded video bitstream, or may be implicitly determined by the video decoder without having to be explicitly transmitted in the encoded video bitstream.

[0031] As presented above, the video encoder transforms the residual data in order to generate transform coefficients. These transform coefficients may further be quantized. In this disclosure, the term "transform factor" or "coefficient" may mean a quantized transform coefficient or a non-quantized transform coefficient. This disclosure describes techniques for signaling transform coefficient values, such as quantized transform coefficients, from a video encoder to a video decoder. More specifically, this disclosure describes technologies associated with an entropy decoding process that converts a binary representation of bits into a sequence of non-binary quantized transform coefficients. The corresponding entropy encoding process, which is generally the inverse of entropy decoding, is also described in this disclosure.

[0032] In one example, this disclosure describes techniques for determining a Rice parameter used to define codes, such as Golomb-Rice codes or exponential Golomb codes, for encoding the remaining absolute values of the coefficient levels for a block of coefficients, wherein context-adaptive binary arithmetic coding (CABAC) is used to encode other indications of relatively significant coefficients, such as coefficient levels greater than 1 and coefficient levels greater than 2. The coefficient levels may be transform coefficient levels in the case of lossy coding, or coefficient levels , for which no transformation is applied (i.e. residual pixel values), in the case of lossless coding or lossy coding in transform skipping mode. As explained in more detail below, the coefficient level may be either the absolute value for the coefficient level or the remaining level for the coefficient level.

[0033] The Rice parameter is a configurable value used to select a set of codewords from a family of Golomb codes, such as Golomb-Rice codes or Exponential Golomb codes. The codes specified by the Rice parameter may be used to encode the remaining absolute coefficient level value for at least one coefficient in a transform unit (TU) or coefficient group (CG), i.e. in the block of coefficients. Each of the CGs may be a 4×4 transform block or a 4×4 subblock of a video data transform block. The CGs may include transform coefficients in the case of lossy coding, or coefficients for which no transform is applied in the case of lossless coding or lossy coding in transform skipping mode.

[0034] This disclosure further describes techniques for determining a value for a null parameter based on the Rice parameter. The null parameter represents the value of the bitstream that corresponds to the coefficient level zero. If the probability of a coefficient level being zero is relatively low, then a longer codeword or bitstream value may be assigned a coefficient level of zero such that shorter codewords can be used for non-zero values. The techniques of this disclosure can improve video compression by improving the choice of zero parameters such that bits can be saved when encoding coefficient levels.

[0035] The techniques of this disclosure may be applied to any of the existing video codecs, such as the High Efficiency Video Coding (HEVC) standard, or may be proposed as a promising coding tool for new video coding standards, such as the Universal Video Coding (VVC) standard under development. currently, or for other future video coding standards.

[0036] FIG. 1 is a block diagram illustrating an exemplary video encoding and decoding system 100 that may perform the techniques of this disclosure. The technologies of this disclosure are generally directed to encoding (encoding and/or decoding) video data. In general, video data includes any video processing data. Thus, the video data may include raw unencoded video, encoded video, decoded (eg, reconstructed) video, and video metadata such as ancillary data.

[0037] As shown in FIG. 1, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by target device 116, in this example. In particular, source device 102 provides video data to destination device 116 via computer-readable medium 110. Source device 102 and destination device 116 may comprise any of a wide range of devices including desktop computers, laptops (i.e., laptops), tablet computers. , set-top boxes, handsets, such as smartphones, televisions, cameras, display devices, digital media players, video game consoles, video streaming device, etc. In some cases, source device 102 and destination device 116 may be equipped with wireless communication capabilities and may therefore be referred to as "wireless devices".

[0038] In the example of FIG. 1, source device 102 includes a video source 104, a storage device 106, a video encoder 200, and an output interface 108. The target device 116 includes an input interface 122, a video decoder 300, a storage device 120, and a display device 118. In accordance with this disclosure, video encoder 200 of source device 102 and video decoder 300 of target device 116 may be configured to apply the techniques for encoding coefficients described herein. Thus, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, the source device and the target device may include other components or arrangements. For example, source device 102 may receive video data from an external video source such as an external camera. Likewise, target device 116 may interact with an external display device instead of including an integrated display device.

[0039] System 100, as shown in FIG. 1 is just one example. In general, any digital video encoding and/or decoding device may implement the techniques for coefficient encoding described herein. Source device 102 and destination device 116 are merely examples of such encoders, in which source device 102 generates encoded video data for transmission to destination device 116. This disclosure refers to an "encoder" as a device that performs encoding (encoding and/or decoding ) data. Thus, video encoder 200 and video decoder 300 represent examples of encoding devices, specifically a video encoder and a video decoder, respectively. In some examples, source device 102 and target device 116 may operate substantially symmetrically such that source device 102 and target device 116 each include video encoding and decoding components. Therefore, system 100 can support one-way and two-way video transmission between source device 102 and destination device 116, such as for video streaming, video playback, video broadcast, or video telephony.

[0040] In general, video source 104 represents a source of video data (ie, raw, uncoded video data) and provides a sequential series of pictures (also referred to as "frames") of video data to video encoder 200, which encodes data for frames. Video source 104 of source device 102 may include a video capture device such as a video camera, a video archive containing previously captured raw video, and/or a live video interface to receive video from a video content provider. As a further alternative, video source 104 may generate computer graphics data as source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes captured, pre-captured, or machine-generated video data. Video encoder 200 may re-arrange frames from receive order (sometimes referred to as "display order") to encoding order for encoding. Video encoder 200 may generate a bit stream including encoded video data. Source device 102 may then output the encoded video data via output interface 108 to computer-readable media 110 for reception and/or retrieval, such as via input interface 122 of target device 116.

[0041] The storage device 106 of the source device 102 and the storage device 120 of the target device 116 are general purpose storage devices. In some examples, memories 106, 120 may store raw video data, such as raw video from video source 104 and raw decoded video data from video decoder 300. Additionally or alternatively, memories 106, 120 may store program instructions executable by video encoder 200, for example. and video decoder 300, respectively. Although memory 106 and memory 120 are shown separately from video encoder 200 and video decoder 300 in this example, it should be understood that video encoder 200 and video decoder 300 may also include internal storage devices for functionally similar or equivalent purposes. Additionally, memories 106, 120 may store encoded video data, such as output from video encoder 200 and input to video decoder 300. In some examples, portions of memories 106, 120 may be allocated as one or more video buffers, such as to store raw, decoded and/or encoded video data.

[0042] Computer-readable media 110 may represent any type of media or device capable of transporting encoded video data from source device 102 to destination device 116. In one example, computer-readable media 110 represents a communication medium to allow source device 102 to transmit encoded video data directly to a target device. device 116 in real time, such as via an RF network or a computer network. Output interface 108 may modulate a transmitted signal including encoded video data, and input interface 122 may demodulate a received transmission signal according to a communication standard such as a wireless communication protocol. The communication medium may comprise any wireless or wired communication medium such as radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-switched network such as a local area network, a wide area network, or a wide area network such as the Internet. The communications medium may include routers, switches, base stations, or any other equipment that may be useful to facilitate transmission from source device 102 to destination device 116.

[0043] In some examples, source device 102 may output encoded data from output interface 108 to storage device 112. Similarly, the target device 116 can access the encoded data from the storage device 112 via the input interface 122 . Storage device 112 may include any of a variety of distributed or locally available storage media, such as a hard drive, Blu-ray discs, DVDs, CD-ROMs, flash memory, volatile or non-volatile storage, or any other suitable digital media. data to store encoded video data.

[0044] In some examples, source device 102 may output encoded video data to file server 114 or other intermediate storage device that may store encoded video generated by source device 102. Target device 116 may access stored video data from file server 114 via streaming or download. File server 114 may be any type of server device capable of storing encoded video data and transmitting that encoded video data to target device 116. File server 114 may be a web server (e.g. for a web site), file transfer protocol (FTP) server, , a networked content delivery device, or a Network Attached Storage System (NAS) protocol device. The target device 116 may access the encoded video data from the file server 114 via any standard data connection, including an Internet connection. It may include a wireless link (eg, Wi-Fi connection), a wired connection (eg, digital subscriber line (DSL), cable modem, etc.), or a combination thereof that is appropriate for accessing encoded video data. stored on file server 114. File server 114 and input interface 122 may be configured to operate according to a streaming protocol, a download-based transfer protocol, or a combination of the above.

[0045] Output interface 108 and input interface 122 may represent wireless transmitter/receiver devices, modems, wired network components (e.g., Ethernet cards), wireless communication components that operate according to any of a variety of IEEE 802.11 standards, or other physical Components. In examples in which the output interface 108 and the input interface 122 comprise wireless components, the output interface 108 and the input interface 122 may be configured to transmit data, such as encoded video data, according to a cellular communication standard such as 4G, 4G LTE (standard long-term development), advanced LTE, 5G, etc. In some examples, in which the output interface 108 comprises a wireless transmitter, the output interface 108 and the input interface 122 may be configured to transmit data, such as encoded video data, according to other wireless communication standards such as the IEEE 802.11 specification, IEEE 802.15 - specification (eg ZigBee™), Bluetooth™ standard, etc. In some examples, source device 102 and/or target device 116 may include respective on-chip (SoC) devices. For example, source device 102 may include an SoC device to perform functionality attributed to video encoder 200 and/or output interface 108, and target device 116 may include an SoC device to perform functionality attributed to video decoder 300 and/or interface 122 entries.

[0046] The techniques of this disclosure may be applied to video coding in support of any of a variety of multimedia applications such as over-the-air television broadcasts, cable television, satellite television, video streaming over the Internet such as dynamic adaptive streaming over HTTP (DASH), digital video that is encoded onto a storage medium, decoding of digital video stored on a storage medium, or other applications.

[0047] The input interface 122 of the target device 116 receives an encoded video bit stream from a computer-readable medium 110 (eg, communication media, storage device 112, file server 114, etc.). The encoded video bitstream may include overhead information specified by video encoder 200 that is also used by video decoder 300, such as syntax elements having values that describe characteristics and/or processing of video blocks or other encoded units (e.g., slices, frames, groups frames, sequences, etc.). The display device 118 displays the decoded frames of the decoded video data to the user. Display device 118 may represent any of a variety of display devices such as a cathode ray tube (CRT) display, liquid crystal display (LCD), plasma display, organic light emitting diode (OLED) display, or other type of display device.

[0048] Although not shown in FIG. 1, in some examples, video encoder 200 and video decoder 300 may be integrated with an audio encoder and/or audio decoder and may include appropriate mux-de-multiplexer modules or other hardware and software in order to process media streams including both audio , and video in the general data stream. If applicable, the multiplexer-demultiplexer modules may conform to the ITU H.223 Multiplexer Protocol or other protocols such as User Datagram Protocol (UDP).

[0049] Video encoder 200 and video decoder 300 may be implemented as any of a variety of suitable encoder and/or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays ( FPGA) as discrete logic, software, hardware, firmware, or any combination of the above. When the technologies are implemented in part in software, a device may store instructions for the software on a suitable non-volatile computer-readable medium and execute the instructions in hardware using one or more processors to implement the technologies of this disclosure. Each of video encoder 200 and video decoder 300 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder/decoder (codec) in a respective device. The device including video encoder 200 and/or video decoder 300 may include an integrated circuit, a microprocessor, and/or a wireless communication device such as a cellular phone.

[0050] Video encoder 200 and video decoder 300 may operate according to a video coding standard such as ITU-T H.265, also referred to as the "High Efficiency Video Coding (HEVC) standard", or extensions thereof, such as multi-view and/or scalable video coding extensions. video encoding. Alternatively, video encoder 200 and video decoder 300 may operate according to other proprietary or industry standards, such as the Joint Research Establishment Test Model (JEM) standard or ITU-T H.266, also referred to as "Versatile Video Coding (VVC)". The latest draft of the VVC standard is described in Bross et al. "Versatile Video Coding (Draft 6)", Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 , 15th conference: Gothenburg, Sweden, July 3-12, 2019, JVET-O2001-vE (hereinafter referred to as "VVC project 6"). However, the techniques of this disclosure are not limited to any particular coding standard.

[0051] In general, video encoder 200 and video decoder 300 may perform block-based frame coding. The term "block" generally means a structure including data to be processed (eg, encoded, decoded, or otherwise used in an encoding and/or decoding process). For example, the block may include a two-dimensional matrix of luma and/or chrominance data samples. In general, video encoder 200 and video decoder 300 may encode video data represented in YUV- (eg, Y, Cb, Cr) format. Thus, instead of encoding the red, green, and blue (RGB) data for the frame samples, video encoder 200 and video decoder 300 may encode luminance and chrominance components, where the chrominance components may include red hue and blue tint chrominance components. . In some examples, video encoder 200 converts received RGB-formatted data to YUV prior to encoding, and video decoder 300 converts YUV to RGB. Alternatively, pre- and post-processing modules (not shown) can perform these transformations.

[0052] This disclosure can generally mean encoding (eg, encoding and decoding) frames, which includes the process of encoding or decoding frame data. Likewise, this disclosure may refer to coding of blocks of a frame, which includes the process of encoding or decoding data for blocks, such as predictive coding and/or residual coding. The encoded video bitstream generally includes a sequence of values for syntax elements representing encoding decisions (eg, encoding modes) and frame segmentation into blocks. Thus, references to a frame or block encoding are generally to be understood as value encodings for the syntax elements forming the frame or block.

[0053] HEVC defines various blocks including coding units (CU), prediction units (PU), and transform units (TU). According to HEVC, a video encoder (eg, video encoder 200) segments a coding tree unit (CTU) into CUs according to a quadtree structure. Thus, the video encoder segments the CTU and CU into four equal non-overlapping squares, and each quadtree node has either zero or four child nodes. Nodes without child nodes may be referred to as "leaf nodes" and the CUs of such leaf nodes may include one or more PUs and/or one or more TUs. The video encoder may further segment the PU and TU. For example, in HEVC, a residual quadtree (RQT) represents the segmentation of a TU. In HEVC, PUs represent inter-prediction data while TUs represent residual data. CUs that are intra predicted include intra prediction information such as an intra mode indicator.

[0054] As another example, video encoder 200 and video decoder 300 may be configured to operate according to JEM or VVC. According to JEM or VVC, a video encoder (eg, video encoder 200) segments a frame into multiple coding tree units (CTUs). Video encoder 200 may segment the CTU according to a tree structure, such as a quadtree binary tree (QTBT) structure or a multitype tree (MTT) structure. The QTBT framework removes the concepts of several types of segmentation, such as the division between CUs, PUs, and HEVC TUs. The QTBT structure includes two levels: a first level segmented according to quadtree segmentation and a second level segmented according to binary tree segmentation. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of binary trees correspond to coding units (CUs).

[0055] In an MTT segmentation structure, blocks may be segmented using a quadtree (QT) segment, a binary tree (BT) segment, and one or more types of ternary tree (TT) segments (also referred to as "tertiary tree (TT)"). A ternary or tertiary tree segment is a segment in which a block is split into three sub-blocks.In some examples, a ternary or tertiary tree segment divides a block into three sub-blocks without splitting the original block down the center.Types of segmentation in MTT (e.g., QT, BT, and TT) may be symmetrical or asymmetrical.

[0056] In some examples, video encoder 200 and video decoder 300 may use a single QTBT or MTT structure to represent each of the luminance and chrominance components, while in other examples, video encoder 200 and video decoder 300 may use two or more QTBT or MTT structures, eg one QTBT/MTT structure for the luma component and another QTBT/MTT structure for both chrominance components (or two QTBT/MTT structures for the respective chrominance components).

[0057] Video encoder 200 and video decoder 300 may be configured to use HEVC quadtree segmentation, QTBT segmentation, MTT segmentation, or other segmentation structures. For purposes of explanation, the description of the technologies of this disclosure is provided in relation to QTBT segmentation. However, it should be understood that the techniques of this disclosure may also be applied to video encoders configured to also use quadtree segmentation or other types of segmentation.

[0058] Blocks (eg, CTU or CU) may be grouped in various ways into a frame. As one example, a brick may refer to a rectangular area of CTU rows in a particular tile in a frame. A tile may be a rectangular area of the CTU in a particular column of tiles and a particular row of tiles in a frame. A column of tiles means a rectangular area of CTUs having a height equal to the height of a frame and a width specified by syntax elements (eg, in a frame parameter set). A row of tiles means a rectangular area of CTUs indicating a height via syntax elements (eg, in a frame parameter set) and a width equal to the frame width.

[0059] In some examples, a tile may be segmented into multiple bricks, each of which may include one or more CTU rows within the tile. A tile that does not segment into multiple bricks may also be referred to as a "brick". However, a brick that is a true subset of a tile may not be referred to as a "tile".

[0060] Bricks in a frame can also be placed in a slice. A slice can be an integer number of frame bricks that can be contained solely in one network abstraction layer (NAL) unit. In some examples, a slice includes either a certain number of full tiles, or only a rigid sequence of full bricks of a single tile.

[0061] This disclosure may use "N×N" and "N by N" interchangeably to refer to sizes in samples of a block (e.g., CU or other video block) in terms of vertical and horizontal dimensions, e.g., samples 16 ×16 or 16x16 samples. In general, a 16x16 CU should have 16 pixels in the vertical direction (y=16) and 16 pixels in the horizontal direction (x=16). Similarly, an NxN CU generally has N samples in the vertical direction and N samples in the horizontal direction, with N representing a non-negative integer value. Samples in a CU can be placed in rows and columns. In addition, CUs do not need to have the same number of samples in the horizontal direction and in the vertical direction. For example, CUs may contain NxM samples, with M not necessarily equal to N.

[0062] Video encoder 200 encodes video data for CUs representing prediction information and/or residual information and other information. The prediction information indicates how the CU should be predicted in order to generate a prediction block for the CU. The residual information is generally the successive sample differences between pre-coding CU samples and the prediction block.

[0063] To predict a CU, video encoder 200 may generally generate a predictive block for the CU via inter-prediction or intra-prediction. Mutual prediction generally means predicting a CU from a previously coded frame data, while intra prediction generally means predicting a CU from a previously coded identical frame data. To perform inter prediction, video encoder 200 may generate a prediction block using one or more motion vectors. Video encoder 200 may generally perform a motion search in order to identify a reference block that closely matches the CU, eg, in terms of differences between the CU and the reference block. Video encoder 200 may compute a difference metric using sum of absolute differences (SAD), sum of squared differences (SSD), mean absolute differences (MAD), root mean square differences (MSD), or other such difference calculations to determine whether or not a reference block closely matches. with the current CU. In some examples, video encoder 200 may predict the current CU using unidirectional prediction or bidirectional prediction.

[0064] Some examples of JEM and VVC also provide an affine motion compensation mode, which can be considered an inter-prediction mode. In affine motion compensation mode, video encoder 200 may determine two or more motion vectors that represent non-translational motion in space, such as zoom in or out, rotation, perspective motion, or other types of irregular motion.

[0065] To perform intra prediction, video encoder 200 may select an intra prediction mode to generate a predictive block. Some examples of JEM and VVC provide sixty-seven intra prediction modes including various directional modes as well as planar mode and DC mode. In general, video encoder 200 selects an intra prediction mode that describes adjacent samples relative to the current block (eg, CU) from which the current block samples can be predicted. Such samples may generally be above, above, and to the left or left of the current block in the same frame as the current block, as long as video encoder 200 encodes CTUs and CUs in raster scan order (left to right, top to bottom).

[0066] Video encoder 200 encodes data representing a prediction mode for the current block. For example, for inter prediction modes, video encoder 200 may encode data representing which of the various available inter prediction modes is in use, as well as motion information for the corresponding mode. For unidirectional or bidirectional inter-prediction, for example, video encoder 200 may encode motion vectors using advanced motion vector prediction (AMVP) or combining mode. Video encoder 200 may use similar modes to encode motion vectors for the affine motion compensation mode.

[0067] After prediction, such as intra prediction or block inter prediction, video encoder 200 may calculate residual data for the block. Residual data, such as a residual block, represents a sample by means of sample differences between a block and a prediction block for the block generated using the corresponding prediction mode. Video encoder 200 may apply one or more transforms to the residual block to generate transformed data in a transform region instead of a sample region. For example, video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the video residual data. Additionally, video encoder 200 may apply a secondary transform after the first transform, such as mode-dependent non-separable secondary transform (MDNSST), signal-dependent transform, Karhunen-Loeve (KLT) transform, and the like. Video encoder 200 generates transform coefficients after applying one or more transforms.

[0068] As noted above, after transforms to generate transform coefficients, video encoder 200 may perform quantization of the transform coefficients. Quantization generally means a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, providing additional compression. By performing the quantization process, video encoder 200 may reduce the bit depth associated with some or all of the transform coefficients. For example, video encoder 200 may round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, video encoder 200 may perform a bitwise right shift of the value to be quantized.

[0069] After quantization, video encoder 200 may scan transform coefficients forming a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place higher energy (and therefore lower frequency) transform coefficients at the beginning of the vector and place lower energy (and therefore higher frequency) transform coefficients at the end of the vector. In some examples, video encoder 200 may use a predefined scan order to scan the quantized transform coefficients to generate a serialized vector and then entropy encode the quantized transform coefficients of the vector. In other examples, video encoder 200 may perform adaptive scanning. After scanning the quantized transform coefficients to generate a one-dimensional vector, video encoder 200 may entropy encode the one-dimensional vector, such as according to context adaptive binary arithmetic coding (CABAC). Video encoder 200 may also entropy encode other syntax elements describing metadata associated with encoded video data for use by video decoder 300 when decoding video data.

[0070] To perform CABAC, video encoder 200 may assign a context in a context model to a character to be transmitted. The context may be related, for example, to whether adjacent character values are null or not. The probability determination may be based on the context assigned to the symbol.

[0071] Video encoder 200 may further generate syntax data, such as block-based syntax data, frame-based syntax data, and sequence-based syntax data, to video decoder 300, such as in a frame header, block header, slice header, or other syntax data, such as a sequence parameter set (SPS), a frame parameter set (PPS), or a video parameter set (VPS). Video decoder 300 can similarly decode such syntax data in order to determine how to decode the corresponding video data.

[0072] Thus, video encoder 200 may generate a bit stream including encoded video data, such as syntax elements describing frame segmentation into blocks (eg, CUs), and prediction information and/or residual information for blocks. Ultimately, video decoder 300 may receive the bit stream and decode the encoded video data.

[0073] In general, video decoder 300 performs a reciprocal process of the process performed by video encoder 200 to decode encoded video bitstream data. For example, video decoder 300 may decode values for syntax elements of a bitstream using CABAC in a manner substantially similar, albeit inversely, to the CABAC coding process of video encoder 200. The syntax elements may specify segmentation of frame information per CTU and segmentation of each CTU according to an appropriate segmentation structure, such as a QTBT structure to define the CU CTU. The syntax elements may further define prediction information and residual information for blocks (eg, CUs) of video data.

[0074] The residual information may be represented, for example, by quantized transform coefficients. Video decoder 300 may inversely quantize and inversely transform the quantized transform coefficients of the block to reproduce the residual block for the block. The video decoder 300 uses the reported prediction mode (intra or inter prediction) and associated prediction information (eg, inter prediction motion information) to generate a prediction block for the block. Video decoder 300 may then combine the predictive block and the residual block (on a per-sample basis) to reproduce the original block. Video decoder 300 may perform additional processing, such as performing a deblocking process, to reduce visual artifacts along block boundaries.

[0075] This disclosure may generally refer to "signaling" certain information, such as syntax elements. The term "signaling" can generally mean the transmission of values for syntax elements and/or other data used to decode encoded video data. Thus, video encoder 200 may signal values for syntax elements in the bitstream. In general, signaling means generating a value in a bitstream. As noted above, source device 102 may transport the bitstream to destination device 116 in near real time or non-real time, such as when syntax elements are stored in storage device 112 for later retrieval by destination device 116.

[0076] FIG. 2A and 2B is a conceptual diagram illustrating an exemplary quadtree binary tree (QTBT) structure 130 and a corresponding coding tree unit (CTU) 132 . The solid lines represent the quadtree split, and the dotted lines indicate the binary tree split. At each split (i.e. non-leaf) node of the binary tree, one flag is passed to indicate which type of split (i.e. horizontal or vertical) is used, where 0 indicates a horizontal split and 1 indicates a vertical split in this example . For quadtree splitting, it is not necessary to specify the type of splitting, because the quadtree nodes split the block horizontally and vertically into 4 equally sized subblocks. Accordingly, video encoder 200 may encode, and video decoder 300 may decode, syntax elements (eg, split information) for the tree level of the area of the QTBT structure 130 (i.e., solid lines) and syntax elements (eg, split information) for the tree level. predicting the QTBT structure 130 (ie, dotted lines). Video encoder 200 may encode and video decoder 300 may decode video data, such as prediction and transform data, for CUs represented by leaf terminal nodes of QTBT structure 130.

[0077] In general, the CTU 132 of FIG. 2B may be associated with parameters specifying block sizes corresponding to the nodes of the QTBT structure 130 at the first and second levels. These parameters may include CTU size (representing the size of CTU 132 in samples), minimum quadtree size (MinQTSize, representing the minimum allowed size of quadtree leaf nodes), maximum binary tree size (MaxBTSize, representing the maximum allowed size of binary root nodes). tree), the maximum depth of a binary tree (MaxBTDepth, representing the maximum allowed depth of a binary tree), and the minimum size of a binary tree (MinBTSize, representing the minimum allowed size of leaf nodes of a binary tree).

[0078] The root node of the QTBT structure corresponding to the CTU may have four child nodes at the first level of the QTBT structure, each of which may be segmented according to segmentation into a quadtree. Thus, first-level nodes are either leaf nodes (having child nodes) or have four child nodes. An example QTBT structure 130 represents such nodes as including a parent node and child nodes having solid lines for branches. If the nodes of the first level do not exceed the maximum allowed size of the root nodes of the binary tree (MaxBTSize), then the nodes can additionally be segmented by means of the corresponding binary trees. Splitting into a binary tree of a single node can be iterated until the resulting nodes of the split reach the minimum allowed leaf node size of the binary tree (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). Example QTBT structure 130 represents such nodes as having dashed lines for branches. A leaf node of a binary tree is called a "coding unit (CU)" which is used for prediction (eg, intra-picture or inter-picture prediction) and transformation without further segmentation. As explained above, CUs may also be referred to as "video blocks" or "blocks".

[0079] In one example of a QTBT segmentation structure, the CTU size is set to 128x128 (luminance samples and two corresponding 64x64 chrominance samples), MinQTSize is set to 16x16, MaxBTSize is set to 64x64, MinBTSize( for width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree segmentation is applied to the CTU first to form the leaf nodes of the quadtree. The leaf nodes of the quadtree can range in size from 16×16 (i.e. MinQTSize) to 128×128 (i.e. CTU size). If the leaf node of the quadtree is 128×128, then it should not be further split by the binary tree because the size exceeds MaxBTSize (ie 64×64, in this example). Otherwise, the leaf node of the quadtree is further segmented by a binary tree. Therefore, the leaf node of the quadtree is also the root node for the binary tree and has a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4, in this example), no further splitting is allowed. When a binary tree node has a width equal to MinBTSize (4, in this example), this implies that no additional horizontal splitting is allowed. Similarly, a binary tree node having a height equal to MinBTSize implies that additional vertical splitting is not allowed for that binary tree node. As noted above, the leaf nodes of the binary tree are called "CU" and are further processed according to prediction and transformation without additional segmentation.

[0080] Trellised coding quantization (TCQ) is proposed by H. Schwarz, T. Nguyen, D. Marpe, T. Wiegand, M. Karczewicz, M. Coban, J. Dong, "CE7: Transform coefficient coding with reduced number of regular-coded bins (tests 7.1.3a, 7.1.3b)", JVET document JVET-L0274, Macau, China, October 2018 (hereafter JVET-L0274). In JVET-L0274 technologies, two scalar quantizers are switchable for quantization/dequantization. The scalar quantizer used for the current transform coefficient/quantized coefficient is determined by the parity (least significant bit) of the quantized coefficient that precedes the current transform coefficient/quantized coefficient in scan order.

[0081] A coefficient coding scheme along with TCQ is also proposed in JVET-L0274, whereby context selection for decoding a quantized coefficient depends on the quantizer used. In particular, the coefficient significance flag (SIG) indicating whether the coefficient is zero or non-zero has three sets of context models, and the set chosen for a particular SIG depends on the quantizer used for the associated coefficient. Therefore, when starting to decode the SIG of the current coefficient, the entropy decoder must know the parity of the coefficient at the previous scan position, which determines the quantizer for the current coefficient and hence the context set for the SIG of that coefficient.

[0082] The TU is divided into non-overlapping sub-blocks, called "groups for coding (CG)", the size of which is usually 4×4. The decoding process described herein can sometimes be described with respect to 4x4 CG, but can easily be extended to any other CG sizes. The techniques of this disclosure, and therefore the description included herein, primarily relate to encoding and decoding processes for an absolute coefficient level in CG. Other information associated with the CG, such as characters, may be encoded or decoded in the manner described in JVET-L0274, but may also be encoded and decoded using alternative technologies.

[0083] Video encoder 200 and video decoder 300 may be configured to process syntax elements in bitstreams. For example, the following syntax elements may be used to represent an absolute level (absLevel) value for a coefficient.

- sig_coeff_flag: This flag is 0 if absLevel is 0; otherwise, the flag is 1.

- abs_level_gt1_flag: The flag is present in the bitstream if sig_coeff_flag is 1. It is 1 if absLevel is greater than 1; otherwise, the flag is 0.

- par_level_flag: The flag is present in the bitstream if rem_abs_gt1_flag is 1. It is 0 if absLevel is an odd number and 1 if absLevel is an even number.

- abs_level_gt3_flag: The flag is present in the bitstream if abs_level_gt1_flag is equal to 1. It is equal to 1 if absLevel is greater than 3; otherwise, the flag is 0.

- abs_remainder: This syntax element is present in the bitstream if abs_level_gt3_flag is equal to 1. It represents the remaining absolute value of the transform coefficient level, which is encoded with the Golomb-Rice code.

- abs_level: This is the absolute value of the level of the transform coefficients, which is encoded with the Golomb-Rice code.

[0084] Below, the syntax elements sig_coeff_flag, par_level_flag, abs_level_gt1_flag, abs_level_gt3_flag, abs_remainder, and abs_level are referred to as SIG, Par, Gt1, Gt2, remLevel, absLevel, respectively, for ease of description.

[0085] Video encoder 200 and video decoder 300 may be configured to set any of the above syntax elements that are not parsed from the bit stream to a default value of 0, for example. Given the values of the first of the five syntax elements, the value for the absolute level of the coefficient can be calculated as follows:

absoluteLevel=SIG+Gt1+Par+(Gt2<<1)+(remLevel<<1) (1)

[0086] Alternatively, if the coefficient is encoded entirely in bypass coding mode, then absoluteLevel may be directly encoded as abs_level.

[0087] FIG. 3 shows an example order for syntax elements representing absoluteLevel in CG, as specified in JVET-L0274. Other technologies may also be used. As can be seen, all five syntax elements are parsed from the bit stream when absLevel is greater than 4.

[0088] In the example of FIG. 3, video decoder 300 scans positions in the CG in a maximum of four passes. In the first pass 136, video decoder 300 obtains, through parsing, the values for SIG, Par, and Gt1. Only after non-zero SIGs are the corresponding Gt1 and Par provided. Thus, if video decoder 300 determines that SIG is zero, which means that the coefficient level is zero, then video decoder 300 does not receive instances of Gt1 and Par for that coefficient. After the first pass 136, the value for the partial absoluteLevel, referred to as absLevel1, for each position, can be restored, as shown in equation (2).

absLevel1=SIG+Par+Gt1 (2)

[0089] In some implementations, video decoder 300 may be configured to obtain, via parsing, a maximum of 28 regular-coded bins in the first pass 136 for 4x4 sub-blocks, and a maximum of 6 regular-coded bins for 2x2 sub-blocks. Limits on the number of regularly-encoded bins can be forced to be enabled in bin groups SIG, Gt1, Par, which means that each bin group SIG, Gt1, and Par is encoded as a set, and that switching to bypass coding in the middle set is not allowed.

[0090] If there is at least one non-zero Gt1 in the first pass, then video decoder 300 may be configured to scan in the second pass 138. In the second pass 138, video decoder 300 obtains, by parsing, Gt2 for positions with non-zero GT1. The bins in the first pass 136 and second passes 138 may be regularly encoded, which means that the bin probability distribution is modeled by the selected context model. If there is at least one non-zero Gt2 in second pass 138, then video decoder 300 scans third pass 140. During third pass 140, video decoder 300 obtains, by parsing, remLevel positions with non-zero Gt2. The RemLevel is not binary, and video decoder 300 can bypass the bins of the binarized version of rem, which means that the bins are assumed to be evenly distributed and no context selection is required.

[0091] In the fourth pass 142, video decoder 300 scans all remaining coefficients not partially represented with regular-coded bins in the previous three passes. The extra pass coefficient levels 142 are encoded as absolute values using bins after bypass encoding.

[0092] Video encoder 200 and video decoder 300 may perform context modeling. The context modeling used in JVET-L0274 is also briefly presented here, along with modifications suggested through this disclosure. Context modeling, explained in more detail below, generally means selecting probabilistic models, also referred to as "contexts", for a bin to be decoded. In JVET-L0274, the syntax elements SIG, Par, Gt1 and Gt2 are encoded using context modeling. The choice of context depends on the values of absLevel1s in the local environment, denoted as N. FIG. 4 illustrates a sample environment in use. In this case, positions inside the reference, but outside the current TU, can be excluded from N.

[0093] FIG. 4 shows an illustration of the benchmark used to select probabilistic models. The box marked with "X" indicates the current scan position, and the boxes marked with "Y" represent the locale in use.

[0094] For the current position (see X box in FIG. 4), video decoder 300 determines the context indices of its SIGs, Par, Gt1, and Gt2, denoted as ctxIdxSIG, ctxIdxPar, ctxIdxGt1, and ctxIdxGt2. To determine the context indices, video decoder 300 may first determine three variables: numSIG, sumAbs1, and d. The variable numSIG represents the number of non-zero SIGs in N, which is expressed by Equation (3) below.

(3)

(3)

[0095] The variable sumAbs1 represents the sum of absLevel1 in N, which is expressed by the following equation (4):

(4)

(4)

[0096] The variable d represents the diagonal measure of the current position in the TU, as expressed by Equation (5) below:

d=x+y (5),

where x and y represent the coordinates of the current position in the TU.

[0097] Given sumAbs1 and d, video decoder 300 determines a context index for SIG decoding as follows:

- For the luminance signal, ctxIdxSIG is determined by equation (6):

ctxIdxSIG=18*max(0, state-1)+min(sumAbs1, 5)+(d < 2 ? 12 : (d<5? 6 : 0)) (6)

- For a chrominance signal, ctxIdxSIG is determined by equation (7):

ctxIdxSIG=12*max(0, state-1)+min(sumAbs1, 5)+(d<2 ? 6 : 0)) (7)

[0098] In equations (6) and (7), the state variable represents the current state of the state machine defined in JVET-L0274.

[0099] Given sumSIG, sumAbs1, and d, video decoder 300 determines the context index for decoding Par as follows:

- If the current scan position is equal to the position of the last non-zero coefficient, ctxIdxPar is 0.

- Otherwise:

-o For the luminance signal, ctxIdxPar is determined by equation (8):

ctxIdxPar=1+min(sumAbs1-numSIG, 4)+(d==0 ? 15 : (d<3 ? 10 : (d<10 ? 5 : 0))) (8)

-o For a chrominance signal, ctxIdxPar is determined by (9):

ctxIdxPar=1+min(sumAbs1-numSIG, 4)+(d==0? 5 : 0) (9)

ctxIdxGt1 and ctxIdxGt2 are set to the value of ctxIdxPar.

[0100] Video encoder 200 and video decoder 300 may be configured to perform RemLevel encoding. Video decoder 300 extracts the Rice parameter (ricePar) to encode the non-binary syntax element remRemainder (remLevel) and absLevel as follows:

- At the beginning of each sub-block, ricePar is set to 0;

- After encoding the remainder syntax element, the Rice parameter (ricePar) is modified as follows:

If ricePar is less than 3 and the last coded value of remainder is greater than ((3<<ricePar)-1), ricePar is incremented by 1.

[0101] To encode the absLevel non-binary syntax element representing absolute quantization indices that are fully bypass-encoded, the following applies:

- The sum sumAbs of absolute values in the local reference is determined.

- Variables ricePar and posZero are determined by table lookup according to:

ricePar=riceParTable[min(31, sumAbs)]

posZero=posZeroTable[max(0, state-1)][min(31, sumAbs)],

where the state variable represents the state for dependent quantization (it is 0 when dependent quantization is deactivated), and the tables riceParTable[] and posZeroTable[][] are defined as follows:

riceParTable[32]={

0,0,0,0,0,0,0,1,1,1,1,1,1,1,2,2,2,2,2,2,2,2,2,2,2, 2,2,2,3,3,3,3

};

posZeroTable[3][32]={

{0,0,0,0,0,1,2,2,2,2,2,2,4,4,4,4,4,4,4,4,4,4,4,8,8 ,8,8,8,8,8,8,8},

{1,1,1,1,2,3,4,4,4,6,6,6,8,8,8,8,8,8,12,12,12,12,12,12,12 ,12,16,16,16,16,16,16},

{1,1,2,2,2,3,4,4,4,6,6,6,8,8,8,8,8,8,12,12,12,12,12,12,12 ,16,16,16,16,16,16,16}

};

- The intermediate variable codeValue is retrieved as follows:

-o If absLevel is 0, codeValue is set to posZero;

-o Otherwise, if absLevel is less than or equal to posZero, codeValue is set to absLevel-1;

-o Otherwise (absLevel is greater than posZero), codeValue is set to absLevel.

- The codeValue is encoded using the Golomb-Rice code with the Rice parameter ricePar.

[0102] Video encoder 200 and video decoder 300 may be configured to perform absoluteLevel recovery. The restoration of absoluteLevel may be identical to the restoration in JVET-L0274, as explained above with respect to the syntax elements in the bitstream.

[0103] Video encoder 200 and video decoder 300 may be configured to encode the Gt2 flags in an interleaved manner. In some examples, instead of the described scheme in which the SIG, Gt1-, Par flags are encoded in the first pass and the Gt2 flags are encoded in the second pass, the Gt2 flags may be included in the first pass after the Par flag or after the Gt1- flag as shown in the drawings below, reducing the encoding passes to 3 from 4.

[0104] FIG. 5 shows an example of an interleaved Gt2 flag in the first pass after the Par flag. With respect to FIG. 5, video decoder 300 may determine a value for absLevel1 identical to that described above with respect to FIG. 3, but the order in which the various syntax elements are received is changed. For example, in FIG. 5, video decoder 300 determines the values for Gt2 as part of the first pass 162 and not as part of the second pass (eg, second pass 138 in FIG. 3). Thus, in FIG. 5, the first passage 136 and the second passage 138 of FIG. 3 are effectively combined into one pass (first pass 162), and third pass 140 and fourth pass 142 of FIG. 3 become the second passage 164 and the third passage 166 of FIG. 5, respectively. Thus, in the example of FIG. 5, only three passes are required in order to transfer all syntax elements.

[0105] FIG. 6 shows an example of an interleaved Gt2 flag in the first pass after the Gt1 flag. In this case, absLevel1 can be calculated as follows:

absLevel1=SIG+Par+Gt1+(Gt2<<1)

and can be used in context extraction in the formulas introduced above regarding context modeling. With respect to FIG. 6, video decoder 300 may determine a value for absLevel1 identical to that described above with respect to FIG. 3, but the order in which the various syntax elements are received is changed. For example, in FIG. 6, video decoder 300 determines the values for Gt2 as part of the first pass 172 and not as part of the second pass (eg, second pass 138 in FIG. 3). Thus, in FIG. 6, the first passage 136 and the second passage 138 of FIG. 3 are effectively combined into one pass (first pass 172), and third pass 140 and fourth pass 142 of FIG. 3 become the second passage 174 and the third passage 176 of FIG. 6, respectively. Thus, in the example of FIG. 6, only three passes are required in order to transfer all syntax elements. In FIG. 6, the syntax elements of the first pass 172 are scanned in a different order than the order for the syntax elements of the first pass 162 in FIG. 5, but the other passages are generally identical.

[0106] Video encoder 200 and video decoder 300 may be configured to use a partial representation of the last regular bin-coded coefficients, wherein values for some coefficients may be partially transmitted using regular bin-coded bins with a residual value transmitted using a bypass. coding. In the coding scheme described in JVET-L0274, the last regularly-coded bin-based coefficient at which the regular-coded bin budget for the first coding pass is achieved (e.g., coefficient K in FIG. 3), bins SIG, Gt1 , Par, are encoded as regular-encoded bins. Regular element-based encoding does not terminate in the middle of a SIG-Gt1-Par-group. Similarly for the SIG-Gt1-Par-Gt2-group or SIG-Gt1-Gt2-Par-group (for example, Figs. 5 and 6), the coding for the SIG-, Gt1-, Par-, Gt2-flags of the coefficient K is carried out in a regular mode. This disclosure proposes techniques for violating this limitation by allowing regular-encoded bins to be possible after encoding the SIG and Gt1 flags, as shown in FIG. 7 and 8.

[0107] FIG. 7 shows an example of a partial last coefficient encoding in which the regularly encoded bin limit is reached for the SIG-Gt1-Par-Gt2 encoding in the first encoding pass 182. In the example of FIG. 7, video decoder 300 scans a third pass 186 that includes both remLevel and absLevel values. The value for remLevel represents the remainder value between the actual value for the coefficient and the partial value determined from the first pass 182 and the second pass 184. The value for absLevel, in contrast, represents the absolute value of the coefficient value.

[0108] FIG. 8 shows an example of a partial last coefficient encoding in which the regularly encoded bin limit is reached for SIG-Gt1-Gt2-Par encoding in the first encoding pass 192. In FIG. 8, the syntax elements of the first pass 192 are scanned in a different order than the order for the syntax elements of the first pass 182 in FIG. 7. Second passage 194 and third passage 196 are generally identical to second passage 184 and third passage 186 in FIG. 7.

[0109] In the examples of FIG. 7 and 8, the remaining K coefficient level is encoded as remLevelFull, which is bypass-encoded in the third pass 186/196, along with the values for absLevel, which are bypass-encoded. The value for the coefficient is represented as:

absoluteLevel=SIG+Gt1+remLevelFull,

or:

absoluteLevel=SIG+remLevelFull.

[0110] In other examples, the regular encoding of the bins may be completed after the encoding of the Par and Gt2 flags, or vice versa. In this case, the remaining level of the last coefficient shall be encoded as half of the remaining level, i.e.:

absoluteLevel=SIG+GT1+Par+(remLevel<<1),

or:

absoluteLevel=SIG+GT1+(GT2<<1)+(remLevel<<1).

[0111] The total number of regularly encoded bins may be indicated as the total number that is superimposed on the interleaved SIG, Gt1, Gt2, and Par flags.

[0112] Video encoder 200 and video decoder 300 may be configured to perform coding on the remaining layers. The remLevel encoding in the second encoding pass may be identical to that described above with respect to RemLevel encoding. Video decoder 300 may update and extract the Rice parameter until the end of the K-1 coefficient, with the K-1 coefficient representing the penultimate regular-coded coefficient before the last regular-coded coefficient (K coefficient). Video decoder 300 may decode the K-1 coefficient using fully regular coding, and may decode the K coefficient completely using regular coding, or using a combination of regular coding and bypass coding. For remLevelFull encoding of the K coefficient, video decoder 300 may update the Rice parameter as follows:

riceParBypass=2xricePar+lastCodedGt2Flag,

riceParBypass=riceParBypass==1? riceParBypass-1: riceParBypass,

where ricePar is the ricePar used to encode remLevel in the second pass, and lastCodedGt2Flag is the value of the last encoded Gt2 flag in the first pass of encoding. Alternatively, a value for ricePar that is equal to 2xricePar may be used, or ricePar may be used that matches the optimal remaining level encoding for the K coefficient.

[0113] In some examples, to encode remLevelFull of the K coefficient, video decoder 300 may update the Rice parameter as follows:

1-riceParBypass=min(ricePar>0? ricePar+1: lastCodedGt2Flag, 3)

2-riceParBypass=min(2*ricePar+lastCodedGt2Flag, 3)

3-riceParBypass=min(2*ricePar, 3)

[0114] For the rest of the absLevel values for coefficients that are fully coded using bypass coding, video decoder 300 may update riceParBypass as follows. Before coefficient coding, after bypass coding, video decoder 300 updates riceParBypass as follows:

if(riceParBypass<3 &&absoluteLevelPrevCoeff>((3<<riceParBypass)-1){riceParBypass++;}

[0115] Similar to the way ricePar is updated to encode remLevel, except for the full absolute value of the previous encoded coefficient (K coefficient), is used for thresholding instead of remLevel.

[0116] Video decoder 300 may extract the posZero parameter to determine absLevel according to any of a variety of different technologies. In one example, video decoder 300 may extract the posZero parameter to determine absLevel using a lookup table as follows:

posZero=posZeroTableBypass[max(0, state-1)][riceParBypass]

posZeroTableBypass[3][4]={{1, 2, 4, 8},{3, 6, 12, 16},{4, 6, 12, 16}};

[0117] Video decoder 300 may extract an intermediate variable codeValue, which should be encoded as follows:

-o If absLevel or remLevelFull is 0, codeValue is set to posZero;

-o Otherwise, if absLevel or remLevelFull is less than or equal to posZero, codeValue is set to absLevel-1 or remLevelFull-1, respectively.

-o Otherwise (absLevel or remLevelFull is greater than posZero), codeValue is set to absLevel or remLevelFull, respectively.

[0118] Video decoder 300 may encode the codeValue using a Golomb-Rice code with a riceParBypass Rice parameter.

[0119] FIG. 9 is a block diagram illustrating an exemplary video encoder 200 that may perform the techniques of this disclosure. Fig. 9 is provided for purposes of explanation and should not be considered a limitation of the technologies illustrated and described in general terms in this disclosure. For purposes of explanation, this disclosure describes video encoder 200 in the context of video coding standards such as the HEVC video coding standard and the upcoming H.266 video coding standard. However, the techniques of this disclosure are not limited to these video coding standards and are generally applicable to video encoding and decoding.

[0120] In the example of FIG. 9, the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, buffer 218 decoded frames (DPB) and module 220 entropy encoding.

[0121] Video data storage 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data stored in video data storage 230, for example, from video source 104 (FIG. 1). DPB 218 may act as a reference frame store that stores reference video data for use in predicting subsequent video data by video encoder 200. Video data store 230 and DPB 218 may be formed by any of a variety of memories, such as dynamic random access memory (DRAM) DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of storage devices. The video storage device 230 and the DPB 218 may be provided via an identical storage device or separate storage devices. In various examples, video data storage 230 may be on-chip with other components of video encoder 200, as illustrated, or off-chip with respect to those components.

[0122] In this disclosure, reference to video data storage 230 is not to be interpreted as being limited to storage internal to video encoder 200, unless specifically described as such, or storage external to video encoder 200, unless specifically described as such. . Conversely, a reference to video data storage 230 is to be understood as reference storage that stores video data that video encoder 200 receives for encoding (eg, video data for the current block to be encoded). The storage device 106 of FIG. 1 may also provide temporary storage of outputs from various modules of video encoder 200.

[0123] The various modules of FIG. 9 are illustrated to assist in understanding the operations performed by video encoder 200. The modules may be implemented as fixed function circuits, programmable circuits, or a combination of the above. Fixed functional circuits means circuits that provide specific functionality and are preset in terms of operations that can be performed. Programmable circuits means circuits that can be programmed to perform various tasks and provide flexible functionality in operations that can be performed. For example, the programmable circuits may execute software or firmware that causes the programmable circuits to operate in a manner specified by software or firmware instructions. Fixed function circuits can execute program instructions (eg, to receive parameters or output parameters), but the types of operations that fixed function circuits perform are generally immutable. In some examples, one or more modules may be various circuit blocks (fixed function or programmable), and in some examples, one or more modules may be integrated circuits.

[0124] Video encoder 200 may include arithmetic logic units (ALUs), elementary functional units (EFUs), digital circuits, analog circuits, and/or programmable cores formed from programmable circuits. In examples where operations of video encoder 200 are performed using software executable by programmable circuitry, memory 106 (FIG. 1) may store object code for software that video encoder 200 receives and executes or other memory in video encoder 200 (not shown) can store such instructions.

[0125] The video storage device 230 is configured to store received video data. The video encoder 200 may retrieve a frame of video data from the video data storage device 230 and provide the video data to the residual generator 204 and the mode selection module 202 . The video data in the video data storage 230 may be raw video data to be encoded.

[0126] The mode selection module 202 includes a motion estimation module 222, a motion compensation module 224, and an intra prediction module 226. The mode selection module 202 may include additional functional modules to perform video prediction in accordance with other prediction modes. By way of example, mode selection module 202 may include a palette processing module, an intra-block copy module (which may be part of motion estimation module 222 and/or motion compensation module 224), affine processing module, linear model (LM ) and so on.

[0127] Mode selection module 202 generally coordinates multiple encoding passes to test combinations of encoding parameters and resulting distortion values versus rate for such combinations. The coding parameters may include segmentation of the CTU per CU, prediction modes for the CU, transform types for the CU residual data, quantization parameters for the CU residual data, and so on. The mode selection module 202 may ultimately select a combination of coding parameters having rate-distortion values that are better than the other tested combinations.

[0128] Video encoder 200 may segment a frame retrieved from video storage 230 into a sequence of CTUs and encapsulate one or more CTUs in a slice. The mode selection module 202 may segment the frame CTU according to a tree structure such as the QTBT structure or the HEVC quadtree structure described above. As described above, video encoder 200 may generate one or more CUs from CTU segmentation according to a tree structure. Such a CU may also be referred to generically as a "video block" or "block".

[0129] In general, mode selection module 202 also controls its components (e.g., motion estimation module 222, motion compensation module 224, and intra prediction module 226) so as to generate a prediction block for the current block (e.g., the current CU or, in HEVC, overlapping part of PU and TU). For inter-prediction of the current block, motion estimation module 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference frames (eg, one or more previously coded frames stored in DPB 218). In particular, motion estimation module 222 may calculate a value representing how similar a potential reference block is with respect to the current block, for example, according to Sum Absolute Differences (SAD), Sum Squared Differences (SSD), Average Absolute Differences (MAD), RMS Differences (MSD), etc. Motion estimation module 222 can generally perform these calculations using successive sample differences between the current block and the reference block under consideration. Motion estimation module 222 may identify the reference block having the smallest value resulting from these calculations, indicating the reference block that most closely matches the current block.

[0130] The motion estimation module 222 may generate one or more motion vectors (MVs) that define positions of reference blocks in reference frames relative to the position of the current block in the current frame. Motion estimation module 222 may then provide motion vectors to motion compensation module 224 . For example, for unidirectional inter prediction, motion estimation module 222 may provide one motion vector, while for bidirectional inter prediction, motion estimation module 222 may provide two motion vectors. Motion compensation module 224 may then generate a predictive block using the motion vectors. For example, motion compensation module 224 may extract reference block data using a motion vector. As another example, if the motion vector has fractional precision, motion compensation module 224 may interpolate values for the predictive block according to one or more interpolation filters. In addition, for bidirectional inter-prediction, motion compensation module 224 may extract data for two reference blocks identified by respective motion vectors and combine the extracted data, for example, by successive sample averaging or weighted averaging.

[0131] As another example, for intra predictive coding or intra prediction coding, intra prediction module 226 may generate a predictive block from samples adjacent to the current block. For example, for directional modes, intra prediction module 226 can generally mathematically combine adjacent sample values and populate these computed values in a given direction for the current block to form a predictive block. As another example, for DC mode, intra prediction module 226 may calculate an average of adjacent samples with respect to the current block and generate a prediction block that includes this resulting average for each prediction block sample.

[0132] The mode selection module 202 provides a predictive block to the residual generation module 204 . The residual generation module 204 receives a raw, uncoded version of the current block from the video data storage 230 and a predictive block from the mode selection module 202 . The residual generation module 204 calculates successive sample differences between the current block and the predictive block. The resulting successive sample differences define the residual block for the current block. In some examples, residual block 204 may also determine differences between sample values in the residual block to generate a residual block using residual differential pulse code modulation (RDPCM). In some examples, residual module 204 may be generated using one or more subtractor circuits that perform binary subtraction.

[0133] In examples in which mode selector 202 segments CUs into PUs, each PU may be associated with a luminance prediction unit and corresponding chrominance prediction units. Video encoder 200 and video decoder 300 may support PUs having different sizes. As mentioned above, the size of the CU may mean the size of the luminance coding unit of the CU, and the size of the PU may mean the size of the luminance prediction unit of the PU. Assuming that the specific CU size is 2Nx2N, video encoder 200 may support PU sizes of 2Nx2N or NxN for intra prediction and symmetric PU sizes of 2Nx2N, 2NxN, Nx2N, NxN or similar for inter prediction. Video encoder 20 and video decoder 30 may also support asymmetric segmentation for PU sizes of 2NxnU, 2NxnD, nLx2N, and nRx2N for inter-prediction.

[0134] In examples where the mode selector does not further segment the CU into PUs, each CU may be associated with a luminance coding block and corresponding chrominance coding blocks. As described above, the size of the CU may mean the size of the luminance coding block of the CU. Video encoder 200 and video decoder 300 may support CU sizes of 2Nx2N, 2NxN, or Nx2N.

[0135] For other video coding technologies such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding, as a few examples, the mode selection module 202, through the respective modules associated with the technologies encoding, generates a predictive block for the current block being encoded. In some examples, such as paletted mode encoding, mode selector 202 may not generate a predictive block and instead generate syntax elements that indicate the manner in which the block should be reconstructed based on the selected palette. In such modes, mode selector 202 may provide these syntax elements to entropy encoding module 220 for encoding.

[0136] As described above, the residue generator 204 receives video data for the current block and the corresponding predictive block. The residual block 204 then generates a residual block for the current block. To generate a residual block, the residual block 204 calculates successive sample differences between the predictive block and the current block.

[0137] The transform processing module 206 applies one or more transforms to the residual block to generate a transform coefficient block (referred to herein as a "transform coefficient block"). Transform processing module 206 may apply various transforms to the residual block to generate a block of transform coefficients. For example, transform processing module 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve (KLT) transform, or a conceptually similar transform to the residual block. In some examples, the transform processing module 206 may perform multiple transforms on the residual block, such as a primary transform and a secondary transform such as a rotational transform. In some examples, transform processing module 206 does not apply transforms to the residual block.

[0138] Quantization unit 208 may quantize the transform coefficients in the transform coefficient block to generate a block of quantized transform coefficients. Quantization module 208 may quantize the transform coefficients of a block of transform coefficients according to a quantization parameter (QP) value associated with the current block. Video encoder 200 (eg, via mode selector 202) may adjust the amount of quantization applied to coefficient blocks associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce loss of information, and because of this, the quantized transform coefficients may have less accuracy than the original transform coefficients generated by the transform processing unit 206 .

[0139] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transforms to the block of quantized transform coefficients, respectively, in order to recover the residual block from the block of transform coefficients. Restoration module 214 may generate a reconstructed block corresponding to the current block (albeit potentially with a certain degree of distortion) based on the reconstructed residual block and the predictive block generated by mode selector 202 . For example, reconstruction module 214 may sum the samples of the reconstructed residual block with corresponding samples from the prediction block generated by mode selection module 202 to form a reconstructed block.

[0140] The filtering module 216 may perform one or more filtering operations on the recovered blocks. For example, filter module 216 may perform deblocking operations to reduce deblocking artifacts along the edges of a CU. The operations of filter module 216 may be omitted in some examples.

[0141] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in examples in which the operations of the filter module 216 are performed, the recovery module 214 may store the reconstructed blocks in the DPB 218. In the examples in which the operations of the filter module 216 are performed, the filter module 216 may store filtered reconstructed blocks in DPB 218. Motion estimator 222 and motion compensation module 224 may extract a reference frame from DPB 218 formed from reconstructed (and potentially filtered) blocks in order to mutually predict blocks of subsequent encoded frames. In addition, the intra prediction module 226 may use the recovered blocks in the DPB 218 of the current frame to intra predict other blocks in the current frame.

[0142] In general, entropy encoding module 220 may entropy encode syntax elements received from other functional components of video encoder 200, including the syntax elements described above for coefficient encoding. For example, entropy encoding module 220 may entropy encode blocks of quantized transform coefficients from quantization module 208 . As another example, entropy encoding unit 220 may entropy encode prediction syntax elements (eg, inter-prediction motion information or intra-prediction intra mode information) from mode selection unit 202 . Entropy encoding module 220 may perform one or more entropy encoding operations on syntax elements that are another example of video data to generate entropy encoded data. For example, entropy encoding unit 220 may perform a context adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable length variable (V2V) coding operation, a syntactic context adaptive binary arithmetic coding (SBAC) operation, an entropy coding operation based on segmentation into probability intervals (PIPE), an exponential Golomb encoding operation, or another type of entropy encoding operation for the data. In some examples, entropy encoding module 220 may operate in a bypass mode in which syntax elements are not entropy encoded.

[0143] Video encoder 200 may output a bit stream that includes entropy encoded syntax elements required in order to reconstruct slice or frame blocks. In particular, entropy encoding unit 220 may output a bitstream.

[0144] The operations described above are described with respect to a block. Such description is to be understood as operations for the luminance coding block and/or chrominance coding blocks. As described above, in some examples, the luminance coding block and the chrominance coding blocks are luminance signal and chrominance signal components of the CU. In some examples, the luminance coder and the chrominance coders are luma and chroma components of the PU.

[0145] In some examples, operations performed on a luminance coding block need not be repeated for chrominance coding blocks. As one example, operations for identifying a motion vector (MV) and a reference frame for a luminance coding block need not be repeated for identifying a MV and a reference frame for chrominance blocks. Conversely, the MV for the luminance coding block may be scaled to determine the MV for the chrominance blocks, and the reference frame may be identical. As another example, the intra prediction process may be identical for luma coders and chrominance coders.

[0146] Video encoder 200 is an example of an apparatus configured to encode video data, including a memory configured to store video data and one or more processing modules implemented in a circuit and configured to encode coefficients as described in this disclosure.

[0147] FIG. 10 is a block diagram illustrating an exemplary video decoder 300 that may perform the techniques of this disclosure. Fig. 10 is provided for purposes of explanation and is not intended to be a limitation of the technologies illustrated and outlined in this disclosure. For purposes of explanation, this disclosure describes a video decoder 300 described in terms of JEM and HEVC technologies. However, the techniques of this disclosure may be performed by video coding devices that are configured for other video coding standards.

[0148] In the example of FIG. 10, the video decoder 300 includes a coded frame buffer (CPB) 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filtering unit 312, and a decoded frame buffer 314. (DPB). The prediction processing module 304 includes a motion compensation module 316 and an intra prediction module 318 . The prediction processing unit 304 may include summing units to perform prediction in accordance with other prediction modes. As an example, the prediction processing module 304 may include a palette processing module, an intra-block copy module (which may be part of the motion compensation module 316), an affine processing module, a linear model (LM) processing module, and the like. In other examples, video decoder 300 may include more, fewer, or other functional components.

[0149] The CPB storage device 320 may store video data, such as an encoded video bit stream to be decoded by the components of the video decoder 300. The video data stored in the CPB storage device 320 may be obtained, for example, from a computer-readable medium 110 (FIG. 1) . CPB storage 320 may include a CPB that stores encoded video data (eg, syntax elements) from an encoded video bitstream. In addition, the CPB memory 320 may store video data other than the syntax elements of the encoded frame, such as temporal data representing outputs from various modules of the video decoder 300. The DPB 314 generally stores decoded frames that the video decoder 300 may output and/or be used as reference video data when decoding subsequent data or frames of the encoded video bitstream. The CPB memory 320 and DPB 314 may be formed by any of a variety of memories, such as dynamic random access memory (DRAM) including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of storage devices. The CPB storage device 320 and DPB 314 may be provided via an identical storage device or separate storage devices. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300 or off-chip with respect to these components.

[0150] Additionally or alternatively, in some examples, video decoder 300 may retrieve encoded video data from memory 120 (FIG. 1). Thus, memory 120 may store data as discussed above for CPB memory 320. Similarly, memory 120 may store instructions to be executed by video decoder 300 when some or all of the functionality of video decoder 300 is implemented in software for execution by video decoder processing circuitry 300.

[0151] The various modules shown in FIG. 10 are illustrated to assist in understanding the operations performed by video decoder 300. The modules may be implemented as fixed function circuits, programmable circuits, or a combination of the above. Similarly to FIG. 9, fixed functional circuits means circuits that provide specific functionality and are predetermined with respect to operations that can be performed. Programmable circuits means circuits that can be programmed to perform various tasks and provide flexible functionality in operations that can be performed. For example, the programmable circuits may execute software or firmware that causes the programmable circuits to operate in a manner specified by the software or firmware instructions. Fixed function circuits can execute program instructions (eg, to receive parameters or output parameters), but the types of operations that fixed function circuits perform are generally immutable. In some examples, one or more modules may be various circuit blocks (fixed function or programmable), and in some examples, one or more modules may be integrated circuits.

[0152] Video decoder 300 may include ALUs, EFUs, digital circuits, analog circuits, and/or programmable cores formed from programmable circuits. In instances where operations of video decoder 300 are performed by software executing on programmable circuits, on-chip or off-chip memory may store instructions (e.g., object code) of the software that video decoder 300 receives and executes.

[0153] The entropy decoding module 302 may receive the encoded video data from the CPB and entropy decode the video data in order to reproduce syntax elements including the syntax elements described above for coefficient coding. Prediction processing module 304, inverse quantization module 306, inverse transform processing module 308, reconstruction module 310, and filter module 312 may generate decoded video data based on syntax elements extracted from the bit stream.

[0154] In general, video decoder 300 reconstructs a frame on a block-by-block basis. Video decoder 300 may perform the recovery operation for each block separately (and the block currently being recovered, ie, being decoded, may be referred to as the "current block").

[0155] Entropy decoding module 302 can entropy decode syntax elements specifying quantized transform coefficients of a block of quantized transform coefficients, as well as transform information such as a quantization parameter (QP) and/or transform mode indicator(s). Inverse quantization module 306 may use the QP associated with the block of quantized transform coefficients to determine the degree of quantization, and likewise, the degree of inverse quantization for inverse quantization module 306 to be applied. Inverse quantizer 306, for example, may perform a bitwise left shift operation to inversely quantize the quantized transform coefficients. The inverse quantizer 306 can therefore generate a transform coefficient block including the transform coefficients.

[0156] After inverse quantizer 306 generates a transform coefficient block, inverse transform processing module 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, inverse transform processing module 308 may apply an inverse DCT, inverse integer transform, inverse Karhunen-Loeve (KLT), inverse rotational, inverse directional transform, or other inverse transform to the coefficient block.

[0157] In addition, the prediction processing unit 304 generates a prediction block according to syntax elements with prediction information that are entropy decoded by the entropy decoding unit 302 . For example, if the syntax elements with the prediction information indicate that the current block is inter-predicted, the motion compensation module 316 may generate a prediction block. In this case, the syntax elements with prediction information may indicate a reference frame in DPB 314 from which the reference block can be extracted, as well as a motion vector identifying the location of the reference block in the reference frame relative to the location of the current block in the current frame. The motion compensation module 316 can generally perform the inter-prediction process in a manner that is substantially similar to that described with respect to the motion compensation module 224 (FIG. 9).

[0158] As another example, if the prediction information syntax elements indicate that the current block is intra-predicted, the intra prediction module 318 may generate a prediction block according to the intra prediction mode indicated by the prediction information syntax elements. On the other hand, the intra prediction module 318 can generally perform the intra prediction process in a manner that is substantially similar to that described with respect to the intra prediction module 226 (FIG. 9). Intra prediction module 318 may extract adjacent sample data with respect to the current block from DPB 314.

[0159] Recovery module 310 may recover the current block using a predictive block and a residual block. For example, recovery module 310 may sum the residual block samples with the corresponding prediction block samples to recover the current block.

[0160] Filtering module 312 may perform one or more filtering operations on the recovered blocks. For example, filter module 312 may perform deblocking operations to reduce deblocking artifacts along the edges of the reconstructed blocks. The operations of filter module 312 are not necessarily performed in all examples.

[0161] Video decoder 300 may store the reconstructed blocks in DPB 314. As explained above, DPB 314 may provide reference information, such as samples of the current frame for intra prediction and previously decoded frames for subsequent motion compensation, to prediction processing unit 304. In addition, video decoder 300 may output decoded frames from the DPB for subsequent presentation on a display device, such as display device 118 of FIG. 1.

[0162] Thus, video decoder 300 is an example of a video decoding apparatus including a memory configured to store video data and one or more processing modules implemented in a circuit and configured to decode coefficients as described in this disclosure.

[0163] FIG. 11A and 11B show examples of the CABAC process in permission element n. In example 400 of FIG. 11A, in bin n, the range in bin 2 includes RangeMPS and RangeLPS specified by least probable symbol probability (LPS) (p _σ ) given a certain context state (σ). Example 400 shows a range update in permission element n+1 when the value of permission element n is equal to the most likely symbol (MPS). In this example, the low level remains identical, but the range value in bin n+1 is reduced to the RangeMPS value in bin n. Example 402 of FIG. 11B shows a range update in bin n+1 when the value of bin n is not equal to MPS (ie equal to LPS). In this example, the low level moves to the lower value of the RangeLPS range in bin n. In addition, the range value in bin n+1 is reduced to the value of RangeLPS in bin n.

[0164] In one example of a HEVC video encoding process, a range is expressed with 9 bits and a low level with 10 bits. A renormalization process is provided to maintain range and low values with sufficient accuracy. Renormalization occurs every time the range is less than 256. Therefore, the range is always equal to or greater than 256 after renormalization. Depending on the range and low values, the binary arithmetic encoder (BAC) outputs 0 or 1 bits to the bitstream, or updates an internal variable (called "BO: with bits pending") to support future outputs. Fig. 12 shows examples of BAC output depending on the range. For example, 1 is output to the bitstream when the range and low are above a certain threshold (eg, 512). 0 is output to the bitstream when range and low are below a certain threshold (eg, 512). Nothing is output to the bitstream when range and low are between certain thresholds. Instead, the BO-value may increment and the next bin is encoded.

[0165] In the H.264/AVC CABAC context model, and in some HEVC examples, there are 128 states. There are 64 possible LPS probabilities (denoted by the state σ) that can range from 0 to 63. Each MPS can be zero or one. In this regard, 128 states represent 64 state probabilities multiplied by 2 possible values for MPS (0 or 1). Therefore, the state can be indexed with 7 bits.

[0166] In order to reduce the amount of computation for extracting LPS ranges (rangeLPS _σ ), results for all cases may be precomputed and stored as approximations in a lookup table. Therefore, the LPS range can be obtained without multiplication at all by using a simple table lookup. The elimination of multiplication may be important for some devices or applications because this operation can cause significant latency in many hardware architectures.

[0167] A 4-column precomputed LPS range table may be used instead of multiplication. The range is divided into four segments. The segment index can be retrieved by asking (range>>6)&3. In fact, the segment index is extracted by shifting and discarding bits from the actual range. The following table 1 shows the possible ranges and their respective indices.

Table 1. Index of ranges

Range 256-319 320-383 384-447 448-511 (range>>6) & 3 0 1 2 3

[0168] The LPS range table then has 64 entries (one for each probability state) multiplied by 4 (one for each range index). Each entry is an LPS of a range, i.e. the value of multiplying the range by the LPS-probability. An example of a portion of this table is shown in the following table 2. Table 2 illustrates probabilistic states 9-12. In one HEVC proposal, the probability states can range from 0-63.

Table 2. RangeLPS

Probabilistic state (σ) RangeLPS Index 0 Index 1 Index 2 Index 3 ... ... ... ... ... 9 90 110 130 150 10 85 104 123 142 eleven 81 99 117 135 12 77 94 111 128 ... ... ... ... ...

[0169] In each segment (ie, at each range value), the LPS range of each probability state σ is predetermined. In other words, the LPS range of the probability state σ is quantized into four values (ie, one value for each range index). The specific LPS range used at a given point depends on which segment the range belongs to. The number of possible LPS ranges used in the table is a compromise between the number of columns in the table (ie, the number of possible LPS range values) and the accuracy of the LPS range. Generally speaking, more columns result in less quantization errors for the LPS range values, but also increase the need for more storage space in order to store the table. Fewer columns increase quantization errors, but also reduce the amount of storage required to store the table.

[0170] As described above, each LPS probability state has a corresponding probability. The probability p for each state is extracted as follows:

p _σ =α*p _{σ -1} ,

where state σ is between 0 and 63. The constant α represents the amount of change in probability between each context state. In one example, α=0.9493, or more specifically, α=(0.01875/0.5) ^1/63 . The probability in the state σ=0 is 0.5 (i.e. p ₀ =1/2). Thus, in context state 0, LPS and MPS are equally likely. The probability in each successive state is obtained by multiplying the previous state by α. In this regard, the probability of occurrence of LPS in the context state α=1 is p ₀ *0.9493 (0.5*0.9493=0.47465). In this regard, as the state index α increases, the probability of occurrence of LPS decreases.

[0171] CABAC is adaptive because the probabilistic states are updated in such a way that they correspond to the statistics on the signals (i.e., the values of previously encoded bins). The update process is as follows. For a given probability state, the update depends on the state index and the value of the encoded symbol identified as LPS or as MPS. As a result of the update process, a new probability state is retrieved, which consists of a potentially modified LPS probability estimate and, if necessary, a modified MPS value.

[0172] In the case of a bin value equal to MPS, this state index may increment by 1. This is relevant for all states except when MPS occurs at state index 62, at which the LPS probability is already at a minimum (or equivalently, the maximum MPS-probability is reached). In this case, the state index 62 remains fixed until the LPS is observed or the last bin value is encoded (state 63 is used for the special case of the last bin value). When LPS occurs, the state index is changed by gradually decreasing the state index by a certain amount, as shown in the equation below. This rule generally applies to every occurrence of LPS with the following exception. Provided that the LPS is encoded in the state with index σ=0, which corresponds to the equiprobable case, the state index remains fixed, but the MPS value must be switched such that the value of LPS and MPS must be swapped. In all other cases, no matter which character is encoded, the MPS value must not change. Extraction of transition rules for an LPS probability is based on the following relationship between a given LPS probability p _old and its updated counterpart p _new :

p _new =max(α p _old , p ₆₂ ) if MPS occurs

p _new =(1-α)+α p _old if LPS occurs

[0173] Regarding the practical implementation of the probability estimation process in CABAC, it is important to note that all transition rules can be implemented by at most two tables having 63 entries of unsigned 6-bit integer values. In some examples, state transitions may be defined using a single TransIdxLPS table that defines, for a given state index σ, a new updated state index TransIdxLPS[σ] in case LPS is observed. MPS-conditioned transitions can be obtained by simply (saturated) incrementing the state index by a fixed value of 1, resulting in an updated state index min(σ+1, 62). Table 3 below is an example of a partial TransIdxLPS table.

Table 3. TransIdxLPS

Probabilistic state (σ) New state TransIdxLPS[σ] ... ... 9 6 10 8 eleven 8 12 8 ... ...

[0174] The techniques described above with respect to FIG. 11A, 11B and 12 represent just one exemplary implementation of CABAC. It should be understood that the techniques of this disclosure are not limited to this described implementation of CABAC. For example, in legacy BAC approaches (such as the BAC approach used in H.264/AVC), the RangeLPS and TransIdxLPS tables are configured for low resolution video (i.e. common intermediate format (CIF) video and quarter -CIF format (QCIF)). In HEVC and future codecs such as VVC, a large amount of video content is high definition (HD) and in some cases more than HD. Video content that is HD or higher than HD resolution tends to have different statistics than the 10 year QCIF sequences used to develop H.264/AVC. As such, the H.264/AVC RangeLPS and TransIdxLPS tables may cause inter-state adaptation in a way that is too fast. Thus, transitions between probabilistic states, in particular when LPS occurs, may be too large for smoother, higher resolution HD video content. Thus, the probabilistic models used by conventional technologies may not be as accurate for HD and ultra HD content. In addition, because HD video content includes a larger range of pixel values, the H.264/AVC tables do not include enough entries to account for the more extreme values that may be present in HD content.

[0175] In this regard, for HEVC and for future coding standards such as VVC, the RangeLPS and TransIdxLPS tables can be modified to take into account the characteristics of this new content. In particular, BAC processes for HEVC and future coding standards may use tables that allow for a slower adaptation process and may take into account more extreme cases (ie, skew probabilities). Thus, as one example, the RangeLPS and TransIdxLPS tables can be modified to achieve these goals by including more probability states and ranges than are used in BAC for H.264/AVC or HEVC.

[0176] FIG. 13 is a block diagram of an exemplary entropy encoding module 220 that may be configured to perform CABAC in accordance with the techniques of this disclosure. The syntax element 418 is entered into the module 220 entropy encoding. If the syntax element is already a binary syntax element (ie, a syntax element that only has the value zero and one), the binarization step may be skipped. If the syntax element is a non-binary syntax element (eg, a syntax element represented by multiple bits, eg, transform coefficient levels), the non-binary syntax element is binarized by binarization module 420 . The binarizer 420 converts the non-binary syntax element into a sequence of binary solutions. These binary solutions are often referred to as "permission elements". For example, for transform coefficient levels, the level value may be partitioned into successive bins, with each bin indicating whether or not the absolute value of the coefficient level exceeds a certain value. For example, resolution element 0 (sometimes called a "significance flag") indicates whether the absolute value of the transform coefficients level is greater than 0 or not. Permission element 1 indicates whether the absolute value of the transform coefficient level 1 is greater or not, etc. A unique transform may be developed for each non-binary syntax element.

[0177] Each bin generated by the binarizer 420 is supplied to the binary arithmetic coding side of the entropy coding unit 220 . Thus, for a predefined set of non-binary syntax elements, each permission element type (eg, permission element 0) is encoded before the type of the next permission element (eg, permission element 1). Encoding can be performed in regular mode or in bypass mode. In bypass mode, bypass coding engine 426 performs arithmetic encoding using a fixed probability model, such as using Golomb-Rice or exponential Golomb encoding. Bypass mode is generally used for more predictable syntax elements.

[0178] Regular mode coding involves executing CABAC. CABAC in regular mode serves to encode bin values such that the probability of a bin value is predictable given the values of previously encoded bins. The probability of equality LPS bin is determined by module 422 context modeling. The context modeling module 422 outputs a bin value and a context model (eg, probability state σ). The context model may be an initial context model for a sequence of permission elements, or may be determined based on encoded values of previously encoded permission elements. As described above, the context modeling module may update the state based on whether it is a previously encoded MPS or LPS bin.

[0179] After the context model and the probability state σ are determined by the context modeling module 422, the regular encoding engine 424 performs BAC on the bin value. According to the techniques of this disclosure, regular encoding engine 424 performs BAC using TransIdxLPS table 430, which includes more than 64 probability states σ. In one example, the number of probability states is 128. TransIdxLPS is used to determine which probability state is used for the next bin (bin n+1) when the previous bin (bin n) is an LPS. Regular encoding engine 424 may also use RangeLPS table 128 to determine the range value for LPS given a particular probability state σ. However, according to the techniques of this disclosure, instead of using all possible probability states σ of the TransIdxLPS table 430, the probability state indices σ are converted into grouped indices for use in the RangeLPS table. Thus, each index in RangeLPS table 428 may represent two or more of the total number of probability states. The transformation of the probability state index σ to grouped indices may be linear (eg, by dividing by two) or may be non-linear (eg, as a logarithmic function or a lookup table).

[0180] In other examples of the disclosure, the difference between successive probabilistic states can be made smaller by setting the parameter α such that it is greater than 0.9493. In one example, α=0.9689. In another disclosure example, the highest probability (p ₀ ) of the occurrence of LPS may be set below 0.5. In one example, p ₀ may be equal to 0.493.

[0181] In accordance with one or more of the techniques of this disclosure, as opposed to using the same value of the variable used to update the probability state in the binary arithmetic encoding process (e.g., one or more of the weighted coding window size, coefficient (α ) scaling and probability update rate), entropy encoding module 220 may use different variable values for different context models and/or different syntax elements. For example, entropy encoding module 220 may determine, for a context model from a plurality of context models, the value of a variable used to update the probability state in the binary arithmetic encoding process, and update the probability state based on the determined value.

[0182] FIG. 14 is a block diagram of an exemplary entropy decoding module 302 that may be configured to perform CABAC in accordance with the techniques of this disclosure. The entropy decoding module 302 of FIG. 14 performs CABAC in a reverse manner to the method for entropy encoding unit 220 described in FIG. 13. The encoded bits from the bit stream 448 are input to the entropy decoding module 302 . The coded bits are provided to the context modeling module 450 or to the bypass decoding engine 452 based on whether the coded bits are entropy encoded using the bypass mode or the regular mode. If the encoded bits are bypass encoded, the bypass decoding engine 452, for example, may use Golomb-Rice or Exponential Golomb decoding to extract binary syntax elements or non-binary syntax element enablers.

[0183] If the encoded bits are encoded in a regular mode, the context modeling module 450 may determine a probability model for the encoded bits, and the regular decoding engine 454 may decode the encoded bits in order to generate non-binary syntax elements (or directly syntax elements if binary ). After the context model and probability state σ are determined by the context modeling module 450, the regular decoding engine 454 performs a BAC on the bin value. According to the techniques of this disclosure, the regular decoding engine 454 performs BAC using a TransIdxLPS table 458 that includes more than 64 probability states σ. In one example, the number of probability states is 128, although other numbers of probability states may be specified in accordance with the techniques of this disclosure. The TransIdxLPS table 458 is used to determine which probability state is used for the next bin (bin n+1) when the previous bin (bin n) is an LPS. Regular decoding engine 454 may also use RangeLPS table 456 to determine a range value for LPS given a particular probability state σ. However, according to the techniques of this disclosure, instead of using all possible probability states σ of the TransIdxLPS table 458, the probability state indices σ are converted into grouped indices for use in the RangeLPS table 456. Thus, each index in RangeLPS table 456 may represent two or more of the total number of probability states. The transformation of the probability state index σ to grouped indices may be linear (eg, by dividing by two) or may be non-linear (eg, as a logarithmic function or a lookup table).

[0184] In other examples of the disclosure, the difference between successive probabilistic states can be made smaller by setting the parameter α such that it is greater than 0.9493. In one example, α=0.9689. In another disclosure example, the highest probability (p ₀ ) of the occurrence of LPS may be set below 0.5. In one example, p ₀ may be equal to 0.493.

[0185] After the bins are decoded by the regular decoding engine 454, the debinarization module 460 may perform a debinarization to convert the bins back to non-binary syntax element values.

[0186] FIG. 15 is a flowchart illustrating exemplary operation of a video encoder for encoding a current block of video data. The current block may include the current CU. While described with respect to video encoder 200 (FIGS. 1 and 9), it should be understood that other devices may be configured to perform similar operation to that of FIGS. 15.

[0187] In this example, video encoder 200 initially predicts the current block (550). For example, video encoder 200 may generate a prediction block for the current block. Video encoder 200 may then calculate a residual block for the current block (552). To calculate the residual block, video encoder 200 may calculate the difference between the original, uncoded block and the prediction block for the current block. Video encoder 200 may then transform and quantize the coefficients of the residual block (554). Video encoder 200 may then scan the quantized transform coefficients of the residual block (556). During or after scanning, video encoder 200 may entropy encode the coefficients (558). For example, video encoder 200 may encode the coefficients using CAVLC or CABAC. Video encoder 200 may then output entropy encoded block data (560).

[0188] FIG. 16 is a flowchart illustrating an exemplary operation of a video decoder for decoding a current block of video data. The current block may include the current CU. While described with respect to video decoder 300 (FIGS. 1 and 3), it should be understood that other devices may be configured to perform similar operation to that of FIGS. 16.

[0189] Video decoder 300 may receive entropy coded data for the current block, eg, entropy coded prediction information and entropy coded data for residual block coefficients corresponding to the current block (570). Video decoder 300 may entropy decode the entropy encoded data to determine prediction information for the current block and reproduce residual block coefficients (572). Video decoder 300 may predict the current block (574), for example, using an intra- or inter-prediction mode as indicated by the prediction information for the current block to compute a prediction block for the current block. Video decoder 300 may then backscan the reproduced coefficients (576) to create a block of quantized transform coefficients. Video decoder 300 may then inversely quantize and inversely transform the coefficients to form a residual block (578). Video decoder 300 may eventually decode the current block by combining the prediction block and the residual block (580).

[0190] FIG. 17 is a flowchart illustrating exemplary operation of a video decoder for decoding coefficient values. While described with respect to video decoder 300 (FIGS. 1 and 10), it should be understood that other devices may be configured to perform similar operation to that of FIGS. 17.

[0191] Video decoder 300 determines a threshold number of regularly encoded bins for the first decoding pass (602).

[0192] For the first set of coefficients, video decoder 300 contextually decodes the syntax elements of the coefficient group until a threshold number of regular-coded bins is reached (604). Context-decoded syntax element enablers, for example, may include one or more significance flags, one or more parity level flags, and one or more first flags, as described above. Each of the one or more significance flags may indicate whether or not the absolute level for the coefficient is zero, and each of the one or more parity level flags may indicate whether the coefficient has an absolute level that is even or odd. Each of the one or more first flags may indicate whether or not the coefficient has an absolute level that is greater than 2.

[0193] To contextually decode the coefficient group syntax elements, video decoder 300 may perform context-adaptive binary arithmetic decoding to decode the coefficient group syntax elements. In other examples, to contextually decode the syntax elements of a coefficient group until a threshold number of regularly-coded bins is reached, video decoder 300 may determine that a threshold number of regularly-coded bins is reached when encoding a syntax element for a coefficient from the first set coefficients, and contextually decode one or more remaining syntax elements for the coefficient from the first coefficient set.

[0194] Video decoder 300 determines values for the first set of transform unit coefficients based on the context decoded bins of the syntax elements (606). In response to reaching a threshold number of regular-coded bins for the second set of coefficients, video decoder 300 performs bypass decoding of additional syntax elements (608). To perform bypass decoding of additional syntax elements, video decoder 300, for a coefficient from the second coefficient set, may extract a value for the Rice parameter.

[0195] Video decoder 300 determines values for the second set of transform unit coefficients based on additional syntax elements (610). To determine values for the second set of transform unit coefficients based on additional syntax elements, video decoder 300 determines a value for the null parameter based on the Rice parameter (612). To determine the value for the null parameter based on the Rice parameter, video decoder 300, for example, may determine the value for the null parameter based on the Rice parameter and also based on the current state of the state machine. As described above, the value for the null parameter identifies the encoded value that corresponds to the coefficient level zero. Video decoder 300, for example, may determine a value for the Rice parameter from a lookup table or in some other manner.

[0196] To determine values for the second set of transform unit coefficients based on additional syntax elements, video decoder 300 also receives a first coded value for the first coefficient from the second coefficient set (614) and, based on the value for the null parameter and the first coded value for the first coefficient , determines the level for the first coefficient (616). The level for the first coefficient, for example, may be the remaining level or the absolute level.

[0197] In response to the fact that the value for the zero parameter is equal to the first encoded value, video decoder 300 may determine that the level for the first coefficient is zero. In response to the first encoded value being greater than the value for parameter zero, video decoder 300 may determine that the level for the first coefficient is equal to the first encoded value. In other cases, in response to the first coded value being less than the value for parameter zero, video decoder 300 may determine that the level for the first coefficient is equal to the first coded value plus one.

[0198] Video decoder 300 may also determine a decoded transform block based on values for the first coefficient set and values for the second coefficient set; add the decoded transform block to the prediction block to determine a reconstructed block; perform one or more filtering operations on the reconstructed block to determine a decoded block of video data; and output a decoded frame of video data that includes the decoded block of video data.

[0199] It should be recognized that, depending on the example, certain steps or events of any of the technologies described herein may be performed in a different sequence, may be added, combined, or excluded altogether (for example, not all of the described steps or events are required for practical implementation of technologies). In addition, in certain examples, steps or events may be executed simultaneously, such as through multithreading, interrupt handling, or across multiple processors, rather than sequentially.

[0200] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination of the foregoing. When implemented in software, the functions may be stored or transmitted, as one or more instructions or code, on a computer-readable medium and executed by a hardware processing unit. Computer-readable media may include computer-readable storage media that corresponds to a tangible medium, such as storage media, or communication media, including any medium that facilitates transfer of a computer program from one place to another, such as according to a communication protocol. Thus, computer-readable media can generally correspond to (1) a tangible computer-readable storage medium that is non-volatile, or (2) a communication medium such as a signal or carrier. Storage media can be any available media that can be accessed by one or more computers or one or more processors in order to retrieve instructions, code, and/or data structures for implementing the technologies described in this disclosure. The computer program product may include a computer readable medium.

[0201] By way of example, and not limitation, these computer-readable storage media may include one or more of RAM, ROM, EEPROM, CD-ROM, or other optical disk storage device, magnetic disk storage device, or other magnetic data storage devices, flash memory, or any other medium that can be used to store the required program code in the form of instructions or data structures and that can be accessed by a computer. In addition, any connection is properly referred to as a computer-readable medium. For example, if instructions are transmitted from a Web site, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave media, then coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave media are included in the definition of media. However, it should be understood that computer-readable storage media and storage media do not include connections, carriers, signals, or other volatile media, but are instead directed to non-volatile tangible storage media. A disc as used herein includes a compact disc (CD), a laser disc, an optical disc, a digital versatile disc (DVD), a floppy disc, and a Blu-ray disc, wherein the discs typically reproduce data magnetically, and the discs typically reproduce data optically using lasers. Combinations of the above should also be included in computer readable media.

[0202] Instructions may be executed by one or more processors, such as one or more general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuits. Accordingly, the term "processor" as used herein can mean any of the above structures, or another structure suitable for implementing the technologies described herein. In addition, in some aspects, the functionality described herein may be provided within specialized hardware and/or software modules capable of encoding or decoding or embedded in a combined codec. In addition, technologies may be fully implemented in one or more circuits or logic elements.

[0203] The techniques of this disclosure may be implemented in a wide variety of devices or equipment, including a wireless handset, an integrated circuit (IC), or an IC stack (eg, a chipset). Various components, modules, or blocks are described in this disclosure in order to emphasize the functional aspects of devices capable of implementing the disclosed technologies, but do not necessarily require implementation by different hardware modules. Conversely, as described above, various modules may be combined into a codec hardware module or provided through a set of cooperating hardware modules including one or more processors as described above in combination with appropriate software and/or firmware.

[0204] Various examples have been described above. These and other examples are within the scope of the appended claims.

Claims (90)

1. A method for decoding video data, comprising the steps of: determining a threshold number of regularly-encoded bins for the first decoding pass; for the first set of coefficients, perform context decoding of the syntax element bins of the coefficient group until a threshold number of regularly encoded bins is reached, wherein the context decoded bins of the syntax elements contain one or more significance flags, one or more flags a parity level and one or more first flags, each of the one or more significance flags indicating whether the absolute level for the corresponding coefficient is zero, each of the one or more parity level flags indicating whether the absolute level for the corresponding coefficient is even or odd , and each of the one or more first flags indicates whether the absolute level for the corresponding factor is greater than two; determining values for a first set of transform unit coefficients based on the context-decoded bins of the syntax elements; in response to reaching a threshold number of regular-coded bins, for the second set of coefficients, bypass decoding the additional syntax elements, wherein the bypass decoding of the additional syntax elements comprises, for a coefficient from the second coefficient set, deriving a value for a Rice parameter; And determining values for a second set of transformation unit coefficients based on the additional syntax elements, wherein determining values for the second set of transformation unit coefficients based on the additional syntax elements comprises the steps of: determining a value for the null parameter based on the Rice parameter, wherein the value for the null parameter identifies an encoded value that corresponds to a coefficient level of zero; receiving a first coded value for a first coefficient from a second set of coefficients; And based on the value for the null parameter and the first coded value for the first coefficient, a level for the first coefficient is determined. 2. The method of claim 1, wherein the level for the first coefficient comprises the remaining level. 3. The method of claim 1, wherein the level for the first coefficient comprises an absolute level. 4. The method of claim 1, wherein in said determining a value for the null parameter based on the Rice parameter, the value for the null parameter is determined based on the Rice parameter and based on the current state of the state machine. 5. The method of claim 1, further comprising: in response to the fact that the value for the null parameter is equal to the first encoded value, determining that the level for the first coefficient is equal to zero. 6. The method of claim 1, further comprising: in response to the first encoded value being greater than the value for the null parameter, determining that the level for the first coefficient is equal to the first encoded value. 7. The method of claim 1, further comprising: in response to the first coded value being less than the value for the null parameter, determining that the level for the first coefficient is equal to the first coded value plus one. 8. The method of claim 1, further comprising determining a value for the Rice parameter from the lookup table. 9. The method of claim 1, wherein the context decoding of the coefficient group syntax elements comprises performing context-adaptive binary arithmetic decoding to decode the coefficient group syntax elements. 10. The method of claim 1, wherein in-context decoding the coefficient group syntax elements until a threshold number of regular-coded bins is reached comprises: determining that a threshold number of regular-encoded bins has been reached when encoding a syntax element for a coefficient from the first coefficient set; performing context decoding of one or more remaining syntax elements for the coefficient from the first coefficient set. 11. The method of claim 1, further comprising the steps of: determining a decoded transform block based on values for the first set of coefficients and values for the second set of coefficients; adding the decoded transform block to the prediction block to determine the reconstructed block; performing one or more filtering operations on the reconstructed block to determine a decoded block of video data; And outputting a decoded frame of video data that includes the decoded block of video data. 12. A device for decoding video data, comprising: a storage device adapted to store video data; And one or more processors implemented in circuitry and configured to: - determine the threshold number of regularly-encoded bins for the first decoding pass; - for the first set of coefficients, perform context decoding of the syntax element bins of the coefficient group until a threshold number of regular-coded bins is reached, wherein the context-decoded bins of the syntax elements contain one or more significance flags, one or more parity level flags and one or more first flags, where each of the one or more significance flags indicates whether the absolute level for the corresponding coefficient is zero, each of the one or more parity level flags indicates whether the absolute level for the corresponding coefficient is even or odd, and each of the one or more first flags indicates whether the absolute level for the corresponding factor is greater than two; - to determine the values for the first set of coefficients of the transformation unit based on the context-decoded resolution elements of the syntax elements; - in response to reaching the threshold number of regularly-coded bins, for the second set of coefficients, perform bypass decoding of additional syntax elements, while to perform bypass decoding of additional syntax elements, one or more processors are configured to receive, for a coefficient from the second set of coefficients, value for the Rice parameter; And - to determine values for the second set of transformation unit coefficients based on additional syntax elements, wherein in order to determine values for the second set of transformation unit coefficients based on additional syntax elements, one or more processors are configured to: determine a value for the null parameter based on the Rice parameter, wherein the value for the null parameter identifies an encoded value that corresponds to a coefficient level of zero; receive a first encoded value for a first coefficient from the second coefficient set; based on the value for the null parameter and the first coded value for the first coefficient, determine the level for the first coefficient. 13. The apparatus of claim 12, wherein the level for the first coefficient contains the remaining level. 14. The apparatus of claim 12, wherein the level for the first coefficient contains the absolute level. 15. The apparatus of claim 12, wherein in order to determine a value for the null parameter based on the Rice parameter, one or more processors are configured to determine a value for the null parameter based on the Rice parameter and based on the current state of the state machine. 16. The apparatus of claim 12, wherein the one or more processors are further configured to: in response to a value for the null parameter being equal to the first encoded value, determine that the level for the first coefficient is equal to zero. 17. The apparatus of claim 12, wherein the one or more processors are further configured to: in response to the first coded value being greater than the value for the null parameter, determine that the level for the first coefficient is equal to the first coded value. 18. The apparatus of claim 12, wherein the one or more processors are further configured to: in response to the first coded value being less than the value for the zero parameter, determine that the level for the first coefficient is equal to the first coded value plus one. 19. The apparatus of claim 12, wherein the one or more processors are further configured to determine a value for the Rice parameter from a lookup table. 20. The apparatus of claim 12, wherein in order to context-decode the coefficient group syntax elements, one or more processors are configured to perform context-adaptive binary arithmetic decoding to decode the coefficient group syntax elements. 21. The apparatus of claim 12, wherein, in order to contextually decode the syntax elements of the coefficient group until a threshold number of regular-coded bins is reached, the one or more processors are configured to: determine that a threshold number of regular-encoded bins has been reached when encoding a syntax element for a coefficient of the first coefficient set; perform context decoding of one or more remaining syntax elements for the coefficient from the first coefficient set. 22. The apparatus of claim 12, wherein the one or more processors are further configured to: determine a decoded transform block based on values for the first set of coefficients and values for the second set of coefficients; sum the decoded transform block with the prediction block to determine the reconstructed block; perform one or more filtering operations on the reconstructed block to determine a decoded block of video data; And output a decoded frame of video data that includes the decoded block of video data. 23. The apparatus of claim 12, wherein the apparatus comprises a wireless communications apparatus further comprising a receiver configured to receive encoded video data. 24. The apparatus of claim 23, wherein the wireless communications apparatus comprises a handset, wherein the receiver is configured to demodulate, according to a wireless communications standard, a signal comprising encoded video data. 25. The apparatus of claim 12, further comprising a display configured to display the decoded video data. 26. The apparatus of claim 12, wherein the apparatus comprises one or more of a camera, a computer, a mobile device, a broadcast receiver, and a set-top box. 27. A computer-readable storage medium that stores instructions that, when executed by one or more processors, cause one or more processors to: determine a threshold number of regularly-encoded bins for the first decoding pass; for the first set of coefficients, perform context decoding of the syntax element bins of the coefficient group until a threshold number of regular-coded bins is reached, wherein the context-decoded bins of the syntax elements contain one or more significance flags, one or more flags a parity level and one or more first flags, each of the one or more significance flags indicating whether the absolute level for the corresponding coefficient is zero, each of the one or more parity level flags indicating whether the absolute level for the corresponding coefficient is even or odd , and each of the one or more first flags indicates whether the absolute level for the corresponding factor is greater than two; determine values for the first set of transformation unit coefficients based on the context-decoded bins of the syntax elements; in response to reaching a threshold number of regularly-encoded bins, for the second coefficient set, bypass decoding the additional syntax elements, wherein, to perform the bypass decoding of the additional syntax elements, the instructions cause one or more processors to obtain, for a coefficient from the second coefficient set, a value for Rice parameter; And determine values for the second set of transformation unit coefficients based on the additional syntax elements, wherein to determine values for the second set of transformation unit coefficients based on the additional syntax elements, the instructions cause one or more processors to: determine a value for the null parameter based on the Rice parameter, wherein the value for the null parameter identifies an encoded value that corresponds to a coefficient level of zero; receive a first encoded value for a first coefficient from the second coefficient set; based on the value for the null parameter and the first coded value for the first coefficient, determine the level for the first coefficient. 28. The computer-readable storage medium of claim 27, wherein the level for the first coefficient contains the remaining level. 29. The computer-readable storage medium of claim 27, wherein the level for the first coefficient contains the absolute level. 30. The computer-readable storage medium of claim 27, wherein in order to determine a value for the null parameter based on the Rice parameter, the instructions cause one or more processors to determine a value for the null parameter based on the Rice parameter and based on the current state of the state machine. 31. The computer-readable storage medium of claim 27, wherein the instructions further cause one or more processors: in response to a value for the null parameter being equal to the first encoded value, to determine that the level for the first coefficient is zero. 32. The computer-readable storage medium of claim 27, wherein the instructions further cause one or more processors: in response to the first encoded value being greater than the value for parameter zero, to determine that the level for the first coefficient is equal to the first encoded value. 33. The computer-readable storage medium of claim 27, wherein the instructions further cause one or more processors to: in response to the first coded value being less than the value for parameter zero, determine that the level for the first coefficient is equal to the first coded value plus one. 34. The computer-readable storage medium of claim 27, wherein the instructions further cause one or more processors to determine a value for the Rice parameter from a lookup table. 35. The computer-readable storage medium of claim 27, wherein in order to context-decode the coefficient group syntax elements, the instructions cause one or more processors to perform context-adaptive binary arithmetic decoding to decode the coefficient group syntax elements. 36. The machine-readable storage medium of claim 27, wherein, in order to contextually decode the coefficient group syntax elements until a threshold number of regular-coded bins is reached, the instructions cause one or more processors to: determine that a threshold number of regular-encoded bins has been reached when encoding a syntax element for a coefficient of the first coefficient set; perform context decoding of one or more remaining syntax elements for the coefficient from the first coefficient set. 37. The computer-readable storage medium of claim 27, wherein the instructions further cause the one or more processors to: determine a decoded transform block based on values for the first set of coefficients and values for the second set of coefficients; sum the decoded transform block with the prediction block to determine the reconstructed block; perform one or more filtering operations on the reconstructed block to determine a decoded block of video data; And output a decoded frame of video data that includes the decoded block of video data. 38. A device for decoding video data, comprising: means for determining a threshold number of regularly-encoded bins for the first decoding pass; means for context decoding, for the first set of coefficients, the syntax element bins of the coefficient group until a threshold number of regular-coded bins is reached, wherein the context-decoded bins of the syntax elements contain one or more significance flags, one or more parity flags and one or more first flags, wherein each of the one or more significance flags indicates whether the absolute level for the corresponding coefficient is zero, each of the one or more parity flags indicates whether the absolute level for the corresponding coefficient is even or odd, and each of the one or more first flags indicates whether the absolute level for the corresponding factor is greater than two; means for determining values for the first set of transformation unit coefficients based on the context decoded bins of the syntax elements; means for bypassing decoding additional syntax elements, for the second set of coefficients, in response to reaching a threshold number of regularly-coded bins, wherein the means for bypassing decoding additional syntax elements comprises means for obtaining, for a coefficient from the second coefficient set, a value for the Rice parameter ; And means for determining values for the second set of transformation unit coefficients based on the additional syntax elements, wherein the means for determining values for the second set of transformation unit coefficients based on the additional syntax elements comprises: means for determining a value for the null parameter based on the Rice parameter, wherein the value for the null parameter identifies an encoded value that corresponds to a coefficient level of zero; means for receiving a first encoded value for a first coefficient from a second set of coefficients; And means for determining a level for the first coefficient based on a value for the null parameter and a first encoded value for the first coefficient.

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