RU2775254C1 - Device for data encryption iteration of the “magma” algorithm according to gost r 34.12-2015 standard - Google Patents

Abstract

FIELD: cryptography.

SUBSTANCE: invention relates to means of cryptographic protection of information, namely to data encryption devices in accordance with the “Magma” algorithm according to GOST R 34.12-2015 standard, and can be used in trusted sensor systems for collecting, processing and transmitting digital data. The result is achieved by the fact that inverted calculations are implemented in the cryptographic information protection device for operations that make up the iteration of the cryptographic transformation. In this case, isomorphism is preserved between the transformations in the direct and inverted representation, while the correspondence of the input data in the direct and inverted representation, the correspondence of the output data and intermediate results in the direct and inverted representation is retained.

EFFECT: providing cryptographic data processing in accordance with the iteration of the “Magma” algorithm according to GOST R 34.12-2015 standard with their inverted representation.

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Description

The present invention relates to means of cryptographic information protection, namely to data encryption devices in accordance with the Magma algorithm according to GOST R 34.12-2015 [1], and can be used in trusted sensor systems for collecting, processing and transmitting digital data.

In the aggregate of the claimed features of the invention, the following terms are used:

inverted data representation - binary data representation in which data values presented in direct representation are bitwise inverted;

dangerous information - information, the disclosure of which can facilitate the task of cryptanalysis of the encryption device;

side channels - channels for transmitting information that are not provided as standard for transmitting information in a specific encryption device (for example, the transmission of information processed in the encryption device through electromagnetic oscillations resulting from the operation of computer technology);

iteration key - the value used in the encryption iteration as the encryption key;

iterative function - a set of elementary transformations, encrypted data at one iteration of the cryptographic transformation.

It is known from the prior art that in the development of cryptographic information protection devices, in addition to the implementation of various functional requirements, it is necessary to provide protection against the possible removal of open and dangerous information through the channels of spurious electromagnetic radiation and interference (hereinafter referred to as spurious channels) [2].

It is known that it is possible to counteract the removal of dangerous information through side channels by creating an optimal masking interference [3]. In this case, the optimal masking noise is created when processing data in an inverted representation [3]. During cryptographic data transformation in accordance with the Magma algorithm according to the GOST R 34.12-2015 standard, in order to create optimal masking interference, simultaneously with data conversion in a device with a direct representation, it is necessary to implement synchronous data processing in a device with an inverted representation.

Closest to the claimed invention is a data encryption iteration device described in RF patent No. 2498416 C1, IPC H04L 9/06, G09C 1/00, Data encryption device according to GOST 28147-89/ Appl. May 15, 2012; Published November 10, 2013 [4]. The technical result of the prototype is to increase the clock frequency of the data encryption device. The iteration device that implements the sequence of actions for each iteration of data encryption contains a summation block, a substitution block, a shift block, and an additional register. Given the use of an additional register, the maximum clock frequency in the data flow circuit is determined by the maximum delay in the summation block and in the substitution and shift blocks.

The disadvantage of the prototype is the inability to process data in the inverted representation, which does not allow the formation of optimal masking noise during cryptographic processing of data in the cryptographic information protection device.

The objective of the present invention is to provide cryptographic data processing at one iteration in accordance with the "Magma" algorithm according to the GOST R 34.12-2015 standard with their inverted representation.

This is achieved due to the fact that the cryptographic information protection device implements inverted calculations for operations constituting an iteration of data encryption. In this case, if the input data in direct and inverted representation correspond, the output data and intermediate results of the cryptographic transformation in direct and inverted representation remain consistent.

To achieve the goal of the invention, the device for iterating data encryption of the Magma algorithm according to GOST R 34.12-2015 contains a data summing block with an iterative key, a substitution block according to the substitution table, a cyclic shift block, and the first input of the device is connected to the first input of the modulo 2 summing block ³² , the second input of the device is connected to the second input of the modulo 2 summation block ³² , the output of the modulo 2 summation block ³² is connected to the input of the substitution table substitution block, the output of the substitution table substitution block is connected to the input of the cyclic shift block. Additionally, a modulo 2 addition block is introduced, the third input of the modulo 2 summation block ³² and the third input of the device are added, and the output of the cyclic shift block is connected to the first input of the modulo 2 addition block, the third input of the device is connected to the second input of the modulo 2 addition block, the third input of the modulo 2 summation block ³² is connected to the constant value source 1, the output of the modulo 2 addition block is connected to the output of the device.

On FIG. 1 shows a block diagram of the data encryption iteration device of the Magma algorithm according to the GOST R 34.12-2015 standard with an inverted representation of data processing a 64-bit data block, where 1 is a modulo 2 summation block of ³² data with an iterative key, 2 is a substitution block by substitution table, 3 - cyclic shift block, 4 - modulo 2 addition block. The device has inputs 1 and 3 to which 32-bit data subblocks are to be encrypted, output 1 from which the encryption result is taken and input 2 to which the iterative encryption key is supplied.

Input 1 of the device is connected to input 1 of the summation unit modulo 2 ³² . Input 2 of the device is connected to input 2 of the summation unit modulo 2 ³² . Input 3 of the device is connected to input 2 of the modulo 2 addition block. Input 3 of the modulo 2 summation block ³² is connected to a source of constant value 1. The output of the modulo 2 summation block ³² is connected to the input of the substitution block according to the replacement table. The output of the substitution block according to the replacement table is connected to the input of the cyclic shift block. The output of the cyclic shift unit is connected to the input 1 of the modulo 2 addition unit. The output of the modulo 2 addition unit is connected to the output 1 of the device. The operation of the entire device is clocked from an external clock signal device.

On FIG. Figure 2 shows the summation modulo 2 ³² block, which ensures the fulfillment of the conditions of inverted addition modulo 2 ³² . To do this, in the summation unit modulo 2 ³² , in addition to the 32-bit terms supplied to the inputs 1 and 2, a constant unity is added to the input 3, summed with the least significant digits of the terms. Input 3 can be the carry input from the previous adder found in 32-bit binary full adders.

Let us consider the operation of the data encryption iteration device of the Magma algorithm according to the GOST R 34.12-2015 standard with inverted data representation.

The device as a whole and its individual blocks can be implemented, for example, using programmable logic circuits [6].

The device converts the encrypted data block in the inverted representation in accordance with the iterative function of the Magma algorithm according to the GOST R 34.12-2015 standard. When encrypting a 64-bit data block, it is divided into two 32-bit subblocks. The first subblock is fed to the input 1 of the device, the second subblock is fed to the input 3 of the device. 2 devices are fed a 32-bit iteration key at the input. All data supplied to the inputs of the device have an inverted representation. From input 1 of the device, the first subblock of data is fed to input 1 of block 1. From input 2 of the device, an iterative key is fed to input 2 of block 1. The input 3 of block 1 is supplied with a constant value 1. In block 1, modulo 2 ³² addition of the first sub-block of data with an iterative key is carried out in accordance with the following conditions of inverted addition modulo 2 ⁿ . The result of addition in block 1 from the output of block 1 is fed to the input of block 2, where the sub-block is substituted in accordance with the inverted table of substitutions of the "Magma" algorithm below. The result of substitution according to the inverted substitution table in block 2 from the output of block 2 is fed to the input of block 3, where the subblock is cyclically shifted in accordance with the requirements of the Magma algorithm. The result of the cyclic shift in block 3 is fed from the output of block 3 to input 1 of block 4. From input 3 of the device, the second subblock is fed to input 2 of block 4. In block 4, modulo 2 is added to the transformation result of the first subblock with the second subblock. The result of modulo 2 addition in block 4 from the output of block 4 is fed to output 1 of the device. The value at output 1 of the device is the result of encryption of the second data sub-block in the inverted representation at the current iteration of the cryptographic transformation. The first subblock is passed for processing to the next encryption iteration without changes.

In the data encryption iteration device of the Magma algorithm according to the GOST R 34.12-2015 standard for processing data in an inverted representation, the blocks included in it function as follows:

[5].1. In the data summation block with an iteration key, when adding two inverted terms, addition is additionally carried out with a constant equal to 1 in the least significant digit of the adder, which ensures the fulfillment of the conditions for inverted addition modulo 2 ⁿ

[5].

алгоритма «Магма» [1] изменяется по формуле

т.е. в ячейку с инвертированным адресом помещается инвертированное содержимое ячейки с прямым адресом. Таблица замен алгоритма «Магма» из ГОСТ Р 34.12-2015 [1] при работе в инвертированном режиме приведена в таблице.2. In the substitution block according to the substitution table, the contents of each array of substitutions

algorithm "Magma" [1] is changed by the formula

those. the cell with the inverted address is filled with the inverted contents of the cell with the direct address. The table of replacements of the Magma algorithm from GOST R 34.12-2015 [1] when operating in the inverted mode is given in the table.

3. In the cyclic shift block and the modulo 2 addition block, operations with inverted data are carried out similarly to operations with data in direct representation.

The proposed device for iterating data encryption of the "Magma" algorithm according to the GOST R 34.12-2015 standard allows the transformation of data presented in the inverted representation in accordance with the iterative function of the "Magma" algorithm according to the GOST R 34.12-2015 standard, while between transformations in direct and inverted representation the isomorphism is preserved, i.e. if the input data in direct and inverted representation correspond, the output data and intermediate results in direct and inverted representation remain consistent.

Sources of information:

1. Sobolev A.N., Kirillov V.M. Physical bases of technical means of ensuring information security: Textbook. - M.: Helios ARV, 2004, - 224 p., ill.

2. Sharamok A.V. Ensuring structural secrecy of informative signals of spurious electromagnetic radiation and interference // Special Technique No. 3 2011 - p. 30-33.

3. GOST 34.12-2015. Information technology. Cryptographic protection of information. Block ciphers.

4. RF patent No. 2498416 C1, IPC class H04L 9/06, G09C 1/00, Data encryption device according to GOST 28147-89/ Appl. May 15, 2012; Published 11/10/2013 - prototype.

5. Creators of domestic electronics. Issue 5. Vilzhan Mavlyutinovich Amerbaev, Author-compiler and editor Malashevich B.M., M.: TECHNOSPHERE, 2021. -572 p., more than 200 ill., p. 424.

6. J. F. Wakerley, Designing digital devices, volume 1. - M .: Postmarket, 2002. - 544 p.

Claims (1)

The device for iterating data encryption of the Magma algorithm according to the GOST R 34.12-2015 standard, containing a modulo 2 ³² summation unit, a substitution table substitution unit, a cyclic shift unit, the first input of the device is connected to the first input of the modulo 2 ³² summation unit, the second the input of the device is connected to the second input of the summation unit modulo 2 ³² , the output of the summation unit modulo 2 ³² is connected to the input of the substitution block according to the substitution table, the output of the substitution block according to the substitution table is connected to the input of the cyclic shift block, characterized in that the addition block is introduced by modulo 2, the third input of the modulo 2 ^summation block and the third input of the device are added, and the output of the cyclic shift block is connected to the first input of the modulo 2 addition block, the third input of the device is connected to the second input of the modulo 2 addition block, the third input of the summation block modulo 2 ³² is connected to the source of constant value 1, the output of the modulo 2 addition block is connected to the output of the set triplets.

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