RU2643204C1 - Method of broadband signal search with phase manipulation and device for its implementation - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: dynamic change scheme of weight coefficient, which determines the threshold level. The phase-keying broadband signal search device includes a matched filter, the input of which is the input of the device, the comparison unit the output of which is the device output, the first adder unit, the first multiplier, the first subtraction unit, the first delay blocks, the second subtraction units, the third subtraction unit, a division unit, absolute value calculation units, the second adder unit, the second multiplier, the fourth subtraction unit, a constant signal generation unit fast, constant signal generation unit slow, the third summing unit, a constant unit level signal, a third multiplier, the second delay unit.

EFFECT: providing the highest interference immunity to various types of interference, in particular interference with signal structure, impulse interference and noise interference.

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Description

The invention relates to the field of radio engineering, and specifically to methods and devices for processing broadband signals, and may find application in radar, telemetry, command and communication systems. It is known that the problems of searching for broadband signals in asynchronous radio communication systems with correlation signal processing at the receiving side become particularly difficult in channels with interference with the signal structure (from neighboring radio communications operating in the same frequency range), chaotic impulse noise, and intentional noise interference.

As an analogue of the method, a method for performing a parallel search for noise-like delay signals [Radio engineering systems / Yu.P. Grishin, V.P. Ipatov, Yu.M. Kazarinov et al. Ed. Yu.M. Kazarinova. - M .: Higher school, 1990, p. 64 (Fig. 3.16), p. 99 (Fig. 4.6)] [1], which consists in multiplying the received signal with N pairs of reference noise-like signals, quadrature copies of the received signal for N discrete delay times, integrating the multiplication results in 2N quadrature channels over an interval equal to the duration of the noise-like signal, highlighting N values of the module of the mutual correlation function (VKF) and the choice as an estimate of the delay time of the delay value of the reference signal in the channel with the maximum value of the VKF.

As an analogue of the device, the patent RU 2206180, published on 10.06.2003 [2], in which the initial synchronization device of the pseudorandom signal receiver comprises a reference signal generator, the outputs of which are connected to the corresponding reference inputs of N channel correlators, and the signal inputs of the correlators are combined and are the device input, are considered , the outputs of the correlators are connected to the corresponding inputs of the selector of the maximum signal, and also contains sequentially connected selector synchronization sequence, the input otorogo connected to the input of the device, and the phase selector of the synchronization sequence, as well as the search control unit, and the output of the phase selector of the synchronization sequence is connected to the controlled input of the reference signal generator, the installation input of the reference signal generator is connected to the first output of the search control block, the second output of which is connected to the corresponding input the maximum signal selector, the third output of the search control unit is connected to the second input of the phase sequence selector, and the output is a selector and the maximum signal is connected to the input of the search control unit.

As a device for searching for a broadband signal with phase shift keying, a circuit implemented in an FPGA (programmable logic integrated circuit) can be used.

Closest to the proposed invention is a method of searching for noise-like phase-shifted signals and a radio receiving device for its implementation, described in patent RU 2505934 C1, published on 01/27/2014 [3]. This method and device are selected as prototypes of the claimed invention.

The characteristic of the prototype method described in patent RU 2505934 C1, published on 01/27/2014 [3], is that the value of a given threshold is calculated depending on certain parameters of the signal at the output of the matched filter with the detector, for this the average value of the signal at the output of the matched is calculated filter with a detector in a sliding window, a quarter of the duration of the broadband signal (SHPS) - Cp and remember the value of the last peak of the autocorrelation function (ACF) at the output of the matched filter with the detector - Ur , then the value of the given threshold is calculated by the formula: П = k⋅ (Up-Ср) + Ср, where k is a constant proportional to the relative magnitude of the side peaks of the ACF of the given SHPS, and at the moment the threshold is exceeded, a decision is made to detect a certain ShSS and form a pulse for synchronization of the receiver with the moment of detection of ShPS.

The characteristic of the prototype device described in patent RU 2505934 C1, published on January 27, 2014 [3], is that the radio receiving device comprises a peak detector, a mid-level detector, a subtracting device and a signal addition device, while the output of the matched filter is connected to the inputs of the peak a detector, a mid-level detector and one of the inputs of the comparison device, the output of the peak detector is connected to the input of the reduced subtractor, and the output of the middle-level detector is connected to the input of the subtracted subtract and the second input of the addition device, the first input of which is connected to the output of the subtracting device, the output of the addition device is connected to the second input of the comparison device, the output of which is the output of the search device.

The disadvantage of the data of the method and device is the dependence of the detection probability on the peak voltage values from the output of the matched filter.

The technical problem is to preserve the peak value of the signal after matched filtering and use this value to form a threshold value.

The technical problem to be solved (technical result) of the proposed method for searching for a broadband signal with phase shift keying and a device for its implementation is to provide the highest noise immunity to various types of interference, in particular interference with the signal structure, impulse noise and noise interference, and is solved by using a dynamic weighting coefficient variation circuit which determines the threshold level.

The technical result in a method for searching for a broadband signal with phase shift keying, consisting in a continuous search for a broadband signal, matched filtering of the received broadband signal, comparing the signal value after matched filtering X (t) with the signal value of a given threshold level Y (t), is achieved by by comparing the signal value after the matched filtering - X (t) with the signal value of a given threshold level - Y (t), determine the efficiency coefficient at the moment - ER (t) a predetermined threshold level depending on the ratio of the difference, the signal value at a given moment in time X (t) and the signal value delayed by (n + 1) X (tn-1) values, (where n is chosen equal to a quarter of the pulse width of the broadband signal) to the sum of the difference module, the signal value delayed by i values is X (ti), and the signal value delayed by (i + 1) values is X (ti-1), which corresponds to the average level of rise or fall for n previous signal values after consistent filtering:

why measure the signal value after matched filtering at the current moment of time X (t) and the signal value after matched filtering delayed by (n + 1) X values (tn-1), the signal value after matched filtering delayed by i X values ( ti), the signal value after matched filtering, delayed by (i + 1) the X (ti-1) values, then using the fast constant coefficient - fast, the slow constant coefficient - slow and the efficiency coefficient at the current time ER (t) determine smoothing factor st constant c (t):

then, using the value of the coefficient of the smoothing constant at the current time moment c (t) and the measured value of the threshold level signal at the previous time moment Y (t-1), the threshold level value at the current time moment Y (t) is determined by the formula:

where X (t) is the signal value after matched filtering at the current time, X (ti) is the signal value after matched filtering, delayed by i values, X (ti-1) is the signal value after matched filtering, delayed by (i + 1) values, X (tn-1) is the signal value after matched filtering, delayed by (n + 1) values, Y (t) is the value of the threshold level signal at the current time, ER (t) is the efficiency coefficient at the moment time, c (t) is the coefficient of the smoothing constant at the current moment of time, Y (t-1) is the value thresholds of the level of the previous time, i - summation variable from 0 to (n + 1), n - constant number of values corresponding to a quarter of the pulse duration of the wideband signal, fast - a fast constant rate, slow - slow constant rate.

Technical result in a phase-shift keyed signal search device containing a matched filter, the input of which is the input of the device, the output of the matched filter is connected to the first input of the comparison unit, the output of which is the output of the device, the second input of the comparison unit is connected to the output of the first summing unit, the first input which is connected to the output of the first multiplication block, the first input of which is connected to the output of the first subtraction block, is achieved by the fact that we are the first delay blocks, the second subtraction blocks, the third subtraction block, the division block, the absolute value calculation blocks, the second summing block, the second multiplication block, the fourth subtraction block, the fast constant signal generating block, the slow constant signal generating block, the third summing block, block the formation of a constant signal of a single level, the third block of multiplication, the second delay block, the output of the matched filter is connected to the input of the first of (n + 1) first delay blocks connected in series, as well as nen with the first input of the first of (n + 1) second subtraction blocks, and each of the outputs of the first delay blocks is respectively connected to the second-subtracted input of each of the second subtraction blocks and the first input of the next of (n + 1) second subtraction blocks, and the output (n + 1) of the first delay block is connected to the first-subtracted input of the third subtraction block, the second of the inputs of which is connected to the output of the matched filter, the output of the third subtraction block is connected to the first-divisible input of the division block, the outputs of the second subtraction blocks are connected are connected with the inputs (n + 1) of the absolute value calculation blocks, respectively, the outputs of which are connected respectively to the inputs of the second summing block, the output of which is connected to the second dividing input of the division block, the output of which is connected to the first input of the second multiplication block, the second input of which is connected to the output the fourth subtraction unit, the first input of which is connected to the output of the constant value generating unit fast, the second subtracted input of the fourth subtraction unit is connected to the output of the constant signal generating unit la slow, the output of which is also connected to the first input of the third summing block, the second input of which is connected to the output of the second multiplication block, the output of the third summing block is connected to the first-subtracted input of the first subtraction block, the second input of which is connected to the output of the unit for generating a constant signal of unit level , the output of the third summing block is also connected to the first input of the third multiplication block, the second input of which is connected to the output of the matched filter, the output of the third multiplication block is connected to the second input of the first summing unit, the output of which is connected to the input of the second delay unit, the output of which is connected to the second input of the first multiplication unit.

In FIG. 1 shows a structural diagram of a device for searching for broadband signals for implementing the proposed method.

In FIG. 2 shows the dependence of the probability of detection on the signal-to-noise ratio under the influence of Gaussian noise for the proposed device and the device described in the prototype.

In FIG. Figure 3 shows the oscillogram of the operation of the threshold device and the matched filter, the times when the signal level from the output of the matched filter exceeds the signal level from the threshold device, you can decide on the presence of a signal.

In FIG. 1 shows a structural diagram of a device for searching for broadband signals for implementing the proposed method. A phase shift keyed broadband signal search device (Fig. 1) contains a matched filter 1, whose input is the input of the device, the output of the matched filter 1 is connected to the first input of the comparison unit 2, the output of which is the output of the device, the second input of the comparison unit 2 is connected to the output of the first summing unit 3, the first input of which is connected to the output of the first multiplication unit 4, the first input of which is connected to the output of the first subtraction unit 5, the output of the matched filter 1 is connected to the input of the first of (n + 1) ne first delay blocks 6 ₁ ... 6 _{n + 1} connected in series, and also connected to the first input of the first of (n + 1) second subtraction blocks 7 ₁ ... 7 _{n + 1} , with each of the outputs of the first delay blocks 6 ₁ ... 6 _{n +1 is} respectively connected to the second-subtracted input of each of the second subtraction blocks 7 ₁ ... 7 _{n + 1} and the first input of the next of (n + 1) second subtraction blocks 6 ₁ ... 6 _{n + 1} , and the output (n + 1) of the first the delay unit is connected to the first-subtracted input of the third subtraction unit 8, the second of the inputs of which is connected to the output of the matched filter 1, the output of the third subtracting unit 8 is connected to a first divisible input division 9, outputs second subtracting unit block 7 ₁ ... 7 _{n + 1} coupled to the inputs of (n + 1) calculating blocks of the absolute values 10 ₁ ... 10 _{n + 1,} respectively, whose outputs are connected respectively with the inputs of the second summing unit 11, the output of which is connected to the second dividing input of the division unit 9, the output of which is connected to the first input of the second multiplication unit 12, the second input of which is connected to the output of the fourth subtraction unit 13, the first input of which is connected to the output of the constant forming unit When the fast value is 14, the second-subtracted input of the fourth subtraction block is connected to the output of the constant signal generating block slow 15, the output of which is also connected to the first input of the third summing block 16, the second input of which is connected to the output of the second multiplication block 12, the output of the third summing block 16 connected to the first-subtracted input of the first subtraction unit 5, the second input of which is connected to the output of the unit for generating a constant signal of a unit level 17, the output of the third summing unit 16 is also connected to the first input the house of the third block of multiplication 18, the second input of which is connected to the output of the matched filter 1, the output of the third block of multiplication 18 is connected to the second input of the first block of summation 3, the output of which is connected to the input of the second block of delay 19, the output of which is connected to the second input of the first block of multiplication 4 The blocks listed above have standard circuits published in the literature and have the corresponding power supply systems, where n is the number corresponding to the number of values contained in a quarter of the duration of the NPS

Consider the implementation of a method for searching for a broadband signal with phase shift keying and the operation of the device for its implementation. A continuous search for a broadband signal is a search for a broadband signal using memory on the n measured previous signal values, with which a threshold level is calculated. All units of the device are connected to the power supply network, then the signal level values are entered into the slow constant signal generating unit slow 15 and the fast signal generating unit into the fast 14 constant signal generating unit (in the example of a specific implementation, slow = 2048, fast = 4096). n - is selected to be equal to a quarter of the pulse width of the NPS taking into account the sampling frequency (in the example, when the NPS pulse base is 128, n = 64), then the signal, passing through the matched filter 1, enters the comparison unit 2, where it is compared with the threshold level Y (t), the formation of which consists in summing the second summation block 11 absolute values from the outputs of the absolute value calculation blocks 10 ₁ ... 10 _{n + 1} differences of signal values from the outputs of the second subtraction blocks 7 ₁ ... 7 _{n + 1} , delayed by i values and signal values the values yielded at i + 1 from the outputs of the first delay blocks 6 ₁ ... 6 _{n + 1} , dividing by dividing block 9 by the obtained value, the values from the output of the third subtraction block 8, obtained by subtracting from the signal from the output of the matched filter 1 at the current time X ( t) a signal from the delay block 6 _{n + 1} , delayed by (n + 1) X (tn-1) values, thus we obtain the value of the efficiency coefficient ER (t), then the resulting efficiency coefficient at the current time moment ER (t) arrives to the input of the second block of multiplication 12, the second input of which receives a signal from the fourth subtraction block 13, in which the signal from the output of the constant signal generation block fast 14 is subtracted from the signal from the slow 15 constant signal generation block, then the obtained value is summed by the third summing block 16 with the signal value from the slow 15 constant signal generation block, then the obtained value is multiplied by the third multiplication block 18 by the signal value from the output of the matched filter 1 at the current moment of time X (t), then it is summed by the first summing block 3 with the value obtained from the output of the first of the th block of multiplication 4 of the threshold level at the previous instant of time Y (t-1), delayed by the second block of delay 19, and the value from the output of the first block of subtraction 5, obtained by the signal difference from the output of the unit for generating a constant signal of unit level 17 and the signal from the output of the third block summation, at the output of the first summation block 3, we obtain the threshold level value at the current moment of time Y (t), with which the value from the output of the matched filter is compared in the comparison block 2 and a decision is made on the presence or absence of Ignala. In FIG. 2 shows the signal-to-noise ratio of the detection probabilities obtained as a result of a statistical experiment for the proposed threshold device (solid line) and the threshold device described in the prototype. In FIG. Figure 3 shows the dependences of the signal from the output of the matched filter 1 (dashed line) and the signal from the output of the first summing block 3 (solid line).

Compared with the prototype, the proposed method for searching for a broadband signal with phase shift keying and a device for its implementation allow you to decide on the presence of a signal with a lower signal to noise ratio.

Claims (21)

1. The method of searching for a broadband signal with phase shift keying, which consists in the continuous search for a broadband signal, matched filtering of the received broadband signal, comparing the signal value after matched filtering X (t) with the signal value of a given threshold level Y (t), characterized in that before comparison the signal values after the matched filtering - X (t) with the signal value of the specified threshold level - Y (t), determine the efficiency coefficient at the current moment - ER (t) of the given threshold equal depending on the ratio of the difference, the signal value at a given time X (t) and the signal value delayed by (n + 1) X (tn-1) values (where n is chosen equal to a quarter of the pulse width of the broadband signal) to the sum of the module differences, the value of the signal delayed by i values is X (ti), and the value of the signal delayed by (i + 1) values is X (ti-1), which corresponds to the average level of rise or fall for n previous signal values after matched filtering :

why measure the signal value after matched filtering at the current moment of time X (t) and the signal value after matched filtering delayed by (n + 1) X values (tn-1), the signal value after matched filtering delayed by i X values ( ti), the signal value after matched filtering, delayed by (i + 1) the X (ti-1) values, then using the fast constant coefficient - fast, the slow constant coefficient - slow and the efficiency coefficient at the current time ER (t) determine smoothing factor st constant c (t): c (t) = ER (t) (fast-slow) + slow; then, using the value of the coefficient of the smoothing constant at the current time moment c (t) and the measured value of the threshold level signal at the previous time moment Y (t-1), the threshold level value at the current time moment Y (t) is determined by the formula: Y (t) = c (t) X (t) + (1-c (t)) Y (t-1), where X (t) is the signal value after the matched filtering at the current time, X (t-i) - signal value after matched filtering, delayed by i values, X (t-i-1) - signal value after matched filtering, delayed by (i + 1) values, X (t-n-1) - signal value after matched filtering, delayed by (n + 1) values, Y (t) is the value of the threshold level signal at the current time, ER (t) is the efficiency coefficient at the current time, c (t) is the coefficient of the smoothing constant at the moment, Y (t-1) - the value of the threshold level at the previous moment in time, i is the summation variable from 0 to (n-1), n is a constant, the number of values corresponding to a quarter of the pulse width of the broadband signal, fast - fast constant coefficient, slow - slow constant coefficient. 2. A phase shift keyed broadband signal search device containing a matched filter, the input of which is the input of the device, the output of the matched filter connected to the first input of the comparison unit, the output of which is the output of the device, the second input of the comparison unit connected to the output of the first summing unit, the first input of which connected to the output of the first multiplication block, the first input of which is connected to the output of the first subtraction block, characterized in that it further comprises first blocks delays, second subtraction blocks, third subtraction block, division block, absolute value calculation blocks, second summing block, second multiplication block, fourth subtraction block, fast constant signal generating block, slow constant signal generating block, third summing block, constant signal generating block unit level, third multiplication block, second delay block, matched filter output connected to the input of the first of (n + 1) first delay blocks connected in series, and also connected to the first input ohm of the first of (n + 1) second subtraction blocks, and each of the outputs of the first delay blocks is respectively connected to the second-subtracted input of each of the second subtraction blocks and the first input of the next of (n + 1) second subtraction blocks, and the output is (n + 1) the first delay block is connected to the first-subtracted input of the third subtraction block, the second of the inputs of which is connected to the output of the matched filter, the output of the third subtraction block is connected to the first-divisible input of the division block, the outputs of the second subtraction blocks are connected to the inputs (n + 1 ) absolute value calculation blocks, respectively, whose outputs are connected respectively to the inputs of the second summing block, the output of which is connected to the second dividing input of the division block, the output of which is connected to the first input of the second multiplication block, the second input of which is connected to the output of the fourth subtraction block, the first input of which connected to the output of the constant value generating unit fast, the second-subtracted input of the fourth subtraction unit is connected to the output of the constant signal generating unit slow, the output of which horn is also connected to the first input of the third summing block, the second input of which is connected to the output of the second multiplication block, the output of the third summing block is connected to the first-subtracted input of the first subtraction block, the second input of which is connected to the output of the unit for generating a constant signal of a single level, the output of the third block summation is also connected to the first input of the third block of multiplication, the second input of which is connected to the output of the matched filter, the output of the third multiplication block is connected to the second input of the first summing block, the output of which is connected to the input of the second delay block, the output of which is connected to the second input of the first multiplication block.

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