RU2612072C1 - Portable diagnostic complex - Google Patents

Abstract

FIELD: medicine.

SUBSTANCE: portable diagnostic complex contains PC, USB adaptor, USB interface, microcontroller, random memory, JTAG interface, promptly reprogrammable logic unit, two control buses, two data buses, programmer, two separate mutually inverted-common-mode with respect to each other electric circuits, connected in a particular way.

EFFECT: initial diagnostics, control of electrical bonds, testing of printed circuit boards, programming and reading of memory, testing, programmed testing, control of quality and general workability of digital logical microcircuits, electronic units, units and electric connections, testing of workability of service software of hardware, support of boundary scan technology, realisation of monitoring and checkout of product, without interference into its normal operation.

1 dwg

Description

The invention relates to digital computing electronics and can be used to diagnose the health of other electronic devices, in particular control system equipment (SU).

An analogue is known from the prior art: a portable software and diagnostic complex (patent RU 2363975), which is intended for the diagnosis and detection of malfunctions of electronic products (REI), which includes: a monitor (a single indicator device for displaying alphanumeric and graphic information), a control computer, multi-channel digitally controlled analog signal generator, multi-channel digitally controlled pulse-code signal generator, multi-channel digital analog signal converter numerically controlled, multi-channel logic analyzer digitally controlled, multi-diagnostic module with digital control, the adapter for connection to diagnostic object.

The disadvantage of the analogue is the verification of the tested products through test probes, which allows the human factor to influence the test result, and also requires a large number of signal lines to carry out product verification.

The prototype is described in the article "Development of the JTAG debugging complex for diagnosing the digital computer" (The main directions and forms of using innovative developments in creating rocket and space technology. Collection of materials. Scientific and practical seminar for young scientists and specialists of space industry enterprises, Korolev, Moscow Region, 2007., Art. 85-98). The article describes a device in which a test board with LSIs located on it is connected via a serial data channel (JTAG interface) to some master device. The master device solves the problems associated with the diagnostics of the device under test, localization of faults, loading PLD configurations, etc. Typically, the host device is a personal computer equipped with appropriate software. The article provides a diagram of the nodes and connections of the adapter with a personal computer (PC) and the tested product. The adapter connects to the PC via the USB 2.0 interface, and to the product under test via the JTAG interface. A PC is connected via a USB 2.0 interface, the power circuit of which is connected to all elements of the adapter, and the data bus is connected to a USB 2.0 interface transceiver, which is connected by a bi-directional data bus to the microcontroller. In turn, the microcontroller has unidirectional communication with the functional units of the logical node and is connected to the control bus with RAM, while the adapter has a common bus that provides bi-directional communication between the microcontroller, RAM, logical node, and also provides the microcontroller with an address expander, which in its turn The queue is connected to RAM. The logical node is connected to the JTAG interface through the signal lines of the serial synchronous 4-wire JTAG interface.

The disadvantage of the prototype is that in this circuit there is no possibility of real-time reprogramming of the logical node, and the circuit of the low performance given in the article is due to the fact that the JTAG signal processing is completely assigned to the microcontroller.

The objective of the invention is the creation of a mobile portable system that allows for the diagnosis, testing, software testing and tuning of electronic products.

To solve this problem, the adapter should work together with a PC and programmer, forming a portable diagnostic complex (MPC). Software must be installed on the PC, which allows diagnostics, testing, software testing and tuning of electronic information systems, and the programmer must be used to reprogram the quickly reprogrammable logical node of the adapter.

The developed MPC includes the following elements presented in the figure:

1 - Personal computer;

2 - Test product;

3 - Programmer;

4 - USB interface;

5 - USB transceiver;

6 - RESET signal generation circuit;

7 - Rapidly reprogrammable logical node;

8 - Microcontroller;

9 - RAM

10 - JTAG interface;

11 - JTAG helper interface;

12 - Address expander.

MPC elements have the following relationships.

PC (1), to which the adapter is connected via the USB cable (UI-1) via the USB interface (4), the power circuit (CPU-1) of which is supplied to the USB interface transceiver (5), the RESET mode formation circuit (6), quickly reprogrammable logic unit (OPLU) (7), microcontroller (8), random access memory (RAM) (9), JTAG interface (10), auxiliary JTAG interface (11) and address expander (12). The information bus (ШД-1) of the USB interface (4) is connected to the transceiver of the USB interface (5). A common data bus of 8 bits (ШД-2) of the adapter is connected to a USB transceiver (5), a microcontroller (8), RAM (9) and an address expander (12), which ensures: communication (ШД-2.1) of a USB transceiver (5 ) with a microcontroller (8), communication (ШД-2.2.) of the microcontroller (8) with RAM (9), communication (ШД-2.3) of the microcontroller (8) with an address expander (12). The microcontroller (8) has unidirectional communication with the SHU-5 and SHU-6 control buses with RAM (9) and the address expander (12), respectively, and is mutually connected by two control buses (SHU-1 and SHU-2) with a USB interface transceiver (5) . OPLU (7) and microcontroller (8) are interconnected by two control buses (ШУ-3 and ШУ-4) and two data buses (ШД-3 and ШД-4). The circuit for generating the RESET mode (6) is connected with the USB interface transceiver (5) and the microcontroller (8) through separate signal independent electric circuits (EC-1 and EC-2), which are mutually inverted in-phase with respect to each other. The address expander (12) and the microcontroller (8) each have one unidirectional 8-bit address bus (ША-1 and ША-2), which together form one 16-bit address bus, which is connected to RAM (9). The JTAG interface (10) and the auxiliary JTAG interface (11) are connected to the OPLU (7) via the signal lines of the serial synchronous 4-wire JTAG interface (ID-1 and ID-2). The test product (2) is connected to the JTAG interface (10), using the JTAG cable (ID-3), and the auxiliary JTAG interface (11) also has power supply circuit contacts (CPU-2), which, together with the JTAG cable (ID- 4) is connected to the programmer (3). The programmer (3) with a data bus, which uses a USB cable (UI-2), is connected to a PC (1).

MPC works as follows.

A PC (1) is connected to the adapter via the USB interface (4), and the tested product (2) is connected via the JTAG interface (10). Through the PC (1), the adapter is controlled and powered, including reprogramming. The adapter uses the USB-2.0 or USB-3.0 interface, while the normal operation of the adapter is possible with different versions of the USB interface of the adapter and the PC, the presence of the USB-3.0 interface of the PC and the adapter increases the speed of the latter. The common 8-bit data bus (SHD-2) allows the use of a microcontroller with a limited number of 8-bit ports in the adapter, since, using one 8-bit port of the microcontroller (8), it connects it immediately to three adapter elements. Information from the PC (1), via the USB interface (4), is transmitted to the USB interface transceiver (5), which converts the digital serial data stream into a parallel digital bidirectional stream and transfers it to the 8-bit common data bus (ШД-2), and the signal coming through the SHU-2 control bus ensures its reception by the microcontroller (8) through the ShD-2.1 communication. The microcontroller (8) through the SHU-1 control bus reports on the readiness to receive (transmit) information from (to) the PC (1), thus the USB interface transceiver (5) serves to organize the reception and transmission of digital information stream between the PC (1) and microcontroller (8), which is the initiator of the exchange. The microcontroller (8) also works with RAM (9) in the read and write modes. Data exchange between the microcontroller (8) and RAM (9) is carried out via a common 8-bit data bus (ШД-2) via the ШД-2.2 communication. To read and write information, the address bus (ША-2), the control bus (ШУ-5) are used. The operation of the microcontroller (8) with RAM (9) has a number of features related to the fact that the RAM (9) is 16-bit, and the microcontroller (8) is 8-bit. If 50% of the RAM volume is sufficient for operation (9), then only one address bus (SHA-1 or SHA-2) is used, which is automatically selected by the microcontroller (8) at the firmware level if more than 50% of the RAM volume is required for operation (9) ), then the microcontroller (8) works together with the address expander (12). The address expander (12) allows the 8-bit microcontroller (8) to use the full amount of RAM 16-bit RAM (9). The work is carried out as follows: the microcontroller (8) sends 8-bit (ШД-2), via ШД-2.3 communication, information bits [0 ... 7], which are stored by the address expander (12) at the input of the address bus (ША) via a common data bus (8) -1), after which the address expander delays any 8-bit (ШД-2) information coming through the common data bus until a signal is received from the microcontroller (8) via the control bus (ШУ-6). Next, the microcontroller (8) sends to the input of the address bus (SHA-2) bits of information [8 ... 15], after which the RAM (9), upon command received via the control bus (SHU-5), receives the combined 16-bit signal from two address bus (SHA-1 and SHA-2). The microcontroller (8) works with OPLU (7), which is a separate part of the logic implemented using FPGAs and contains a decoder, multiplexer, and a synchronous bi-directional shift register, which form the JTAG standard sequence diagram, which ensures the exchange of information between the microcontroller (8) and product under test (2). The use of FPGAs improves the speed and accuracy when working with data via the JTAG interface (10) by reducing the computational load on the microcontroller (8) and increasing the amount of free memory available in it. The JTAG interface (10) is connected to the OPLU (7), receives the signals processed by the microcontroller (8) and the OPLU (7) and transmits them to the tested product (2) connected to it. The JTAG interface (10) is active and amplifies the signal supplied to it from the OPLU (7), and is also able to restore the signal received from the tested product (2). To reprogram OPLU (7), a programmer (3) is used, which is connected to a PC (1) and to the auxiliary JTAG interface (11). Through the PC (1), the programmer (3) is controlled, as well as its power. The auxiliary JTAG interface (11) is used only for reprogramming the OPLU (7) and, in addition to the signal lines of the serial synchronous 4-wire JTAG interface, designed to connect the JTAG cable (ID-4), contains a power circuit (CPU-2), which is used to power programmer input buffer (3). The adapter also has a reset signal generation circuit (6), which allows the PC operator (1) to perform a forced reboot of the microcontroller (8) and to clear the FIFO data of the USB interface transceiver (5).

Essentially, the invention is.

A portable diagnostic complex, in which an adapter is connected to a PC (1) via a USB interface (4), a power circuit (CPU-1) of which is connected to all elements of the adapter, and an information bus is connected to a USB transceiver (5), which organizes the reception and transfer of information digital stream between a PC (1) and a microcontroller (8), which is connected by a control bus (ШУ-5) with random access memory (9) and uses an address expander (12) to use the full amount of RAM memory (9), the tested product (2) connected to the adapter through the JTAG interface (10), which is connected to a logical node, while the adapter uses an operatively reprogrammed logical node (7), which is interconnected by two control buses (ШУ-3 and ШУ-4) and two data buses (ШД-3 and ШД-4) with a microcontroller (8) and an auxiliary JTAG interface (11) with a power circuit contact (CPU-2), into which a programmer (3) is connected, connected via a control circuit (ИУ-2) to a PC (1), common an 8-bit data bus (ШД-2) provides the connection of the microcontroller (8) with RAM (9), an address expander (12) and a USB transceiver (5), with where it is also interconnected by two control buses (ШУ-1 and ШУ-2), the microcontroller (8) is additionally connected to the address expander (12) of the control bus (ШУ-6) and to the RAM (9) 16-bit address bus, which is formed from two 8-bit address buses (ША-1 and ША-2), coming from the microcontroller (8) and the address expander (12), the circuit for generating the RESET mode (6) is connected to the USB interface transceiver (5) and the microcontroller (8 ) through separate signal independent electric circuits that are mutually inverted in-phase with respect to each other.

The technical result of the invention is to expand the functionality, increase the speed of the device and reduce its weight and size characteristics when using a microcontroller with a limited number of ports.

The portable diagnostic complex allows you to perform the following actions with the tested product:

1. initial diagnosis and configuration;

2. control of electrical connections;

3. check of printed circuit boards;

4. programming and reading memory;

5. comprehensive bench work and software tests;

6. checking the quality and overall performance of digital logic circuits, electronic components, components and electrical connections (detachable and integral);

7. check the operability of the hardware service programs;

8. Supports edge scanning technology;

9. conduct work in a multifaceted mode.

When working with the test product, the diagnostic complex can monitor the work and debug the product without disturbing its normal operation. If the tested product has its own microcontroller, it is possible to use its computing resources to verify the product.

Claims (1)

A portable diagnostic complex in which an adapter is connected to a PC via a USB interface, the power circuit of which is connected to all adapter elements, and the information bus is connected to a USB interface transceiver, which organizes the reception and transmission of digital information stream between a PC and a microcontroller, which is connected to the control bus with random access memory device and uses an address expander to use the full amount of RAM memory, the test product is connected to the adapter via the JTAG interface, which knitted with a logical node, characterized in that the adapter employs a rapidly reprogrammable logical node that is interconnected by two control buses and two data buses with a microcontroller and an auxiliary JTAG interface that has a power supply circuit contact, into which a programmer connected via a control circuit to a PC is connected , the 8-bit common data bus provides communication between the microcontroller and RAM, an address expander and a USB interface transceiver, with which it is also mutually connected with two control buses, the microcontroller is optional It is additionally connected with the address expander of the control bus and with the RAM 16-bit address bus, which is formed from two 8-bit address buses coming from the microcontroller and the address expander, the RESET mode generation circuit is connected to the USB interface transceiver and the microcontroller via separate independent signal circuits which are mutually inverted in-phase with respect to each other.

Images