RU2608637C1 - Digital active phased antenna array - Google Patents

Abstract

FIELD: radars.

SUBSTANCE: invention relates to radars. Peculiar feature of the disclosed digital active phased antenna array (DAPAR) is that the fourth output of the synchronizer is connected to the third input of the switch, the fifth and the sixth outputs of the synchronizer are connected to the fourth inputs of the first and the second coherent heterodynes, herewith the central processor for the used specified DAPAR operation mode outputs the commands of setting the initial frequency and steepness of the linear frequency modulation to the first and the second coherent UHF heterodynes, the commands of setting the repetition period and the duration of sounding pulses to the synchronizer, the commands of setting the initial phase and amplitude of a signal individually for each transmitter-receiver module (TRM), the signal modulation parameters and the receiving gate in the programmable logical integral circuit (PLIC) of each TRM.

EFFECT: technical result is wider range of the sounding pulses spectrum for increasing the resolution by range without increasing the volume of formed digital data.

1 cl, 3 dwg

Description

The present invention relates to radar, in particular to a device for a digital active phased antenna array (CAFAR), operating as part of a pulse-Doppler airborne radar station (radar). The invention can be used in CAFAR to increase resolution in range, and at the same time expand the range of unambiguous measurement of Doppler frequency shift.

Currently, radars are increasingly using the CAFAR as an antenna, where distributed generation, distributed reception and processing of received signals are carried out. The use of CAFAR enhances the capabilities of radar systems to obtain information on several angularly spaced targets, to suppress active interference, and allows to solve multifunctional tasks based on one radar station. One of the requirements for modern antennas is the ability to form many different receiving diagrams, which determines its structure using digital spatial processing of the received signal.

Modern radar can operate in different modes, while adapting the used probing signal to a specific situation and task is required. In many cases, in radar it is necessary to provide a high resolution in range of units of meters or less. Such resolution is implemented in side-view radars, in radio altimeters, in target recognition systems, etc. In this case, signals with a spectrum width of more than 100 MHz are used. When digitally processing such wideband signals, it is necessary to set a high sampling frequency, which leads to a large amount of data and the high complexity of their processing.

To reduce the spectrum width of the processed signals and their sampling frequency, linear frequency modulation (LFM) signals and their processing with removal of the LFM in the receiver mixer are usually used.

Known radars of this type are radio altimeters using continuous signals with chirp (FM radio altimeters). For example, in [4] on p. 268 describes an FM radio altimeter with automatic adjustment of modulation parameters. It uses a continuous signal with a periodic sawtooth FM with a frequency deviation of 120 MHz, a signal resolution over a range of 1.3 m is implemented. In this case, the spectrum width of the rangefinder frequencies does not exceed 10 kHz, which allows the use of digital processing with a sampling frequency of 20 kHz. The accuracy of measuring height above a flat surface in the tracking mode is 0.3 m. The disadvantage of such systems is the need to use two spaced antennas, a receiving and a transmitting one. This increases the size and reduces the maximum operating range (usually no more than 5 km) due to the final isolation between the antennas. In addition, in such systems there is no review of space and coherent processing of a burst of pulses to ensure the aperture synthesis mode.

Known radar side view "Bumblebee" developed by JSC "UPKB" Detail "[5]. It uses a periodic signal with a sawtooth FM and coherent processing of a burst of pulses. With a signal spectrum width of 120 MHz and a burst duration of up to 3 s, linear resolution in range and azimuth of 1.3 * 1.3 m is realized.The drawbacks of such a system when compared with the claimed CAFAR are the need to use two spaced antennas, receiving and transmitting. This increases the size and limits the maximum operating range to 10 km. In addition, the system does not have a scanning mode, only a side view of the terrain is possible.

Known pulse-Doppler radars using a continuous chirp signal and electronic scanning in a wide sector of angles [6, 7]. High range resolution is ensured by large frequency deviation. In receive mode, a phased array is used, which forms a plurality of receiving radiation patterns. The disadvantage of such systems is the need to use a separate transmitting antenna, which increases the size, limits the maximum range.

Radars are known that use pulsed probing signals with LFM and correlation-filter processing of received signals with generalized heterodyning [2], p. 133. The local oscillator generates an oscillation with LFM, which removes the modulation of the signal in the mixer of the receiver (in whole or in part). This narrows the spectrum of the received signal and reduces the sampling frequency during digital signal processing. The pulse mode of operation allows you to abandon the use of two spaced antennas, which reduces its dimensions of the system. Moreover, the range is limited only by the energy potential of the radar. However, the publication does not describe the use of such signals and the method of their processing in CAFAR.

An additional disadvantage of the above systems is the inability to work with doubled pulse repetition rate. This limits the range of unambiguously measured Doppler frequency shifts and complicates the operation of radar systems at high carrier flight speeds.

A digital active phased antenna array [1] is known, the block diagram of which is shown in FIG. 2 used as a prototype. Her work is carried out as follows.

Before starting work, the Central processor 7 through the second input-output on the control bus sets the values of the parameters of the operating mode of CAFAR. In this case, the oscillation frequency of the first coherent local oscillator 1 (transmitter local oscillator) and the second coherent local oscillator 2 (receiver local oscillator) is set. The synchronizer 3 sends the duration of the probe pulses and the period of their repetition. The programmable logic integrated circuit (FPGA) 10-n of each transceiver module (PPM) 8-n transmits the amplitude and initial phase of the signal necessary to form the transmitting radiation pattern (LH) of the antenna, as well as the signal frequency of the quadrature generator of direct digital synthesis (CGPS) 20-n and parameters of the intrapulse modulation of the probe pulse. These parameters are transmitted through the third input-output of the FPGA 10-n to the CGPS 20-n. The FPGA 10-n transmits the settings of the preselectors, according to which the FPGA produces control signals and transmits them to input 2 of the preselector 13-n. The FPGA 10-n also receives the parameters of the receiving gate and sampling frequency, which are used to control the operation of the analog-to-digital converter (ADC) 18-n.

, а второй когерентный гетеродин 2 формирует сигнал гетеродина приемника с частотой

, которые поступают на входы коммутатора 4. Синхронизатор 3 формирует на третьем выходе последовательность тактовых импульсов. Через делитель мощности 6 эта последовательность импульсов поступает на первые входы КГПС 20-n и ПЛИС 10-n. Она же поступает на третьи входы когерентных гетеродинов 1 и 2. При этом все сигналы и гетеродин формируются от одной последовательности импульсов, стабилизированной кварцевым резонатором, что обеспечивает пространственную и временную когерентность ЦАФАР. В ПЛИС 10-n последовательность импульсов, поступающая на вход 1, используется для формирования всех сигналов синхронизации работы ППМ. Делением ее частоты получается последовательность импульсов дискретизации, которая через седьмой выход подается на третий вход АЦП 18-n. Это обеспечивает синхронную временную дискретизацию всех принятых сигналов, что сохраняет их пространственную когерентность.In this case, the first coherent local oscillator 1 generates a transmitter local oscillator signal with a frequency

and the second coherent local oscillator 2 generates a receiver local oscillator signal with a frequency

that go to the inputs of the switch 4. The synchronizer 3 generates a sequence of clock pulses on the third output. Through a power divider 6, this pulse train arrives at the first inputs of the CGPS 20-n and FPGA 10-n. It arrives at the third inputs of coherent local oscillators 1 and 2. In this case, all signals and a local oscillator are formed from a single pulse sequence stabilized by a quartz resonator, which ensures the spatial and temporal coherence of CAFAR. In FPGA 10-n, the pulse train fed to input 1 is used to generate all the synchronization signals of the PPM operation. By dividing its frequency, a sequence of sampling pulses is obtained, which is fed through the seventh output to the third input of the ADC 18-n. This provides synchronous temporal discretization of all received signals, which preserves their spatial coherence.

After setting all the parameters from the processor 7 to the synchronizer 3, a command to start work is issued. At each repetition period, the synchronizer generates a transmitter start-up video pulse at the second output, which determines the temporary position and duration of the probe pulse. For the duration of the pulse, the switch 4 connects the second output of the first coherent local oscillator 1 to the input of the power divider 5, therefore, the transmitter local oscillator is fed to the first inputs of the quadrature balanced mixers 19-n. The video pulse is also fed to the second input of the FPGA 10-n and is used to synchronize the operation of all the MRPs. The FPGA transmits this pulse through the fourth output to the second input of the 11-n power amplifiers to form the envelope of the probe pulse. From the fifth FPGA output, a receiver blanking pulse is applied to the second input of the 16-n key. On the edge of the pulse through the third input-output in KGPS 20-n is given a command to start work. This leads to the simultaneous launching of the formation of the law of modulation of the probe pulse of all the MRFs, which ensures spatial coherence of the signals.

. Кроме того, на выход смесителя проходит неподавленный остаток гетеродина передатчика с частотой

, а также остаток второй боковой составляющей модуляции с частотой

.At the same time, quadrature signals with a frequency of F ₀ and the same law of angular modulation ϕ (t) are formed at the outputs of all CGPS 20-n. The amplitude and initial phase of the signals U _n , ϕ _{n are} set individually for each MRP and determine the shape and direction of the beam of the transmitting antenna. A signal is generated at the output of the quadrature balanced mixers 19-n

. In addition, the unsuppressed remainder of the transmitter local oscillator with a frequency passes to the mixer output

, as well as the remainder of the second side component of the modulation with a frequency

.

. При этом сигналы на выходе смесителя имеют частоту F₀, которая много меньше промежуточной частоты (ПЧ), что защищает тракт ПЧ от перегрузки.The generated signal from the output of the mixer 19-n is fed to the first input of the power amplifier 11-n, which ensures the formation of the envelope of the probe pulse and its amplification to the required power. Then, the probe pulse is transmitted through the circulator 12-n to the element of the antenna array 9-n and is emitted. At this time, the remainder of the emitted signal arrives at the first input of the mixer 14-n, the unsigned key 16-n, and the transmitter local oscillator with a frequency

. The signals at the output of the mixer have a frequency F ₀ , which is much less than the intermediate frequency (IF), which protects the IF path from overload.

через коммутатор 4, делитель мощности 5 и входы 1-n всех ППМ поступает на вторые входы смесителей 14-n. Принятый элементами антенны 9-n сигнал через циркулятор 12-n, преселектор 13-n, открытый ключ 16-n, малошумящий усилитель 15-n поступает на смеситель 14-n, а с его выхода - на вход фильтра промежуточной частоты 17-n. При этом преселектор обеспечивает подавление помех на частоте зеркального канала приема, а также широкополосных помех.At the end of the start-up pulse of the transmitter, the radiation of the probing signal is terminated and all the transmitters are put into receive mode. In this case, the switch 4 connects the second output of the second coherent local oscillator 2 to the input of the power divider 5. The receiver local oscillator with a frequency

through the switch 4, the power divider 5 and the inputs 1-n of all PPM goes to the second inputs of the mixers 14-n. The signal received by the antenna elements 9-n through the circulator 12-n, preselector 13-n, public key 16-n, low-noise amplifier 15-n is supplied to the mixer 14-n, and from its output to the input of the intermediate frequency filter 17-n. In this case, the preselector provides suppression of interference at the frequency of the mirror channel of reception, as well as broadband interference.

. Сигнал, излученный на частоте

, после отражения от цели, приема и преобразования частоты в смесителе имеет частоту

. Она отличается от промежуточной на 2F₀, что превышает ширину полосы пропускания фильтра промежуточной частоты 17-n. Это обеспечивает эффективное подавление мешающего сигнала.Intermediate signal frequency at the mixer output

. Signal emitted at frequency

, after reflection from the target, reception and frequency conversion in the mixer has a frequency

. It differs from the intermediate by 2F ₀ , which exceeds the bandwidth of the intermediate-frequency filter 17-n. This provides effective suppression of the interfering signal.

When the PMD is in reception mode, the stability of its microwave operation (microwave) is partially provided in several ways. The isolation of the receiver and transmitter is ensured by the use of separate mixers and a circulator. In addition, at the end of the start-up pulse of the transmitter, the 11-n power amplifier is locked, and the KGPS 20-n stops signal formation, which leads to the blocking of the quadrature balanced mixer 19-n. These measures provide not only the stability of the circuit, but also the suppression of transmitter noise at the receiver input.

The signal allocated from the filter 17-n from the target is fed to the first input of the ADC 18-n. Its third input receives a sequence of sampling pulses from the seventh output of the FPGA 10-n. In accordance with the specified parameters, the FPGA 10-n generates a video pulse at the eighth output, which determines the temporary position and duration of the receiving gate. To ensure the spatial coherence of the signals, the receiving gate of all PPMs is rigidly attached to the front of the start pulse of the transmitter. It is fed to the fourth input of the ADC 18-n and determines the set of time samples of the signal, which are transmitted from the second input-output of the ADC 18-n through the sixth output of the PPM to the third input of the central processor 7.

должна как минимум в 2 раза превышать ширину спектра принятого сигнала. Для минимизации числа отсчетов промежуточная частота

должна быть кратной частоте дискретизации. Тогда АЦП обеспечивает цифровое преобразование частоты сигнала на нулевую промежуточную частоту. Оцифрованный сигнал со второго выхода АЦП 18-n по сигнальной шине передачи цифровых данных передается на третий вход центрального процессора 7. Все остальные операции, связанные с пространственной и временной обработкой сигнала, выполняются в цифровой форме в центральном процессоре.Sampling frequency

should be at least 2 times the spectrum width of the received signal. To minimize the number of samples, the intermediate frequency

must be a multiple of the sampling rate. Then the ADC provides a digital conversion of the signal frequency to zero intermediate frequency. The digitized signal from the second output of the ADC 18-n is transmitted via the signal bus for digital data to the third input of the central processor 7. All other operations related to the spatial and temporal processing of the signal are performed digitally in the central processor.

The disadvantage of this CAFAR is the difficulty of increasing the width of the spectrum of the probe signal in order to correspondingly increase the resolution of the radar in range. The signal spectrum is limited by the bandwidth of the intermediate frequency filter, as well as by the possibilities of generating, transmitting to the central processor and digitally processing a large number of samples of received signals. With increasing signal spectrum width, it is necessary to proportionally increase the time sampling rate, which will lead to an increase in the volume of digital data. With a large number of MRPs, the rapid growth of digital data limits the possibility of increasing the spectrum width of the signals used.

The aim of the proposed invention is to expand the spectrum of probe pulses to increase range resolution without increasing the amount of digital data generated, and simultaneously increase the pulse repetition rate to expand the range of unambiguous measurement of Doppler frequency shifts.

The implementation of the goal in the proposed CAFAR is provided by the introduction of new connections for transmitting control signals from the synchronizer to both coherent local oscillators and the switch, as well as by the introduction of the possibility of operation of both coherent local oscillators in the mode of oscillation generation with chirp. In this case, the generalized local oscillator mode is implemented [2]. The LFM of the transmitter local oscillator allows the generation of a probe pulse with a large frequency deviation, providing high resolution in range. Changing the receiver local oscillator frequency according to a linear law with the same slope removes the LFM in the receiver mixer. After that, the width of the spectrum of the received signals decreases many times, which allows us not to expand the passband of the IF filter and maintain the previous sampling frequency of the received signals in the ADC. The introduction of new relationships for the transmission of control signals allows you to start the formation of LFM coherent local oscillators at the beginning of each repetition period. The successive start of the LFM of coherent local oscillators (the first for odd periods, the second for even ones) allows you to double the pulse repetition rate in order to expand the range of unambiguous measurement of Doppler frequency shifts of received signals. A separate control signal supplied to the switch allows you to implement new options for switching local oscillators.

To achieve this goal in CAFAR [1], containing the first and second coherent microwave local oscillators, the outputs of which through the first and second inputs of the switch are connected to the input of the first power divider, the outputs of which are connected to the first inputs of N transceiver modules (PPM), synchronizer, the second output of which is connected to the third inputs of all PPM, the third output of the synchronizer through the second power divider is connected to the second inputs of all PPM, N + the 1st output of the second power divider is connected to the third inputs of the first and second coherent of the local oscillators, the first input of each PPM through a series-connected quadrature balanced mixer, power amplifier, circulator and the fifth input-output of the PPM is connected to the antenna array element (AR), the number of which corresponds to the PPM number, the second output of the circuit of each PPM through a series-connected preselector, key protection, low-noise amplifier, mixer, intermediate-frequency filter, ADC, the sixth output of the PPM and the signal bus is connected to the third input of the central processor, the second input of the mixer is connected to the first PPM, the second input of each PPM is connected to the first input of the FPGA and the first input of the CGPS, the second and third outputs of which are connected to the second and third inputs of the quadrature balanced mixer, the third input of each PPM is connected to the second input of the FPGA, the third input-output of which is connected to the fourth CGPS input-output, the fourth FPGA output is connected to the second input of the power amplifier, the fifth FPGA output is connected to the second input of the protection key, the sixth FPGA output is connected to the second input of the selector, the seventh and eighth FPGA outputs are connected to the fourth and fourth inputs of the ADC, the ninth FPGA input-output through the fourth input-output of each PPM and the signal bus is connected to the second input-output of the central processor, which is connected to the first inputs and outputs of the synchronizer, the first and second coherent local oscillators, the first the input-output of the central processor provides CAFAR communication with the consumer, the possibility of generating oscillations with the LFM by the first and second coherent local oscillators is introduced, the fourth synchronizer output is connected to the third input of the switch, the sixth and sixth outputs of the synchronizer are connected to the fourth inputs of the first and second coherent local oscillators, while the central processor for the user-specified operating mode of CAFAR issues commands to set the initial frequency and slope of the LFM to the first and second coherent microwave local oscillators, commands to set the repetition period and duration of probe pulses synchronizer, commands for setting the initial phase and signal amplitude individually for each MRP, modulation parameters of the signal and the receiving gate in the FPGA of each MRP; the central processor according to known algorithms performs digital processing of the received signal; FPGA in each MRP provides tuning of the preselector bandwidth, setting the signal parameters in the CGPS; during the formation of the probe pulse, it opens the power amplifier and locks the receiver protection key, generates a sampling pulse sequence and a receiving strobe pulse to control the ADC operation.

The invention is illustrated by a further description and diagram of the proposed CAFAR.

FIG. 1 is a structural diagram of CAFAR.

In FIG. 1 adopted the following notation:

1 - The first coherent microwave local oscillator (KG1),

2 - The second coherent microwave local oscillator (KG2),

3 - Synchronizer (CHX);

4 - Switch (COM),

5 - The first power divider (DM1),

6 - The second power divider (DM2),

7 - Central processing unit (DPC),

8-n - Transceiver module with number n (PPMn),

9-n - Element of the antenna array with number n (An),

10-n - Programmable Logic Integrated Circuit (FPGA),

11-n - Power Amplifier (PA),

12-n - Circulator (C),

13-n - Preselector (PS),

14-n - Mixer (CM),

15-n - Low Noise Amplifier (LNA),

16-n - Receiver Security Key (C),

17-n - IF filter (FPF),

18-n - Analog-to-Digital Converter (ADC),

19-n - Quadrature balanced mixer (KBS),

20-n - Quadrature generator of direct digital synthesis (CGPS),

In the CAFAR shown in FIG. 1, the second output of the first coherent microwave local oscillator 1 is connected to the first input of the switch 4, the second output of the second coherent microwave local oscillator 2 is connected to the second input of the switch 4, the output of which is connected to the input of the first power divider 5, the outputs of which are connected to the first inputs of all PPM 8- n The fourth output of the synchronizer 3 is connected to the third input of the switch 4. The fifth and sixth outputs of the synchronizer 3 are connected to the fourth inputs of the coherent local oscillators 1 and 2. The second output of the synchronizer 3 through the third inputs of each PPM 8-n is connected to the second input of the FPGA 10-n. The third output of the synchronizer 3 is connected to the input of the second power divider 6, the outputs of which are connected to the second inputs of all PPM 8-n. The (N + 1) -th output of the second power divider 6 is connected to the third input of the first and second coherent local oscillators 1 and 2.

The first input of each PPM 8-n through a series-connected quadrature balanced mixer 19-n, power amplifier 11-n, circulator 12-n, preselector 13-n, protection key 16-n, low-noise amplifier 15-n, mixer 14-n, IF filter 17-n, the analog-to-digital converter 18-n is connected to the sixth output of the PPM 8-n. The first input-output of the circulator 12-n through the fifth input-output of the PPM 8-n is connected to the element AP 9-n, the number of which corresponds to the number of the PPM. The first input of each PPM 8-n is connected to the second input of the mixer 14-n. The second input of each PPM 8-n is connected to the first input of KGPS 20-n and to the first input of the FPGA 10-n. The second and third outputs of KGPS 20-n are connected to the second and third inputs of the quadrature balanced mixer 19-n. The fourth input-output of KGPS 20-n is connected to the third input-output of the FPGA 10-n. The fourth, fifth and sixth outputs of the FPGA 10-n are connected to the second inputs of the power amplifier 11-n, protection key 16-n and preselector 13-n, respectively. The seventh and eighth outputs of the FPGA 10-n are connected to the third and fourth inputs of the ADC 18-n. The second input-output of the Central processor 7 through the control bus is connected to the first inputs and outputs of the first and second coherent local oscillator 1 and 2, synchronizer 3, and through the fourth inputs and outputs of all the PPM 8-n is connected to the ninth input-output of the FPGA 10-n. The third input of the Central processor 7 through the signal bus is connected to the sixth outputs of all PPM 8-n. The first input-output of the Central processor 7 provides communication CAFAR with the consumer.

As a synchronizer 3, an EP3C55F484I7N microcircuit of the Altera Cyclone III family can be used.

As direct signal synthesis generators 20, an AD9959 chip from Analog Device can be used.

As quadrature balanced mixers 19 can be used chip NMS709 company Hittite Microwave Corp.

As low-noise amplifiers 15 can be used chip NMS564 company Hittite Microwave Corp.

As protection keys PPM 16 can be used chip NMS347 company Hittite Microwave Corp.

A microstrip bandpass filter can be used as a preselector. To ensure operation in several subbands, several switched filters can be used.

As a central processor, a computer NKShR.466535.133 manufactured by the NKBVS, Taganrog can be used.

Coherent local oscillators 1 and 2 with the mode of generating LFM oscillations can be implemented on the AD9959 chip from Analog Device, which is included in the digital phase-locked loop [3].

Switch 4 can be implemented on a Hittite Microwave Corp. HMC547LP3 chip.

The 18-n analog-to-digital converters can be performed on the AD9228 chip from Analog Device.

As the FPGA 10-n, you can use the chip EP3C25F256I7N, a family of Cyclone III company Altera.

The remaining elements of CAFAR are widely used in radar and do not require explanation for implementation.

Given the structure and technical capabilities of these microcircuits, it is possible to constructively combine four MRPs into one module, which reduces the number of expensive microcircuits used. Each module will require one EP3C25F256I7N FPGA, one AD9228 ADC chip, and two AD9959 KGPS chips. In addition, it allows the use of common cables and digital data buses for four MRPs. All this allows to reduce the cost, dimensions and weight of CAFAR.

The work of the proposed CAFAR is as follows.

Before starting work, for each burst of pulses, the central processor 7, through the second input-output via the control bus, sets the parameters of the selected CAFAR operation mode. In this case, the initial oscillation frequency F ₀ and the slope of the LFM μ of the first coherent local oscillator 1 (local oscillator for odd pulse pulses) and the second coherent local oscillator 2 (local oscillator for even pulse pulses) are established. In the synchronizer 3 are transmitted the values of the duration of the probe pulses τ _i and the period of their repetition T _p . The FPGA 10-n of each PPM 8-n transmits the individual values of the amplitude and initial phase of the signal necessary for the formation of the transmitting antenna bottom, as well as the general frequency values of the CGPS signal 20-n. If necessary, the parameters of the intrapulse modulation of the probe pulse can be transmitted, but in the generalized local oscillator mode they are not used. These parameters are transmitted through the third input-output of the FPGA 10-n to the CGPS 20-n. The FPGA 10-n also transfers the settings of the preselectors, according to which the FPGA produces control signals and transmits them to input 2 of the preselector 13-n. The FPGA 10-n also receives the parameters of the receiving gate and sampling frequency, which are used to control the operation of the ADC 18-n.

The synchronizer 3 generates a sequence of clock pulses on the third output. Through a second power divider 6, this pulse train is fed to the first inputs of the CGPS 20-n and FPGA 10-n, as well as to the third inputs of the coherent local oscillators 1 and 2. In this case, all signals and the local oscillator are generated from a single pulse sequence stabilized by a quartz resonator, which provides spatial and temporal coherence of CAFAR. In FPGA 10-n, the pulse train fed to input 1 is used to generate all the synchronization signals of the PPM operation. By dividing its frequency, a sequence of sampling pulses is obtained, which is fed through the seventh output to the third input of the ADC 18-n. This provides synchronous temporal discretization of the received signals for all MRPs, which preserves their spatial coherence.

After setting all the parameters from the processor 7 to the synchronizer 3, a command to start work is issued.

From the beginning of each odd pulse repetition period, the synchronizer 3 generates at the fifth output a positive start pulse of the coherent local oscillator 1, FIG. 3a). In this case, the coherent local oscillator 1 begins to form an oscillation with LFM. The law of change in the frequency of the first local oscillator

with a positive slope, the chirp is shown in FIG. 3e), graph 1. Here (2k-1) is the number of the odd repetition period. At the end of the next even period of repetition, the trigger pulse is reset, which causes the frequency of the local oscillator 1 to return to its original state.

показан на Фиг. 3е), график 2. Здесь 2k - номер четного периода повторения. В конце следующего, нечетного периода повторения импульс запуска сбрасывается в низкий уровень, что вызывает возврат частоты гетеродина 2 в исходное состояние.From the beginning of each even repetition period, synchronizer 3 generates at the sixth output a positive start pulse of coherent local oscillator 2, FIG. 3b). In this case, coherent local oscillator 2 begins to form an oscillation with LFM. The law of frequency change of the second local oscillator

shown in FIG. 3e), graph 2. Here 2k is the number of an even repetition period. At the end of the next, odd repetition period, the trigger pulse is reset to a low level, which causes the frequency of the local oscillator 2 to return to its original state.

At the beginning of each repetition period, synchronizer 3 generates a transmitter start pulse at the second output, FIG. 3g). It determines the duration of the probe pulses equal to τ _i and the duty cycle of the pulse train equal to 2.

The transmitter start-up pulse is fed to the second input of the FPGA 10-n of all PPMs and ensures their switching to transmission mode. In this case, the FPGA through input-output 3 starts the CGPS 20-n, it generates a radio pulse with a given amplitude and initial phase, which determine the shape and direction of the antenna beam to radiation. The signal frequency of all CGPS is the same and equal to F _ppm . The CGPS signal is fed to inputs 2 and 3 of the quadrature balanced mixer 19-n, to the input 1 of which a local oscillator selected by switch 4 is received. As a result, a probing pulse with an LFM is formed, the parameters of which are determined by the local oscillator. At the time of pulse formation, the FPGA through the fourth output opens the 11-n power amplifier. The probe pulse amplified by it through the circulator 12-n is supplied to the antenna element 9-n and is radiated into space. At the same time, the FPGA from output 5 issues a blanking pulse to the 16-n key, which locks it and protects the receiver from overload.

After the start pulse of the transmitter, the FPGA 10-n switches all the transmitters into receive mode. In this case, the FPGA disables the 20-n CGPS and locks the 11-n power amplifier, and also opens the 16-n key. When the PMD is in receive mode, the stability of its microwave part is provided in several ways. The isolation of the receiver and transmitter is ensured by the use of separate mixers and a circulator. In addition, at the end of the start-up pulse of the transmitter, the 11-n power amplifier is locked, and the KGPS 20-n stops signal formation, which leads to the blocking of the quadrature balanced mixer 19-n. These measures provide not only the stability of the circuit, but also reduce the noise of the transmitter to the required level to ensure high sensitivity of the receiver. The signals received by the antenna elements 9-n through the circulator 12-n, the preselector 13-n, the public key 16-n, the low-noise amplifier 15-n, the mixer 14-n and the IF filter 17-n are fed first to the input of the ADC 18-n.

The synchronizer 3 generates a control signal of the switch 4 at the fourth output, the timing diagram of which is shown in FIG. 3c). At the beginning of each odd repetition period, the control signal is at a high level, while the switch 4 connects the output of the first local oscillator 1 to the input of the first power divider 5. The first local oscillator through the power divider 5 is fed to the input of the quadrature balanced mixer 19-n as a local oscillator of the transmitter. The frequency of the probe pulse is

The dependence of the frequency of the probe pulse of an odd period on time is shown in FIG. 3e), graph 3. The pulses reflected from the target will arrive at the input of the receiver at the end of the next even period of repetition. The dependence of the frequency of the received pulses on time is shown in FIG. 3e), graphs 4 and 5. Both pulses correspond to targets located in a given range gate. Graph 4 corresponds to the target with the minimum range, graph 5 corresponds to the target with the maximum range. The frequency of the received pulses at the input of the receiver without taking into account the Doppler shift

where τ is the delay of the signal from the target.

At the moment of receiving the pulses, the synchronizer 3 generates a control signal of the high-level switch 4 at the fourth output, FIG. 3c). In this case, the first local oscillator through the switch 4 and the power divider 5 is fed to the second input of the mixer 14-n as the local oscillator of the receiver. The use of one oscillation as the receiver local oscillator and the transmitter local oscillator provides temporal coherence of the received pulse train.

The frequency of the signal at the mixer output is equal to the modulus of the frequency difference

. Решение уравнения имеет видThe frequencies of signals from all targets from the range gate should fall into the passband of the 17-n IF filter. In this case, for the average delay of the target signal from the range gate τ _{sr, the} signal frequency should be equal to the intermediate frequency:

. The solution to the equation has the form

For CGPS 20-n, built on the Analog Device chip AD9959, the clock frequency can be up to 500 MHz, while the frequency F _{ppm of the} quadrature CGPS signal can vary from minus 200 to 200 MHz. This gives a sufficiently wide range of frequency adjustment possibilities to ensure that the spectrum of the received signals falls into the passband of the IF filter.

FPGA 10-n at the eighth output at the end of each repetition period generates a positive pulse that determines the position of the receiving gate, FIG. 3d). The beginning of the receiving gate corresponds to the leading edge of the received pulse reflected from the target with the maximum delay. The end of the receiving gate corresponds to the trailing edge of the received pulse reflected from the target with minimal delay. When the duty cycle of the probe pulses is 2, the duty cycle of the received pulses is 3. Moreover, the duration and frequency deviation of the received pulses will be 1.5 times less than the corresponding parameters of the probe pulses. This must be taken into account when calculating the frequency deviation of the probe pulses. For example, with a frequency deviation of 150 MHz, the spectrum width of the received pulses will be 100 MHz, and a resolution of 1.5 m will be provided.

Work on an even repetition period is performed similarly with a shift of all time charts by a period. A probe pulse is formed at the beginning of an even period. The dependence of its frequency on time is shown in FIG. 3e), graph 6. Received pulses reflected from the target will arrive at the input of the receiver at the end of the next odd period, they are outside of this graph. At the end of the previous odd period, the received pulses of the even period emitted previously are shown. The dependence of their frequency on time is shown in FIG. 3e), graphs 7 and 8. During the reception and emission of pulses of an even period, the control signal of the switch at the fourth output of synchronizer 3 is low, FIG. 3c). In this case, the switch 4 connects the output of the second local oscillator 2 to the input of the first power divider 5. In this case, a second local oscillator is used as the receiver local oscillator and the transmitter local oscillator, which starts at the beginning of each even period, Fig. 3e), graph 2.

The signals allocated from the IF filter 17-n from the target are fed to the first input of the ADC 18-n. Its third input receives a sequence of sampling pulses from the seventh output of the FPGA 10-n. In accordance with the specified parameters, the FPGA 10-n generates a video pulse at the eighth output, which determines the temporary position and duration of the receiving gate, FIG. 3d). To ensure the spatial coherence of the signals, the receiving gate of all PPMs is rigidly attached to the front of the start pulse of the transmitter. It is fed to the fourth input of the ADC 18-n and determines the set of time samples of the signal, which are transmitted from the second input-output of the ADC 18-n through the sixth output of the PPM to the third input of the central processor 7. All other operations related to the spatial and temporal processing of the signal, performed digitally in a central processing unit.

In the described operation mode, the delay of the received signals exceeds the pulse repetition period. However, the signal does not provide an unambiguous range measurement. In this case, the suppression of interfering signals should be provided by the radiation pattern of the antenna, or there should be no targets with low delays. This is possible with a sufficiently high altitude. This mode can be used, for example, when observing the surface of a coherent radio altimeter system.

The proposed CAFAR can operate in the generalized local oscillator mode without doubling the pulse repetition rate, if this is not necessary. To do this, you must set the pulse repetition period in excess of the maximum signal delay from the target. In this case, you can save the mode of alternating operation of coherent local oscillators 1 and 2, and you can use only one local oscillator for all repetition periods.

If high resolution in range is not required, the proposed CAFAR can operate without the generalized local oscillator mode as well as the CAFAR described in the prototype. For this, it is necessary for both coherent local oscillators to set the zero slope of the LFM and the required different values of the initial frequency, to transmit the law of intrapulse modulation of the probe pulses to the FPGA. Synchronizer 3 instead of pulse train FIG. 3c) should output to the fourth output a sequence of start pulses of the transmitter of FIG. 3g), which he issues to the second exit.

Thus, the proposed CAFAR retains all the features and benefits realized in the prototype. The technical advantage of the proposed CAFAR is the ability to work with high resolution in range without increasing the amount of digital data generated. In addition, it is possible to work with doubling the pulse repetition rate, which allows us to double the range of uniquely measured Doppler frequency shifts.

According to the information presented in the application materials, CAFAR can be manufactured according to the existing technology known in the radio industry, based on well-known components and used in aircraft radar.

LITERATURE

1. RF patent IPC H01Q 3/00, H01Q 3/26 No. 2451373 dated 05/20/12, Active phased antenna array.

2. Shirman Y.D., Manzhos V.N. The theory and technique of processing radar information against the background of interference. - M.: Radio and Communications, 1981.

3. Manasevich V. Frequency synthesizers, theory and design, trans. from English - M.: Communication, 1979. - 384 p.

4. Vinitsky A.S. Autonomous radio systems: Textbook. manual for universities. - M .: Radio and communications, 1986. - 335 p. (FM-RV with automatic adjustment of modulation parameters, section 14.4, p. 268).

5. Mukhin V.V., Nesterov M.Yu., Makrushin A.P., Koltyshev E.E., Frolov A.Yu., Yankovsky V.T. Small-sized side-scan radar station "Bumblebee-M". Radio Altimetry - 2010: Proceedings of the Third All-Russian Scientific and Technical Conference / Under. ed. A.A. Iofina, L.I. Ponomareva. - Yekaterinburg: Fort Dialog-Iset, 2010 .-- S. 94-97.

6. US patent G01S 13/42, H01Q 3/22 No. 5351053 from 07/30/1993. Ultra-wideband radar signal processor for electronic scanning grating.

7. US Patent G01S 13/93 dated January 2, 2001. Radar device.

Claims (1)

A digital active phased antenna array containing the first and second coherent microwave local oscillators, the outputs of which are connected through the first and second inputs of the switch to the input of the first power divider, the outputs of which are connected to the first inputs of N transceiver modules (PPM), the synchronizer, the second output of which is connected with the third inputs of all the MRP, the third output of the synchronizer through the second power divider is connected to the second inputs of all the MRP, N + the 1st output of the second power divider is connected to the third inputs of the first and second Heretin local oscillators, the first input of each PPM through a series-connected quadrature balanced mixer, power amplifier, circulator and the fifth input-output of the PPM is connected to the antenna array element (AR), the number of which corresponds to the PPM number, the second output of the circuit of each PPM through a series-connected preselector, key protection, low-noise amplifier, mixer, intermediate-frequency filter, analog-to-digital converter (ADC), the sixth PPM output and signal bus connected to the third input of the central processor, the second input of the mixer is connected to the first input of the PPM, the second input of each PPM is connected to the first input of the programmable logic integrated circuit (FPGA) and the first input of the quadrature generator of direct digital synthesis (CGPS), the second and third outputs of which are connected to the second and third inputs of the quadrature balanced mixer, the third input of each PPM is connected to the second FPGA input, the third input-output of which is connected to the fourth KGPS input-output, the fourth FPGA output is connected to the second input of the power amplifier, the fifth PL output C is connected to the second input of the protection key, the sixth FPGA output is connected to the second input of the selector, the seventh and eighth FPGA outputs are connected to the third and fourth ADC inputs, the ninth FPGA input-output through the fourth input-output of each PPM and the signal bus is connected to the second input- the output of the central processor, which is connected via the same bus to the first inputs and outputs of the synchronizer, the first and second coherent local oscillators, the first input-output of the central processor provides CAAFAR communication with the consumer, characterized in that the fourth output of the synchronizer is connected to the third input of the switch, the fifth and sixth outputs of the synchronizer are connected to the fourth inputs of the first and second coherent local oscillators, while the central processor for the user-specified operating mode of the CAFAR issues commands to set the initial frequency and the slope of the linear frequency modulation in the first and second coherent microwave local oscillator, commands for setting the repetition period and duration of probe pulses to the synchronizer, commands for setting the initial phase and amplitude of the individual signal ualno for each APM modulation parameters and reception strobe in each FPGA MRP; the central processor according to known algorithms performs digital processing of the received signal; FPGA in each MRP provides tuning of the preselector bandwidth, setting the signal parameters in the CGPS; during the formation of the probe pulse, it opens the power amplifier and locks the receiver protection key, generates a sampling pulse sequence and a receiving strobe pulse to control the ADC operation.

Images