RU2564203C2 - Sealed focal node of electro-optical conversion unit - Google Patents

Abstract

FIELD: physics.

SUBSTANCE: invention relates to electro-optical systems for remote probing of an underlying surface, and particularly to on-board remote earth probing optical systems of spacecraft and can be used in on-board systems for remote probing of an underlying surface. A multichannel integrated electro-optical conversion unit comprises a focal plane node with two rows of charge-coupled photodetector arrays mounted on a base in checkered order, said arrays being electrically connected to clock supply and analogue-digital processing cells and a clock supply and video signal packet. Electrical connections are in the form of a sealed node of an analogue pre-amplification cell and clock supply filters of the charge-coupled photodetector.

EFFECT: high reliability, reduced weight and size, simple technique of assembling and adjusting the multichannel integrated electro-optical conversion unit.

5 cl, 6 dwg

Description

The invention relates to optical-electronic systems for remote sensing of the underlying surface, and in particular to on-board optical complexes for remote sensing of the Earth (ERS) of spacecraft.

The closest in technical essence to the invention is the prototype multichannel integrated optical-electronic conversion unit — the OEP block [1] shown in FIG. 1.

The numbers in figure 1 show the main nodes of the EIA block, taken as a prototype: 1 - the block cover with a light filter; 2 - charge-coupled matrix photodetectors (FPS matrix); 3 - end left wall of the casing; 4 - frame; 5 - cell analog-to-digital processing and packaging of video signals (TOS); 6 - a casing; 7 - cell clock power (TP); 8 - end right wall of the casing; 9 - base.

As can be seen from figure 1, the EIA block, taken as a prototype, contains a focal plane assembly with two rows of FPSS matrices - 2 staggered on the base — 9, sealed by the lid of the block with a light filter — 1, electrically connected to the TOC cells — 5 and TP - 7 (the inputs of which are connected to the register outputs of the FPSS matrices - 2) installed on both sides of the frame - 4 and hermetically sealed by a casing - 6 with two end walls 3 and 8 with hermetically mounted connectors on them.

The disadvantages of this block is:

- the presence of a casing - 6 with connectors hermetically mounted on its side walls 3 and 8, because such a construct complicates the assembly technology of the unit, as well as worsens reliability indicators due to the presence of sealing lines along the connectors in addition to the main ones along the casing - 6 and the cover with a light filter - 1;

- the presence of a single sealed volume both for the focal unit with FPSS matrices - 2, and for the lower part of the unit with cells TOS - 5 and TP - 6, because various impurities generated during installation and adjustment of the unit can get on the cover filter - 1 or on the FPZS - 2 matrices, which can lead to a deterioration in the target characteristics of the unit or to a loss in the performance of the matrices - 2.

The aim of the invention is to increase reliability, reducing weight and dimensions, as well as simplifying the technology of assembly and adjustment of the EIA block.

This goal is achieved by the fact that in the well-known OEP block containing a focal plane assembly with two rows of FPSS arrays installed on a staggered base and electrically connected to clock power cells (TP) and analog-to-digital processing and packaging of video signals (TOS) installed with of the two sides of the frame, electrical connections with the TP and TOS cells are made by means of a sealed node of the cell of preliminary amplification of the analog signal and filters of the clock power supply of the FPS, forming a sealed focal unit of block O EP.

In this case, the sealed node of the analog signal pre-amplification cell and FPZS clock power filters can be an analog signal pre-amplification cell and FPZS clock filters hermetically installed in the groove of the shell, the cell of preliminary amplifiers of analog signals and FPZS clock power filters can contain a flex-rigid printed circuit board (GZHPP), which has at least three flexible and two rigid parts, with two rigid and one flexible part, mounted on a rigid element And flex-rigid circuit board may further have two rigid parts, in which electrical connectors are installed, and the cell preamplifiers and filters the analog signal clock supply PDCC can be sealingly mounted in the groove base hermetic focal node.

The invention is illustrated by drawings.

The numbers in FIG. 2 show the following elements of the OEP block: 10 — cover with a light filter; 11 - matrix FPSS; 12 - side wall; 13 - sealed focal node; 14 - leaky volume of the block; 15 - base; 16 - left end wall; 17 - a Central frame for installing cells; 18 - cell clock power (TP); 19 - cells of clock power and analog-to-digital processing and packaging of video signals (TOS); 20 - lower heat sink frame; 21 - the side wall of the block; 22 - the right end wall; 23 - sealed node cell pre-amplification of the analog signal and the clock filters of the FPGA.

The numbers in figures 3-6 show the following elements of the sealed node of the cell of the pre-amplification of the analog signal and filters of the clock power supply FPSS: 24 - cell pre-amplification of the analog signal and filters of the clock power supply FPSS; 25 - shell; 26 - flexible part No. 1; 27 - hard element; 28 - hard part No. 1; 29 - flexible part No. 2; 30 - flexible part No. 3; 31 - hard part No. 2; 32 - additional hard part No. 3; 33 - electrical connectors; 34 - additional hard part No. 4.

As can be seen from the drawings, the proposed EIA block (see Fig. 2) differs from the prototype in the presence of a sealed focal node — 13 with FPSS — 11 matrices installed in it on the base of the block — 15 in two staggered rows, closed by a lid with a filter — 10 and sealed node of the pre-amplification cell of the analog signal and clock filters ФПЗС - 23, through which the matrices ФПЗС - 11 are electrically connected to cells ТП - 18 and ТСО - 19, mounted on both sides of the frame - 17, perpendicular to the heat sink frame - 20, closed from the ends of the block walls 16 and 22 with installed connectors, and on the sides - walls 12 and 21, which forms an unpressurized volume of the block - 14. Thanks to isolation from the external environment of the focal node, it was possible to reduce the number of sealing lines along the connectors in the block on the side ends of the walls 16 and 22, which increased its reliability.

The sealed node of the pre-amplification cell of the analog signal and clock filters ФПЗС - 23 is a cell of the pre-amplification of the analog signal and filters clock power ФПЗС - 24 hermetically installed in the groove of the shell - 25 (see figure 3), which is mechanically sealed to the base - 15, which made it possible to provide electrical coupling between the matrices 11 and the cells 18 and 19, without violating the tightness of the focal unit. The pre-amplification cell of the analog signal and the FPSS-24 clock power filters contains a GLCP, which has at least three flexible (26, 29, 30) and two hard (28, 31) parts fixed to a rigid element - 27 (see Fig. 4), and also has two rigid parts 33 and 35 (see Fig. 5), on which 34 electrical connectors are installed. Such a GZHP construct provides detachable electrical wireless contact between the FPZS-11 matrices with TP-18 and TOS-19 cells through electrical connectors - 34 mounted on the hard parts 28 and 31, through g Flexible cables - parts 26, 29, 30, which allowed to reduce the share of wired installation and simplify the technology of adjustment and assembly of the unit.

In addition, constructive options for the OEP block are possible, in which the pre-amplification cell of the analog signal and clock filters ФПЗС - 24 is hermetically installed in the groove of the base - 15 of the hermetic focal unit - 13 (see Fig. 6), which significantly reduces the dimensions of the OEP block .

Thus, the proposed multi-channel block of optical-electronic conversion allows you to:

- reduce dimensions and weight, as well as simplify the assembly and adjustment technology, due to the introduction of a pre-amplification analog signal cell and clock filters FPS-23 into the sealed unit construct, which made it possible to isolate the leaky volume of the unit - 14, to exclude the inconvenient casing - 6 and use easily removable walls 12 and 21;

- to reduce the proportion of wire mounting, thanks to the use of the pre-amplification cell of the analog signal and clock filters ФПЗС - 24 with additional hard parts 33 and 35 with electrical connectors installed on them - 34 to provide electrical wireless detachable contact with the cells ТП - 18 and ТСО - 19 ;

- to increase reliability by isolating the focal assembly from the external environment (sealed focal assembly - 13) and reducing the number of sealing lines along the connectors in comparison with the prototype unit.

Information sources

1. "Multichannel integrated optical-electronic conversion unit." Kuzmichev A.M., Zhevako V.V., Baklanov A.I. RU 2469368 C1, 05/04/2011.

Claims (5)

1. A multi-channel optoelectronic conversion unit containing a focal plane assembly with two rows of FPSS, matrices electrically connected to the clock power cells (TP) and analog-to-digital processing and packaging of video signals (TOS) installed on both sides staggered on the base frames, characterized in that the electrical connections with the cells TP and TOS are made through a sealed node of the cell pre-amplification of the analog signal and the clock filters FPS, forming a sealed fo cial assembly unit optoelectronic conversion (EIA). 2. The multichannel OEP block according to claim 1, characterized in that the sealed node of the pre-amplification cell of the analog signal and FPPS clock filters is a pre-amplification cell of the analog signal and FPPS clock filters, hermetically installed in the groove of the shell. 3. The multi-channel OEP block according to claim 2, characterized in that the cell of the preliminary amplifiers of analog signals and filters of the clock power supply FPS contains a flexible-rigid printed circuit board (GLCP), which has at least three flexible and two hard parts, two hard and one the flexible part is fixed to the rigid element. 4. The multi-channel OEP block according to claim 3, characterized in that the GZHPP additionally has two rigid parts on which electrical connectors are installed. 5. The multichannel OEP unit according to claim 1 or 2, characterized in that the cell of the preliminary amplifiers of analog signals and filters of the clock power supply of the FPGA is hermetically installed in the groove of the base of the sealed focal unit.

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