RU2544869C1 - METHOD OF MANUFACTURE OF PLANAR LARGE AREA pin PHOTO DIODES ON HIGH-RESISTANCE p-SILICONE - Google Patents

Abstract

FIELD: physics.SUBSTANCE: offered invention relates to technology of manufacture of semiconductor devices, in particular, to methods of manufacture of planar large area pin-photo diodes based on high-resistance silicon of p-type conductivity. The method includes preparation of a plate of source p-silicon or silicon epitaxial structure of p-p-type, formation of a mask for implantation of Pions into a working area and a security ring, two-phase implantation of Pions with the energy and the dose respectively (30÷40) keV and (3÷4)·10cmon the first and (70÷100) keV and (8÷10)·10cmat the second stage for formation of n-p transitions of working area and the security ring, implantation ofions with the energy (60÷100) keV and the dose (2÷3)·10 cmfrom the back side of the plate, two-phase post-implantation annealing at duration and temperature respectively no less than 1 hour and (570÷600)°C on the first stage and no less than 5 hours and (890÷900)°C at the second stage, protection and an enlightenment of a surface of working area and protection of the periphery of the security ring by application of SiOfilm, and annealing, initial decrease of temperature after annealing up to 300°C and application of SiOfilm at the temperatures over 300°C is made in the conditions of oxygen lack, and implantation Pandions is performed one after another in any sequence.EFFECT: optimum selected implantation doses, modes and conditions of post-implantation annealing and conditions of application of protective and lightening coating provide increase of current sensitivity of pin-photo diodes at high background flares with preservation of low level of dark currents at decrease of complexity, labour input and energy consumption of manufacture.2 cl, 1 tbl

Description

The present invention relates to a technology for the manufacture of semiconductor devices, in particular, to methods for creating planar pin photodiodes of a large area based on high-resistance (resistivity 1 ÷ 20 kΩ · cm) p-type silicon.

A known method of manufacturing planar pin-photodiodes of large area, in which the crystal is subjected to thermal oxidation after cutting from the plate, then, using the method of photolithography on the end surfaces and the back of the crystal, the oxide is etched and boron diffusion is carried out to form oxide surfaces to create p ⁺ regions , then a second thermal oxidation of the crystal is carried out, using photolithography, “windows” are etched on the working side, into which, to form the working area and surrounding The protective ring (OK) of the n ⁺ type surrounding it is diffused with phosphorus, then photolithography and opening of the contact windows, deposition of metal and the formation of the contact system pattern on the working area and OK are performed (see A. A. Ascherov et al. Reliability of silicon pin photodiodes for dark current. J. Technology and design in electronic equipment, 1999, No. 1, p. 35-38). This method allows you to create high-planar planar pin-photodiodes of a large area, but it is extremely complex, labor-energy-and material-intensive.

с энергией 100 кэВ и дозой 2·10¹⁵ см^-3 для формирования одновременно геттерирующей области и омического контакта p⁺-p-типа к базе и проводят второй постимплантационный отжиг в атмосфере осушенного азота при температуре 900°C в течение 0,5 часа, после чего осуществляют низкодозовое легирование периферии n⁺-p перехода бором с последующей имплантацией этой области ионами N₂ ⁺с энергией 100 кэВ и дозой 6 10¹⁶ см^-2 (см. В.П. Астахов и др. О возможности применения ионной имплантации при производстве pin-фотодиодов на кремнии. Ж. Прикладная физика, 6, 1999, с.26-31). Однако такой способ является также чрезвычайно сложным, трудоемким, энерго- и материалозатратным из-за необходимости дополнительно проводить низкодозовое легирование бором, формировать локальную маску, стойкую к имплантации больших доз ионов $$N_2^{+}$$

при больших токах, и проводить длительную (в течение 4-10 часов) имплантацию этих ионов. Кроме того, этот способ не позволяет получать pin-фотодиоды большой площади, работающие при повышенных фоновых засветках, например, от солнца или других источников излучения, из-за резкого снижения токовой чувствительности при появлении и увеличении фонового тока, которое обусловлено высоким уровнем слоевого сопротивления n⁺-области.Known closest in technical essence to the proposed method for the manufacture of planar pin photodiodes of large area on wafers of high resistance p-silicon, in which to form an n ⁺ -p junction of the working area, two-stage implantation of P ⁺ ions with an energy of 40 keV and a dose of 1 · 10 ^{15 is} performed cm ^-2 at the first and an energy of 80 keV and a dose of 2 · 10 ⁵ cm ^-2 at the second stage and postimplantation two-stage annealing in the atmosphere of dried nitrogen at a temperature of 600 ° C for 0.5 hours at the first and a temperature of 900 ° C for 0 , 5 hours in the second stage, back side plates implanted ions $$B{F}_2^{+}$$

with an energy of 100 keV and a dose of 2 · 10 ¹⁵ cm ^-3 to simultaneously form a gettering region and an ohmic p ⁺ -p type contact to the base, and conduct a second post-implantation annealing in an atmosphere of dried nitrogen at a temperature of 900 ° C for 0.5 hour, after which low-dose doping of the periphery of the n ⁺ -p junction with boron is carried out, followed by implantation of this region with N ₂ ⁺ ions with an energy of 100 keV and a dose of 6 10 ¹⁶ cm ^-2 (see V.P. Astakhov et al. On the possibility of using ion implantation with production of pin photodiodes on silicon (J. Applied Physics, 6, 1999, pp. 26-31). However, this method is also extremely complex, time-consuming, energy- and material-intensive due to the need to additionally carry out low-dose doping with boron, to form a local mask resistant to implantation of large doses of ions $$N_2^{+}$$

at high currents, and carry out a long (within 4-10 hours) implantation of these ions. In addition, this method does not allow to obtain large-area pin photodiodes operating with increased background illumination, for example, from the sun or other radiation sources, due to a sharp decrease in current sensitivity when the background current appears and increases, due to the high level of layer resistance n ⁺ -regions.

The problem to be solved when using the proposed method is the ability to create planar pin-photodiodes of a large area while reducing complexity, complexity and energy consumption. The technical result is to increase the current sensitivity of pin photodiodes at high background illumination while maintaining a low level of dark currents.

с обратной стороны пластины для создания одновременно области геттера и омического контакта к базе, двухстадийный постимплантационный отжиг, защиту и просветление поверхности рабочей области вместе с защитой периферии охранного кольца и создание контактов по периферии рабочей области и на охранном кольце, новым является то, что имплантацию ионов P⁺ проводят при энергии и дозе соответственно (30÷40) кэВ и (3÷4)·10¹⁵ см^-2 на первой и (70÷100) кэВ и (8÷10)·10¹⁵ см^-2 на второй стадии, имплантацию ионов $$B{F}_2^{+}$$

производят при энергии и дозе (60÷100) кэВ и (2÷3)·10¹⁵ см^-2, постимплантационный отжиг проводят при продолжительности и температуре соответственно не менее 1 часа и (570÷600)°C на первой и не менее 5 часов и (890÷900)°C на второй стадии, защиту и просветление поверхности рабочей области и защиту периферии охранного кольца осуществляют нанесением пленки SiO₂, причем отжиг, начальное снижение температуры после отжига до 300°C и нанесение пленки SiO₂ при температурах выше 300°C производят в условиях отсутствия кислорода, а имплантацию ионов P⁺ и $$B{F}_2^{+}$$

проводят одну за другой в любой последовательности.The specified technical result is achieved by the fact that in the method of manufacturing planar pin photodiodes on high-resistance p-silicon, which includes preparing a plate of the original p-silicon or silicon epitaxial p ⁺ -p-type structure, the formation of a mask for implantation of P ⁺ ions in the working area and security ring, two-stage implantation of P ⁺ c ions for the formation of n ⁺ -p transitions of the working area and the guard ring, ion implantation $$B{F}_2^{+}$$

on the reverse side of the plate to simultaneously create a getter and ohmic contact to the base, two-stage post-implantation annealing, protection and enlightenment of the surface of the working area together with protection of the periphery of the guard ring and the creation of contacts around the periphery of the work region and on the guard ring, the new is that ion implantation P ^{+ is} carried out at an energy and dose of respectively (30 ÷ 40) keV and (3 ÷ 4) · 10 ¹⁵ cm ^-2 in the first and (70 ÷ 100) keV and (8 ÷ 10) · 10 ¹⁵ cm ^-2 in the second stage implantation of ions $$B{F}_2^{+}$$

produced at an energy and dose of (60 ÷ 100) keV and (2 ÷ 3) · 10 ¹⁵ cm ^-2 , post-implantation annealing is carried out at a duration and temperature of at least 1 hour and (570 ÷ 600) ° C at the first and at least 5 hours and (890 ÷ 900) ° C in the second stage, the protection and enlightenment of the surface of the working area and the protection of the periphery of the guard ring are carried out by applying a SiO ₂ film, with annealing, an initial temperature decrease after annealing to 300 ° C and applying a SiO ₂ film at temperatures above 300 ° C is carried out in the absence of oxygen, and the implantation of P ⁺ and $$B{F}_2^{+}$$

spend one after another in any sequence.

In a particular case, the implantation of P ⁺ ions to create a working area and a guard ring is performed simultaneously.

The implantation of P ⁺ ions in a two-stage mode at an ion energy of (30 ÷ 40) keV and a dose of (3 ÷ 4) · 10 ¹⁵ cm ^-2 at the first and ion energy (70 ÷ 100) keV and a dose of (8 ÷ 10) · 10 ¹⁵ cm ^-2 at the second stage, followed by two-stage annealing with a temperature of (570 ÷ 600) ° C and a duration of at least 1 hour at the first and a temperature of (890 ÷ 900) ° C and a duration of at least 5 hours at the second stage in the absence of oxygen at Annealing itself and an initial decrease in temperature to 300 ° C allows one to obtain planar n ⁺ -p transitions of the working area and OK with a high-quality metallurgical boundary and surface in the region of planar boundaries of n ⁺ -p junctions, providing a low level of dark current, and an n ⁺ -layer, having a high conductivity, capable of ensuring the operability of a pin photodiode with background illumination of at least 20 mW / cm ² at an operating voltage of 20 V or higher .

This is explained by the following.

When creating planar pin photodiodes of a large area on high-resistance p-silicon, it is necessary to form a pre-n ⁺ -p junction of the working region with high conductivity while ensuring a low level of dark currents of n ⁺ -p junction junctions and OK. The conductivity level of the n ⁺ layer should be the higher, the higher the level of background illumination, such that at the background current the voltage drop across the series resistance of this layer in the circuit “contact to the n ⁺ layer - n ⁺ layer - n ⁺ -p junction of the working area — photodiode base — ohmic contact to the base ”was minimal, not noticeably decreasing the displacement at the n ⁺ -p junction at the operating voltage.

The conductivity level of the n ⁺ layer increases with increasing doping dose and layer thickness. An increase in the dose at the same layer thickness gives a weak effect due to a decrease in the mobility of charge carriers with an increase in the concentration of doping atoms. In this case, an increase in the concentration of doping atoms increases the likelihood of the formation of dislocations during postimplantation annealing, shunting the n ⁺ -p junction and increasing the dark current. Thus, a high but optimal dose of the doping of the alloying atoms is necessary, which is conveniently ensured by implantation in the two-stage mode, at which the concentration dangerous at the dislocation point of view at the maxima of the distribution of the implanted atoms is reduced compared with the single-stage mode and sufficiently high, but not higher than 900 ° C post-implantation annealing temperature, safe for the structure of the initial crystal. In this case, a sufficient thickness of the layer (d) will be provided by the duration of annealing (t) according to the formula:

where D is the diffusion coefficient of impurity atoms at the annealing temperature.

Thus, an increase in the doses of P ⁺ ion implantation above the specified limits leads to an increase in the level of dark currents due to the onset of growth of the dislocation during annealing, and their decrease beyond the indicated lower limits leads to a decrease in the level of safe background flares due to a decrease in the conductivity of the n ⁺ layer . The claimed energy range of P ⁺ ions is also optimal: leaving 30 and 40 keV in the first stage either shifts the maximum of the distribution profile of the implanted atoms to the surface too much, or to the second maximum, due to the energy of the second stage ions; going beyond (70 ÷ 100) keV in the second stage, respectively, brings the maxima closer together or leads to excessive defectiveness. In all these cases, the consequence is excessive defectiveness of the formed n ⁺ layer and n ⁺ -p junction, which results in excess dark currents and reduced backgroundless and background sensitivity. A decrease in temperature and duration of the first stage of annealing below the indicated limit leads to an increase in dark current due to insufficient annealing of the amorphous layer, and the second stage leads to a decrease in sensitivity during background illumination due to a decrease in the conductivity of the n ⁺ layer. An overestimation of the limiting temperature of the first stage increases the likelihood of the formation of a polycrystalline phase during recrystallization, and the second stimulates the onset of degradation of the bulk properties of the crystal.

, выполняющий двойную функцию: геттера и омического контакта, играет важную роль при отжиге, собирая подвижные дефекты из области базы и за счет этого увеличивая время жизни неосновных носителей заряда и уменьшая скорость их генерации. Это свойство геттерирующего слоя приводит к увеличению токовой чувствительности и уменьшению темнового тока фотодиода. Доза имплантации ионов $$B{F}_2^{+}$$

, составляющая (2÷3)·10¹⁵ см^-2 ,соответствует оптимальной дефектности геттерирующего слоя при энергии ионов не ниже 60 кэВ. Геттерирующие свойства резко ослабляются при энергии ионов ниже 60 кэВ и дозах за пределами указанного диапазона, приводя к снижению токовой чувствительности и увеличению темнового тока.Ion Implantation Layer $$B{F}_2^{+}$$

performing a dual function: getter and ohmic contact, plays an important role in annealing, collecting mobile defects from the base region and thereby increasing the lifetime of minority charge carriers and reducing the rate of their generation. This property of the gettering layer leads to an increase in current sensitivity and a decrease in the dark current of the photodiode. Ion implantation dose $$B{F}_2^{+}$$

, component (2 ÷ 3) · 10 ¹⁵ cm ^-2 , corresponds to the optimal defectiveness of the gettering layer at an ion energy of at least 60 keV. The gettering properties are sharply weakened at ion energies below 60 keV and doses outside the specified range, leading to a decrease in current sensitivity and an increase in dark current.

The reduction of the dark current is facilitated by the fact that post-implantation annealing followed by a decrease in temperature and surface protection with its simultaneous bleaching by applying a layer of SiO _{2 are} carried out in the absence of oxygen at temperatures above 300 ° C. The need to fulfill this condition is explained by the fact that at temperatures above 300 ° C in the presence of oxygen, a positive built-in charge is actively formed at the Si-SiO ₂ interface _of such a magnitude that a n-type surface channel is formed on the p-base, due to which the dark current rises sharply. This can occur during annealing due to the presence of a natural surface SiO ₂ film, even if annealing is performed in a neutral atmosphere of dried and oxygen-free nitrogen, but when cooled, this atmosphere is controlled only to temperatures above 300 ° C, for example, to 500 ° C or 400 ° C below which air begins to come into contact with samples in the furnace. If cooling, like the annealing itself, is carried out in an atmosphere of dried and purified nitrogen up to 300 ° C or lower, then the formation of a surface channel does not occur. The channel does not form in the case of applying a protective and antireflection layer of SiO ₂ , for example, in such a way as the decomposition of molecules of volatile organometallic compounds containing oxygen in argon plasma, if the process temperature also does not exceed 300 ° C. At higher temperatures of this process, the built-in charge increases sharply and a channel forms. In the case of using such methods of deposition of SiO ₂ layers in which free ions, atoms or oxygen molecules, for example, sputtering of quartz by a beam of electrons or neutral particles, are absent in the plate location zone, there is no limitation on the process temperature.

производят в любой последовательности, два постимплантационных процесса отжига после имплантации каждого типа ионов (P⁺ и $$B{F}_2^{+}$$

) заменены на один, который проводится после имплантации обоих типов ионов, при этом формирование маски и низкодозовое легирование периферии n⁺-p переходов бором с последующей высокодозовой имплантацией ионов $$N_2^{+}$$

исключают, заменив эти процессы низкотемпературным нанесением слоя SiO₂, например, либо одним из хорошо отработанных процессов разложения молекул гексаметилдисилаксана или тетраэтоксисилана в плазме аргона при температуре ниже 300°C, либо другим методом без ограничения температуры процессов, если при их проведении у поверхности пластин отсутствует кислород. В частном случае выполнения это обеспечивается также тем, что имплантацию ионов P⁺ для создания рабочей области и ОК производят одновременно.Simplification of technology, reduction of labor intensity, energy and material costs are achieved in the proposal due to the fact that implantation of P ⁺ ions and $$B{F}_2^{+}$$

produce in any sequence, two post-implantation annealing processes after implantation of each type of ion (P ⁺ and $$B{F}_2^{+}$$

) replaced by one that is performed after implantation of both types of ions, with the formation of a mask and low-dose doping of the periphery of n ⁺ -p junctions with boron followed by high-dose implantation of ions $$N_2^{+}$$

exclude by replacing these processes with low-temperature deposition of a SiO ₂ layer, for example, either with one of the well-established processes for the decomposition of hexamethyldisilaxane or tetraethoxysilane molecules in argon plasma at temperatures below 300 ° C, or by another method without limiting the temperature of the processes, if there are no processes at the surface of the plates oxygen. In the particular case of execution, this is also ensured by the fact that the implantation of P ⁺ ions to create a working area and OK is performed simultaneously.

According to the proposed method and with deviations from the stated technological parameters, a batch of pin photodiodes was made of 30 pieces of polished silicon wafers with a specific resistance of (8 ÷ 12) kΩ cm with a diameter of 60 mm and a thickness of (0.25 ÷ 0.27) mm. The number of photodiodes on each plate is 5 pieces. In this case, a ~ 0.5 μm thick SiO ₂ protective and antireflective layer was deposited by low-temperature (at 250 ° C) decomposition of hexamethyldisilaxane molecules in argon plasma, in which ions, atoms and oxygen molecules were present in the discharge chamber. Postimplantation annealing was carried out in an atmosphere of dried and oxygen-free nitrogen, including cooling to a predetermined temperature, below which atmospheric oxygen entered the furnace atmosphere. Metal contacts in the form of rings on the working area and OK were created by thermal spraying of the Cr + Au system, followed by annealing in the atmosphere of dried and purified nitrogen at a temperature of 300 ° C.

и темнового тока рабочей области при параллельном подключении ОК (I_T). Длительность импульсов засветки составляла 100 нс при мощности 10^-6 Вт. Измеренные значения вместе с условиями изготовления каждой группы пластин представлены в таблице.A batch of 3 plates was also manufactured using the prototype method. In total, for each technology variant, 3 plates were manufactured, that is, 15 pin photodiodes, on which, at an operating voltage of 20 V and a temperature of 20 C, the average values of the zero-voltage pulse current sensitivity at a working wavelength of 0.9 μm were measured (S _0.9 ) , pulse current sensitivity at a wavelength of 0.9 μm with a constant background flow from source A of 20 mW / cm ² $$(S_{0,9}^f)$$

and the dark current of the workspace with parallel connection OK (I _T ). The duration of the illumination pulses was 100 ns at a power of 10 ^-6 watts. The measured values along with the manufacturing conditions of each group of plates are presented in the table.

From the table it follows that the proposal ensures the receipt of the claimed technical solution.

Table No. p / p Manufacturing Features S _0.9 , (A / W)

(А/Вт) $$S_{0,9}^f$$

(A / W) I _T , (μA) one 2 3 four 5 one prototype 0.43 0,07 0.6 2 on offer with implantation sequence 2.1 first P ⁺ ions then $$B{F}_2^{+}$$

0.46 0.35 0.65 2.2 ions first $$B{F}_2^{+}$$

then P ⁺ 0.43 0.32 0.72 3 on the retreat proposal: 3.1 1.5 times lower doses of implantation of P ⁺ ions at each stage compared to the stated lower limit 0.42 0.22 0.81 3.2 1.5 times higher than the dose of implantation of P ⁺ ions at each stage compared with the stated upper limit 0.47 0.31 7.6 3.3 ion energy $$B{F}_2^{+}$$

20 keV below acceptable limit 0.37 0.23 4.4 3.4 the duration of the first stage of annealing is reduced by 0.5 hours 0.41 0.33 3.8

one 2 3 four 5 3.5 the duration of the second stage of annealing is reduced by 1 hour 0.47 0.26 0.77 3.6 annealing and cooling after annealing in dry nitrogen to 350 C 0.45 0.34 23 3.7 application of a layer of SiO ₂ at a temperature of 330 C 0.44 0.34 32 3.8

, либо дозы ионов $$B{F}_2^{+}$$

going beyond the declared limits by (30-50)% of either the energy of P ⁺ ions or $$B{F}_2^{+}$$

or doses of ions $$B{F}_2^{+}$$

0.39-0.42 0.21-0.28 1.76-4.5

The measured values obtained by deviating from the proposal and highlighted in the table correspond to the above explanations, namely:

- underestimation of the dose of P ⁺ ion implantation (clause 3.1) or the duration of the high-temperature annealing stage (clause 3.5) leads to a noticeable decrease in the background pulsed current sensitivity due to a decrease in the conductivity of the n ⁺ layer;

(п.3.3) уменьшает бесфоновую и фоновую импульсные токовые чувствительности вместе с увеличением темнового тока из-за ослабления геттерирующей активности имплантированного слоя;- underestimation of ion energy $$B{F}_2^{+}$$

(Clause 3.3) reduces the backgroundless and background pulsed current sensitivities together with an increase in the dark current due to the weakening of the gettering activity of the implanted layer;

- an overestimation of the dose of implantation of P ⁺ ions at both stages (Section 3.2) and an underestimation of the duration of the first stage of annealing (Section 3.4) lead to an increase in dark current, respectively, due to the generation of a dislocation in n ⁺ -p junctions and insufficient efficiency of annealing of the amorphous layer;

- an increase in the temperature at which oxygen is allowed in the furnace reactor during annealing and cooling after annealing (Section 3.6) and during the deposition of a SiO ₂ layer (Section 3.7) leads to a sharp increase in the dark current due to a sharp increase in the positive built-in charge by the boundary of Si-SiO ₂ and the formation of the surface of the channels;

, либо дозы ионов $$B{F}_2^{+}$$

(п.3.8) приводит к заметным уменьшению фоновой импульсной токовой чувствительности и возрастанию темнового тока за счет увеличения степени дефектности n⁺-слоя.- going beyond the declared limits of either the energy of ions P ⁺ or $$B{F}_2^{+}$$

or doses of ions $$B{F}_2^{+}$$

(Sec. 3.8) leads to a noticeable decrease in the background pulsed current sensitivity and an increase in the dark current due to an increase in the degree of imperfection of the n ⁺ layer.

Thus, the fulfillment of the conditions of the proposed method provides the maximum level of background pulsed current sensitivity and the minimum level of dark current of pin-photodiodes based on high-resistance p-silicon while simplifying the technology, reducing the complexity, power consumption and material consumption.

Claims (2)

1. A method of manufacturing planar pin-photodiodes of large area on high-resistance p-silicon, including preparing a plate of the original p-silicon or silicon epitaxial p ⁺ -p-type structure, the formation of a mask for implantation of P ⁺ ions in the work area and the guard ring, two-stage implantation P ⁺ ions for the formation of n ⁺ -p transitions of the workspace and the guard ring, ion implantation

on the reverse side of the plate to simultaneously create a getter and ohmic contact to the base, two-stage post-implantation annealing, protection and enlightenment of the surface of the working area together with protection of the periphery of the guard ring and the creation of contacts along the periphery of the workspace and on the guard ring, characterized in that the implantation of P ions ⁺ carried out at an energy and dose, respectively (30 ÷ 40) keV and (3 ÷ 4) · 10 ¹⁵ cm ^-2 in the first and (70 ÷ 100) keV and (8 ÷ 10) · 10 ¹⁵ cm ^-2 in the second stage, ion implantation

produced at an energy of (60 ÷ 100) keV and a dose of (2 ÷ 3) · 10 ¹⁵ cm ^-2 , post-implantation annealing is carried out at a duration and temperature of at least 1 hour and (570 ÷ 600) ° C at the first and at least 5 hours and (890 ÷ 900) ° C in the second stage, the protection and enlightenment of the surface of the working area and the protection of the periphery of the guard ring are carried out by applying a SiO ₂ film, annealing, initial temperature reduction after annealing to 300 ° C, and applying an SiO ₂ film at temperatures above 300 ° C is performed in the absence of oxygen, and the implantation of P ⁺ and

spend one after another in any sequence. 2. A method of manufacturing a planar large-area planar pin-photodiodes on high-resistance p-silicon according to claim 1, characterized in that the implantation of P ⁺ ions to create a working area and a guard ring is performed simultaneously.