RU2435295C2 - Method to build non-blocked self-routed expanded commutator - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: method includes stages, at which an input and an output cascades of commutators are added to a ridge cascade made of N basic commutators and connected to the ridge cascade in accordance with the determined table of connections, at the same time the input and output cascades are accordingly R demultiplexors and R multiplexors, connection of which is carried out using the basic table of connections T selected to build the expanded commutator, which sets the connection of the input cascade to the inputs of the commutator cascade, and connection of this cascade outputs to the output cascades of multiplexors.

EFFECT: possibility to grow circuits of commutators of the specified topology with preservation of self-routing and non-locking properties.

6 cl, 8 dwg, 5 tbl

Description

The invention relates to the construction of switch networks, mainly for multiprocessor systems, where fast parallel information transfer between digital devices is required. Switch networks obtained by the proposed method can also be used in real-time systems, where a minimum and predictable time of information transfer between nodes is required. Self-routing non-blocking switches are distinguished by the fact that during interchange exchanges, there is no intersection of information transmission routes requiring interruption of the exchange, and in addition, the route is laid in the process of promoting information at the level of switch elements without the participation of a centralized control device.

The necessity of combining switches into a network, or building an extended switch, is explained by the large (significantly exceeding the number of inputs of manufactured integrated circuits) number of subscribers involved in the exchange of information in multiprocessor systems. For example, assemblies of non-blocking self-routing switches with the topology of a two-dimensional generalized hypercube are known (Scott S. .. Abts D., Kirn J., and Dally W. The black widow high-radix Clos network // Proc. 33 ^rd Intern. Symp. Comp. Arch. (ISCA'2006). 2006. // http://cva.stanford.edu/people/jikl2/isca06.pdf.), With the multi-ring topology (Podlazov BC Non-blocking conditions for multi-ring commutators and generalized hypercubes on arbitrary permutations. / / Automation and Telemechanics. 2001. No. 8. - P.118-126), with the topology of incomplete balanced block diagrams (UBS) (Podlazov BC, Sokolov VV Circuitry of single-stage switches b large dimension // Sensors and systems. 2006. No. 9. S.12-17). Structural diagrams of these switches are shown in figures 1-3. All of them consist of an input cascade of demultiplexers (represented by the bottom row of triangles in the diagram), a spinal cascade of switches (shown by a row of rectangles in the diagram) and an output cascade of multiplexers (represented by the top row of triangles in the diagram) and differ in the type of cascade connection. The list of connections between cascade devices is specified by the connection table T _b .

Such a one-level expansion of the switch inputs, when ready-made integrated circuits are used as basic elements, is complicated by the fact that these products have a limited number of inputs.

There is a method for technically unlimited expansion of the number of inputs of a switch network, proposed by Klose, when switch networks can also be used as basic switches. In addition, the switch, constructed in such a hierarchical way, is simpler than a single-level switch with the same number of inputs (V. Benesh. Mathematical foundations of the theory of telephone messages. // M .: Communication. 1968. P.83-150., Bogdanov A.V. . and others. Architecture and topology of multiprocessor computing systems. // M.: Internet University of Information Technologies - INTUIT.ru. 2004. Lectures No. 9, No. 10).

Clos switch, FIG. 4, can be constructed as an alternative to a rectangular switch with (r × m) inputs and (r × m) outputs. It is formed from three stages of switches: r switches (m × m) in the input stage, r switches (m × m) in the output and m intermediate switches (r × r). The cascade join table is described as follows:

- the jth output of the i-th switch of the input stage is connected to the i-th input of the j-th intermediate switch;

- the jth input of the k-th switch of the output stage is connected to the k-th output of the j-th intermediate switch.

The advantage of this method is the possibility at the first application to obtain a switch from ready-made integrated circuits, and then use the constructed switch as a base for further expansion of inputs.

The main disadvantage of the method described in the prototype is that as a result of assembling the extended switch from smaller non-blocking self-routing switches, either a blocked self-routing or non-blocking non-self-routing (tunable) switch is obtained. This method also has a limitation in that it contains a single connection table and switches with different topologies cannot be obtained.

The ability to build switches of non-blocking self-routing switches of different topologies is very important, since in addition to the main effect of non-blocking and self-routing, they have additional functionality. Having a different topology, each of the above switches has a primary field of application: switches with the topology of a two-dimensional generalized hypercube, Fig. 5, when placing the assembly of switches on the board; switches with multi-ring topology, Fig.6, when assembling distributed switches, for example, in a rack in the conditions of limited space for laying cables; and switches with UBS topology require a minimum area for wiring when placing the switch on a VLSI chip. When assembling the switches of the latter type, it is also possible to set the number of parallel routes for each pair of subscribers.

An object of the invention is the creation of a universal way to build up switch networks of a given topology while maintaining the properties of self-routing and non-blocking.

The technical result of the invention is a new way to build self-routing non-blocking switch networks with the topology defined by the base connection tables. A variety of topologies provides additional convenience for different designs of switches.

The technical result is achieved by the fact that a new method is proposed for constructing a non-blocking self-routing extended switch R × R from non-blocking self-routing basic switches K × K (K <R), which consists in adding an input and an output cascade consisting of N basic switches cascades of switches connected to the spinal cascade in accordance with a specific connection table, characterized in that R demultiplex is used respectively as input and output cascades orov 1 × m and R m × 1 multiplexers; Connection demultiplexers and multiplexers to the chine cascade produced using selected to construct the base table extended commutator compound T _b unlockable samomarshrutiziruemogo switch N _b × N _b, defining the connection of the input stage N _b demultiplexers 1 × m _b to inputs of stage M _b switch k _b × k _b and the outputs of this stage to the output stages N _{b of} m _b × 1 multiplexers, and subject to the conditions KN = Rm, K = hk _b , R = hN _b , N = M _b , m = m _b ; the connection of demultiplexers and multiplexers to the spinal cascade is as follows: the first k _b inputs (outputs) of all N base switches are connected to the first N _b of R demultiplexers (multiplexers) exactly in accordance with T _b , the following k _b inputs (outputs) of all N small switches connected to N _b follows from R demultiplexers (multiplexers) according to T _b, wherein all the multiplexers and demultiplexers numbers increased by N _b and so on, for increasing the next group of k _b inputs (outputs) of base to N mmutatorov room demultiplexers (multiplexers) to N _b in the previous step a corrected table T _b, until the last divorced h-th group k _b inputs (outputs) of all N switches low for the last N _b from R demultiplexers (multiplexers). To build a non-blocking self-routing extended switch R × R with the topology of incomplete balanced block diagrams (UBS), in which the value of N _b = m _b (m _b -1) / σ + 1 and M _b = N _b m _b / k _b , from non-blocking self-routing base switches K × K (K <R), use the base connection table T _b obtained from the table describing the incomplete balanced block diagram B (N, M, m, k, σ) (Hall M. Combinatorics // Chapters 10-12. Mir, Moscow, 1970, 424 pp.), By replacing M blocks of the block diagram with M _b switches k _b × k _b and N elements of the block diagram with N _b demultiplexers 1 × m _{b of the} input stage and N _b multiplexers m _b × 1 output stage. To build a nonblocking self-routing extended R × R switch with a multi-ring topology, in which the value N _b = M _b = m ² , k _b = m _b from non-blocking self-routing small K × K switches (K <R), use the base connection table T _b for a single-cycle multi-ring, obtained as follows: each of the N _b nodes of a single-cycle multi-ring consists of a 1 × m _b demultiplexer, a k _b × k _b commutator, and an m _b × 1 multiplexer; for each node, one output of the demultiplexer is connected to the input of the switch of the same node, the rest of the outputs are routed to the inputs of the switches of the other nodes according to the topology of a single-cycle multi-ring, one input of the multiplexer is connected to the output of the switch of the same node, the remaining inputs are connected to the outputs of the switches of the other nodes, respectively, of the topology of a single-cycle multi-ring . To build a nonblocking self-routing extended switch R × R with the generalized hypercube topology in which the value N _b = M _b = m ² , k _b = m _b from non-blocking self-routing small K × K switches (K <R), use the base connection table T _b for a single-cycle generalized hypercube obtained as follows: all the inputs of the switches k _b × k _{b of} each row of the switch array m _b × m _b with the same numbers are divided into a demultiplexer with the same number of k _b demultiplexers 1 × m _b , all with the same numbers outputs switch s k _b × k _{b of} each column of the matrix of switches m _b × m _{b are} divided into a multiplexer with the same number of k _b multiplexers m _b × 1. To construct a non-blocking self-routing extended switch with a topology of UBS with R duplex inputs from non-blocking self-routing basic switches with K duplex inputs (K <R), a spinal cascade of N switches with K duplex inputs and R duplex 1 × m duplex multiplexers is used; connection of demultiplexers-multiplexers to the spinal cascade is carried out using the base table of connection T _b selected for building a large switch, a nonblocking self-routing switch with a topology of UBS with N _b duplex inputs, which specifies the connection of the input cascade N _{b of} duplex demultiplexers 1 × m _b to the inputs of the cascade _b switches with k _b duplex inputs. When using basic switches that only receive their packets, in the input stage instead of demultiplexers simple signal amplifiers are used, and in the case of using the constructed switch only for permutation switching, instead of multiplexers in the output stage, OR circuits are used. With multi-step (unlimited) expansion of the switch inputs at each expansion step, the extended switch obtained in the previous step is used as the basic switch, while the necessary basic connection table is used to expand the topological capabilities of the constructed switch at each new expansion step.

Figure 1 shows the structure of a non-blocking self-routing switch with the topology of a two-dimensional generalized hypercube.

Figure 2 shows the structure of a non-blocking self-routing switch with the topology of a single-cycle multi-ring.

Figure 3 shows the structure of a non-blocking self-routing switch with the topology of incomplete balanced block diagrams.

Figure 4 shows the structure of the switch Clos.

Figures 5 and 6 show topological schemes of a two-dimensional generalized hypercube and multi-ring.

Figure 7 shows the structure of a non-blocking self-routing duplex switch with the topology of incomplete balanced block diagrams.

On Fig is a diagram of the switch 8 × 8, illustrating the steps of constructing the switches of the proposed method.

Tables 1-5 show examples of connection tables used in the construction of the switches of the proposed method.

The method is based on multiple (h-fold) use of the selected base connection table T _b from a plurality of tables defining non-blocking self-routing switches of different topologies.

The table of connections T _b for the switch with the topology of the UBS shown in figure 3, are presented in table 1.

Table 1 Switches Switch Input Ports Switch Output Ports one one 7 5 one 7 5 2 2 one 6 2 one 6 3 3 2 7 3 2 7 four four 3 one four 3 one 5 5 four 2 5 four 2 6 6 5 3 6 5 3 7 7 6 four 7 6 four

In the rows of tables T _{b, the} numbers of the switches, in the columns of the left and right parts of the table, respectively, the inputs and outputs of the switches, and in each cell of the left and right parts of the table, the numbers of the source subscribers and the numbers of the receiver-subscribers connected through the corresponding demultiplexers and multiplexers are entered respectively. Base tables define the topology of switches N _b × N _b, collected on switches M _b k _b × k _b to 1 demultiplexers N _b × m _b N _b and multiplexers m _b × 1. In the case of using elements with duplex inputs, the table T _b degenerates into a table in which the left and right parts coincide, and the numbers of duplex subscribers connected through the corresponding bidirectional multiplexer-multiplexers are entered in the cells. An example of such a table is given in Table 2, and the corresponding bi-directional switch structure corresponding to an incomplete balanced block diagram (UBS) B (7, 7, 3, 3, 1) (Hall M. Combinatorics // Chapters 10-12. Mir, M., 1970, 424 C.) is presented in Fig.7. As you can see, such a switch has two stages, while the first stage transfers data both from subscribers to the switches of the spinal cascade, and vice versa.

table 2 Switches Duplex Switch Ports one one 7 5 2 2 one 6 3 3 2 7 four four 3 one 5 5 four 2 6 6 5 3 7 7 6 four

Tables specifying non-blocking self-routing switches have the property that any pair of subscribers is contained once in any row, that is, only one route passes through any of the M _b switches connecting any pair of subscribers.

In fact, the cascade connection process described in the Formula is performed according to the extended switch connection table consisting of h adjusted base tables T _b covering M _b K × K switches. The value of h is determined from the ratio K / k _b , where k _b is the number of inputs of the switch described by the base table. In the j-th copy of T _b (2≤j≤h), the numbers of connected subscribers increase compared to the 1st copy by (j-1) N without changing the places of their connection. Therefore, the resulting extended R × R switch combines R = hN _b subscribers, which is more in N _b / k _b than in the original K × K. The following conditions are observed: KN = Rm, K = hk _b , R = hN _b , N = M _b , m = m _b .

Table 3 shows, as an example, the connection table of the extended switch with R × R = 21 × 21, assembled from 7 complete 9 × 9 switches (N = 7, K × K = 9 × 9), forming a spinal cascade, using the base the table T _{b of the} duplex switch with the topology of the UBS B (N, M, m, k, σ) = B (7,7,3,3,1) shown in Table 2 above. The parameters of the base table N _b = M _b = 7, k _b = m _b = 3. In Table 3, three copies of the base table are highlighted in color, h = 3. The above conditions are met.

Table 3 Spinal Cascade Switches Duplex Switch Ports one one 7 5 8 fourteen 12 fifteen 21 19 2 2 one 6 9 8 13 16 fifteen twenty 3 3 2 7 10 9 fourteen 17 16 21 four four 3 one eleven 10 8 eighteen 17 fifteen 5 5 four 2 12 eleven 9 19 eighteen 16 6 6 5 3 13 12 10 twenty 19 17 7 7 6 four fourteen 13 eleven 21 twenty eighteen

Consider an example of a two-step extension of the inputs of a switch with the topology of a UBS constructed of duplex switches k _b × k _b = 2 × 2 and duplex demultiplexers-multiplexers 1 × 3 (m _b = 3). A diagram of the constructed duplex switch R × R = 8 × 8 with the topology of the UBS is shown in Fig. 8. The original 2 × 2 switches in the diagram are shown in the form of rectangles, and the 1 × 3 demultiplexers-multiplexers are shown in the form of triangles.

We use to build the base table T _b corresponding to the block diagram B (4, 6, 3, 2, 1), shown in Table 4.

Table 4 Switches Duplex Switch Ports one one 2 2 one 3 3 one four four 2 3 5 2 four 6 3 four

After the first step of applying the proposed method, that is, a single (h = 1) application of T _b , we obtain a 4 × 4 commutator with the UBS topology circled in FIG. This switch consists of six numbered 2 × 2 switches and four 1 × 3 demultiplexers-multiplexers, in the numbering of which the second digit indicates the step number, its inputs are numbered from 1 to 4.

In the second step, taking the six 4 × 4 commutators obtained in the first step as the spinal cascade (they are designated K1_2-K6_2 in the diagram, the second digit indicates the step number) and using the same base table, we get the extended 8 × 8 commutator, circuit the compounds of which are presented in table.5. The duplex ports of this switch are numbered 1 through 8.

Table 5 Spinal Cascade Switches Duplex Switch Ports one one 2 5 6 2 one 3 5 7 3 one four 5 8 four 2 3 6 7 5 2 four 6 8 6 3 four 7 8

The connection table of the resulting switch is based on two copies (h = 2) of the base table. For clarity in FIG. 8, two groups of 1 × 3 demultiplexers-multiplexers used in the second step are spaced to illustrate the two stages of wiring two copies of the base table according to the proposed method for constructing an extended switch with N _b = 4 and h = 2.

The proposed solution provides a single path between any pair of subscribers that passes through one basic switch. Recall that the base tables that specify non-blocking self-routing switches have the property that any pair of subscribers is contained once in any row, therefore only one route passes through any switch of the spinal cascade connecting any pair of subscribers. Therefore, to lay the route in the advanced switch, it is enough to pave the path from the source subscriber to the corresponding spinal cascade switch specified by the adjusted base table, perform routing inside the base switch and lay the path to the destination subscriber from it. Thus, the resulting switch inherits non-blocking and self-routing basic ones.

With such routing, the input demultiplexer at the exit from the subscriber should direct the frame to the necessary switch. In this case, the demultiplexer can select this switch by the number of the output channel specified in the frame, or the frame will be selected in the switch to which it is intended. In the second case, the demultiplexer can be replaced by a simple signal amplifier. When implementing permutation switching tasks, when each input subscriber is connected to only one output subscriber and the input-output pairs do not have common subscribers, the output multiplexer can be replaced by an OR element. If the task is non-permutable and several input candidates apply for one output subscriber, then the multiplexer must perform the function of multiple access to a single output channel. Circuits that perform this function can have a minimum depth (Podlazov B.C., Sokolov VV Circuitry of single-stage switches of large dimension // Sensors and Systems. 2006. No. 9. P.12-17).

Here is another technical example of the use of the proposed method for expanding the number of ports in the well-known multi-stage Clos networks. Suppose, for example, the largest available full 64 port switch. With the traditional expansion, we get the Klose network with 2048 ports (Guide to myrinet-2000 switches and switch networks // http://www.myti.com/myrinet/m3switch/guide/). Using the connection table with the UBS topology for m = 3, we extend the switch to 64 ports by the proposed method to a single-stage switch to 148 ports. This will require a board with 7 switches. As a result, the number of ports of the 3-stage Klose network built from these advanced switches will increase from 2048 to 10952 ports and 314 such boards will be required. In the second expansion step, using the same connection table with the UBS topology for m = 3, we expand the switch by 148 ports in the proposed way to a single-stage switch with 344 ports. To do this, you need a module with 7 boards. As a result, the number of ports of the 3-stage Klose network built from these modules will increase to 59168 ports and 730 such modules will be required. At the third expansion step, using the same connection table with the UBS topology for m = 3, we expand the switch to 344 ports by the proposed method to a single-stage switch to 952 ports. This will require a rack with 7 modules. As a result, the number of ports of the 3-stage Klose network built from these modules will increase to 453152 ports and 2020 such racks will be required.

The proposed method for combining switches into a network or extending switch ports has the following advantages:

- Provides preservation of the properties of non-blocking and self-routing, that is, a switch built from non-blocking self-routing basic switches is also non-blocking and self-routing.

- Provides a systematic way to build an advanced switch with the necessary topology. The required topology is defined by the corresponding base join table.

- Provides for multiple applications, almost unlimited expansion of the network of switches, combining several specified in the process of constructing connection topologies.

The proposed method is used to build switch networks for multiprocessor systems, where fast parallel information transfer between digital devices is required. Switch networks obtained by the proposed method can also be used in real-time systems, where a minimum and predictable time of information transfer between nodes is required.

Claims (6)

1. A method of constructing a non-blocking self-routing extended switch R × R from non-blocking self-routing basic switches K × K (K <R), characterized in that the input and output stages of switches connected to the spinal cascade consisting of M basic K × K switches to the spinal cascade in accordance with a specific connection table, characterized in that as the input and output stages, respectively, R demultiplexers l × m and R multiplexers m × l are used; connection of demultiplexers and multiplexers to the spinal cascade is performed using the base table of connection T selected for constructing an extended switch N of an unblockable self-routing switch N × N, which specifies the connection of the input stage N (N <R) of l × m demultiplexers to the inputs of the cascade M of switches k × k (k <K) and the outputs of this stage to the output stages of N m × l multiplexers; the connection of demultiplexers and multiplexers to the spinal cascade is performed as follows: the first k inputs (outputs) of all M base switches are connected to the first N of R demultiplexers (multiplexers) exactly in accordance with the base connection table T, the following k inputs (outputs) of all M base switches connected in accordance with the basic table of connection T to the following N demultiplexers (multiplexers) from R demultiplexers (multiplexers), and so on h times until the last h-th group of inputs (outputs) of all M base switches to the last N of R demultiplexers (multiplexers), while only those demultiplexers (multiplexers) are used that have enough inputs (outputs) on the switches to connect; the base connection table T has M rows and 2k columns, at the intersection of the i-th row (1≤i≤M) and the j-th column (1≤j≤k) in the input part of table T, the input number of the switch N × N connected to the jth input of the i-th switch k × k through the corresponding demultiplexer, at the intersection of the i-th row and (j + k) -th column in the output part of table T, the output number of the switch N × N connected to the j-th output is written of the i-th switch k × k through the corresponding multiplexer. 2. The method according to claim 1, characterized in that they use a basic connection table T with the topology of an incomplete balanced block diagram in which the input and output parts coincide, and the numbers of inputs (outputs) of the N × N switch are distributed across the rows of the table so that each pair of input-output numbers in different lines occurs exactly σ times and the relation N = m (k-1) σ + 1 is satisfied. 3. The method according to claim 1, characterized in that they use a basic table of compounds T with the topology of a two-dimensional multi-ring, in which k = m and N = M = m ² , obtained as follows: each of the N nodes of a single-cycle multi-ring consists of a l × demultiplexer m, a k × k switch and an m × l multiplexer; for each node, one output of the demultiplexer is connected to the input of the switch of the same node, the rest of the outputs are routed to the inputs of the switches of the other nodes according to the topology of a single-cycle multi-ring, one input of the multiplexer is connected to the output of the switch of the same node, the remaining inputs are connected to the outputs of the switches of the other nodes, respectively, of the topology of a single-cycle multi-ring . 4. The method according to claim 1, characterized in that they use a basic table of connections T with the topology of a two-dimensional hypercube, in which k = m and N = M = m ² , obtained as follows: all inputs of the switches k × k of each row with the same numbers the m × m switch arrays are routed to a demultiplexer with the same number of k l × m demultiplexers, all with the same numbers the outputs of k × k commutators of each column of the m × m commutator matrix are routed to a multiplexer with the same number of k m × l multiplexers. 5. The method according to claim 2, characterized in that for the construction of a non-blocking self-routing extended switch with R duplex ports from non-blocking self-routing basic switches with K duplex ports (K <R), the connection of multiplexers-multiplexers with duplex ports to the base switches is performed using the table connections T with the topology of an incomplete balanced block diagram in which the output part of the table is combined with the input. 6. The method according to claim 1, or 2, or 3, or 4, characterized in that in the multi-step (unlimited) expansion of the switch inputs at each expansion step, the extended switch obtained in the previous step is used as the base switch, while for expansion At each new expansion step, the topological capabilities of the built switch use the necessary base connection table.

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