RU2336650C2 - Instability compensation device for carrier frequency of phase-shift signals - Google Patents

Abstract

FIELD: physics, radio.

SUBSTANCE: invention concerns radio technology and is intended for application in coherent signal demodulation with multistable phase shift. Device includes two multiplicators, first inputs of which are combined and form the device input; phase rotator; frequency generator; reference generator; two analog-to digital converters; two integrators with reset; double arctangent calculator; two multipliers-dividers; loop filter; phase synthesiser; two subtraction units, where the second unit output is the device output.

EFFECT: reduced energy loss in coherent signal demodulation, achieved by compensation for signal vector phase rotation caused by carrier instability, in digital form by linear elements, without the use of slave generator.

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Description

The invention relates to radio engineering and is intended for use in coherent demodulation of signals with multi-position phase shift keying (FM).

, фазового детектора (ФД), генератора частоты Ω/2π, балансного амплитудного модулятора, двух полосовых фильтров, один из которых настроен на частотуA device for recovering a carrier for communication systems with FM-4 [1], consisting of two balanced mixers in which the signal inputs are combined and are the input of a device tunable generator

phase detector (PD), frequency generator Ω / 2π, balanced amplitude modulator, two bandpass filters, one of which is tuned to the frequency

and the other on frequency

two intermediate frequency amplifiers (IFA) tuned to the frequency Ω / 2π, two frequency doublers, two phase shifters - one at + 45 °, and the other at -45 °.

The disadvantage of this device is its high energy loss, which shows how much you need to increase the signal to noise ratio (C / N), that is, increase the transmitter power in order to obtain the potential probability of a bit error.

восстановленного колебания.From the structure of the device [1] it is seen that the recovery of the carrier is performed using the phase-locked loop (PLL), on the quality of which depends on energy loss. In this device, the consequences of manipulation, when determining the phase mismatch between the carrier and the restored oscillation, are eliminated by frequency doublers of two branches with their subsequent phase detection. Frequency doubling is done by squaring the signal. At low C / N ratios as a result of squaring the signal, this ratio worsens (see, for example, [2] paragraph 10.2.1.4, p. 635). The phase detector multiplies the signals from the outputs of the frequency doublers, that is, signals with a lower signal to noise ratio than at the input of the device, thereby further reducing this ratio in the PLL and increasing the phase dispersion

restored wobble.

A decrease in the phase dispersion is possible due to a decrease in the PLL noise band, which to some extent can reduce energy losses if the opposite result is not observed when the phase dispersion increases due to uncompensated stray phase modulation (PFM). Its level is determined by the phase noise of the local oscillators of the transmitter and receiver, as well as the parasitic harmonic components in their spectrum. PFM can make a significant contribution to total energy losses, which can become irreplaceable (see, for example, [2] paragraph, 10.2.1.8, p.641, 642).

Energy losses are also associated with the use of a tunable generator in the device [1], which is included in the PLL circuit, and, as a rule, has low stability and increased PFM compared to a stabilized generator operating at a fixed frequency.

The energy loss of the device [1] is also associated with a static phase tracking error, which is determined by the zero drift of the PD. Zero departure of the PD, in turn, is associated with the non-identical phase characteristics of the bandpass filters and the IF amplifier. To maintain their identity in the range of operating temperatures is almost impossible. The disadvantages of this device include the operation of filter settings, the accuracy of which depends on the static phase tracking error.

It is also known a device for recovering the carrier frequency of phase-shifted signals [3], containing the first and second PD, the first inputs of which are combined and are the input of the device, two low-pass filters, four comparators, two multipliers, the first and second subtractors, a filter, and the output of the first subtractor is connected with a filter input, a controlled generator, a phase shifter, the output of which is connected to the second input of the second PD, three adders, two attenuators, an inverter.

The disadvantage of the device [3] is its high energy loss associated with the restoration of the carrier using the PLL. An in-phase-quadrature circuit (a variant of the Costas circuit) is used in the PLL circuit of the device. The performance of such a circuit is equivalent to a square squared circuit (see, for example, [2] paragraph 10.2.1.5, p. 637). The disadvantage of using a controlled generator in the device [3] is similar to the disadvantage of using a tunable generator in the device [1].

The device [3] is preferable to the device [1], since a significant part of the operations on the signal can be performed by digital processing of the signal with higher accuracy.

Closest to the claimed device adopted for the prototype is a carrier recovery device in the M-position FM system [4], containing the first and second multipliers, the first and second integrators with a reset, a loop filter, a phase shifter, the first inputs of the first and second multipliers combined and are the input of the device, the output of the phase shifter is connected to the second input of the first multiplier, and the second input of the second multiplier is combined with the input of the phase shifter, the device also contains a generator controlled by zheniem (VCO), first and second delay elements of duration T on the first and second gating device evaluator phase calculator cosine and sine calculator, third and fourth multipliers, the adder.

The disadvantage of the device [4] is its energy loss associated with the restoration of the carrier using the PLL. In its PLL circuit, as well as in the device [3], an in-phase-quadrature circuit (a variant of the Costas circuit) is used, which includes two multipliers, the inputs of which are fed with signals containing noise components. It should be emphasized that the phase estimator does not reduce the input phase dispersion acting in the matched signal band, but only highlights it. The disadvantage of using the VCO in the device [4] is similar to the disadvantage of using a tunable generator in the device [1].

The present invention is aimed at solving the problem of reducing energy losses during coherent demodulation of signals with multi-position FM.

The achievement of the technical result of the device for compensating for instability of the carrier frequency of the phase-shifted signals is determined by the combination of the following essential features:

- the presence, as in the prototype, of the first and second multipliers, the first and second integrators with a reset, a loop filter, a phase shifter, and the first inputs of the first and second multipliers are combined and are the input of the device, the output of the phase shifter is connected to the second input of the first multiplier, and the second the input of the second multiplier is combined with the input of the phase shifter;

- the presence, in contrast to the prototype, of the first and second analog-to-digital converters (ADCs), a reference generator, a frequency synthesizer, a double arc tangent calculator, a first and second multiplier divider, a first and second subtraction unit, a phase synthesizer, and the output of the reference generator is connected with the input of the frequency synthesizer, the output of which is connected to the combined second input of the second multiplier and the input of the phase shifter. The outputs of the first and second multipliers are connected to the inputs of the first and second ADCs respectively, the outputs of which are connected to the inputs of the first and second integrators respectively with a reset, the outputs of the first and second integrators with a reset are connected respectively to the first and second inputs of the double arc tangent calculator, the output of which is connected to the input the first divisor multiplier and with the first input of the second subtraction block. The output of the first divider multiplier is connected to the first input of the first subtraction block, the output of the first subtraction block is connected to the input of the loop filter, the output of which is connected to the input of the phase synthesizer, while the output of the phase synthesizer is connected to the input of the second multiplier divider and the second input of the second subtraction block, the output of which is the output of the device. The output of the second divider multiplier is connected to the second input of the first subtraction unit, the second inputs of the first and second divider multipliers are combined and are the control input of the device.

The first and second multipliers, the phase shifter, as in the prototype, form a quadrature converter, which transfers the spectrum of the signal from an intermediate frequency or carrier down to the signal plane.

The reference oscillator and frequency synthesizer, in contrast to the prototype VCO, form a stabilized oscillator operating at a fixed, nominal receive frequency and which is the local oscillator for the quadrature converter.

The first and second ADCs quantize the signal in amplitude and time.

The first and second integrators with reset, as well as in the prototype, perform a consistent filtering and estimation of the quadrature components of the signal on the interval T (symbol duration).

The double arctangent calculator estimates the phase of the signal vector on the entire signal plane using the estimated quadrature components of the signal, without removing the manipulation. The double arctangent calculator is based on read-only memory (ROM), whose address is the digital common-mode and quadrature samples of the signal.

The first divisor multiplier removes the phase shift keying at the output of the double arc tangent calculator, as will be shown later, without increasing the phase dispersion of the signal.

The second multiplier divider, the first subtraction unit, loop filter, phase synthesizer form a phase-locked loop (FAL) that monitors the rotation of the phase of the signal vector caused by the instability of the carrier frequency, as well as PFM local oscillators. The first subtraction unit performs the function of a linear phase detector.

The second subtraction block compensates for the rotation of the phase of the signal vector at the output of the double arctangent computer, since during the phase-to-phase converter operation, the filtered, restored, without manipulation, rotated phase of the signal vector is formed at the output of the phase synthesizer. As a result, at the output of the second subtraction block, a non-rotatable phase of the signal vector is formed due to the manipulation of information symbols and dispersion caused by uncompensated PFM and noise.

Thus, the technical result - the reduction of energy losses is achieved by compensating for the rotation of the phase of the signal vector, caused by the instability of the carrier frequency, without the use of a controlled generator, in digital form by linear elements that do not increase the phase dispersion of the signal. Reducing energy losses, as a result, allows you to increase the noise band of the phase-to-phase converter, thereby reducing the time of synchronization and reducing the requirements for the PFM of the analog part of the device.

To explain the operation of the device for compensating for instability of the carrier frequency of phase-shifted signals, the following drawings are given:

- figure 1 is a structural diagram of a device for compensating for instability of the carrier frequency of FM signals;

- figure 2 is a graph of the function of double arc tangent and discriminatory characteristics of the PD;

- figure 3 is a graphical representation of a portion of the signal plane of the signal FM-4.

A device for compensating for instability of the carrier frequency of phase-shifted signals (Fig. 1) contains the first and second multipliers 1 and 2, the phase shifter 3, the first and second ADCs 4 and 5, the frequency synthesizer 6, the first and second integrators with reset 7 and 8, the reference generator 9, double arctangent calculator 10, first and second divisor multipliers 11 and 12, first and second subtraction blocks 13 and 14, loop filter 15, phase 16 synthesizer.

The first inputs of the first and second multipliers 1 and 2 are combined and are the input of the device, the output of the phase shifter 3 is connected to the second input of the first multiplier 1, and the second input of the second multiplier 2 is combined with the input of the phase shifter 3, the output of the reference generator 9 is connected to the input of the frequency synthesizer 6, the output which is connected to the combined second input of the second multiplier 2 and the input of the phase shifter 3, the outputs of the first and second multipliers 1 and 2 are connected to the inputs of the first and second ADCs 4 and 5, the outputs of which are connected to moves of the first and second integrators with a reset of 7 and 8, respectively, the outputs of the first and second integrators with a reset of 7 and 8 are connected respectively to the first and second inputs of the double arc tangent calculator 10, the output of which is connected to the input of the first multiplier divider 11 and to the first input of the second block subtraction 14, the output of the first multiplier divider 11 is connected to the first input of the first subtraction block 13, the output of the first subtraction block 13 is connected to the input of the loop filter 15, the output of which is connected to the input of the phase 16 synthesizer, the synthesis output the torus of phase 16 is connected to the input of the second multiplier divider 12 and the second input of the second subtraction unit 14, the output of which is the output of the device, the output of the second multiplier divider 12 is connected to the second input of the first subtractor 13, the second inputs of the first and second multiplier divider 11 and 12 are combined and are the control input of the device. To explain the operation of the device in the structural diagram (see figure 1), the clock inputs of the first and second ADCs 4 and 5, the first and second integrators with reset 7 and 8, and phase 16 synthesizer are additionally shown.

The device operates as follows.

The first and second multipliers 1 and 2 together with the 90 ° phase shifter 3 form a quadrature converter that transfers the signal spectrum from an intermediate frequency or carrier down to the signal plane. The reference signal for the quadrature converter is the output signal of the frequency synthesizer 6, which operates at a fixed, nominal frequency of the received signal. In turn, the frequency synthesizer 6 operates from a highly stable, spectrally pure reference oscillator 9.

The first and second ADCs 4 and 5 quantize the signal in amplitude and time and operate at an increased frequency kFs, a multiple of the allocated clock frequency Fs.

на интервале Т (длительности символа). Интеграторы стробируются повышенной тактовой частотой kFs. Остальные цифровые элементы устройства стробируются тактовой частотой Fs.The first and second integrators with reset 7 and 8 perform matched filtering and evaluate the quadrature components of the signal

on the interval T (character duration). Integrators are gated by the increased clock frequency kFs. The remaining digital elements of the device are gated by the clock frequency Fs.

), по оцененным квадратурным составляющим сигнала дает оценку фазы

манипулированного сигнала на всей сигнальной плоскости X, Y от минус π до π. Эта оценка не снимает манипуляцию фазы. Вычисление функции ATAN2 (

) производится с помощью запрограммированного ПЗУ. Эта функция линейна на всем интервале значений фазы сигнала. График функции двойного арктангенса D(φ), при восьмиразрядном выходе для М=1, приведен на фиг.2. Точность оценки фазы сигнала зависит от уровня его квантования по амплитуде, разрядности АЦП, а также от входной и выходной разрядности ПЗУ. Оцененные значения

в цифровом виде являются адресом ПЗУ. То есть вся сигнальная плоскость (см. фиг.3) разбита на 2^R (где R - разрядность адреса ПЗУ) элементарных квадратов ΔX*ΔY. Каждому элементарному квадрату соответствует рассчитанное значение фазы, которое, в свою очередь, тоже квантуется.Dual ArcTangent Calculator 10, ATAN2 (

), according to the estimated quadrature components of the signal, gives an estimate of the phase

manipulated signal on the entire signal plane X, Y from minus π to π. This assessment does not remove phase manipulation. Calculation of the ATAN2 function (

) is made using the programmed ROM. This function is linear over the entire range of signal phase values. The graph of the double arc tangent function D (φ), with an eight-bit output for M = 1, is shown in figure 2. The accuracy of estimating the phase of a signal depends on the level of its quantization in amplitude, ADC resolution, and also on the input and output resolution of the ROM. Estimated Values

in digital form are the address of the ROM. That is, the entire signal plane (see Fig. 3) is divided into 2 ^R (where R is the bit depth of the ROM address) of the elementary squares ΔX * ΔY. Each elementary square corresponds to a calculated phase value, which, in turn, is also quantized.

The phase of the signal at the output of the double arctangent computer 10 is represented as:

where Ω ₀ is the angular frequency of the detuning of the carrier of the receiver and transmitter (taking into account the Doppler shift) to be compensated;

φ _P (nT) is the dynamic component of the phase deviation of the carrier frequencies of the receiver and transmitter caused by the PFM, subject to compensation;

- составляющая, обусловленная манипуляцией фазы сигнала передатчика информационными символами, d может принимать значения от 0 до М-1;

- the component due to the manipulation of the phase of the transmitter signal with information symbols, d can take values from 0 to M-1;

φ _N (nT) is the dynamic component of the phase deviation of the signal caused by additive, white, Gaussian noise (ABGS);

φ _K (nT) is the dynamic component of the signal phase deviation caused by the quantization error (noise).

The angular frequency of detuning of the carrier of the receiver and transmitter Ω ₀ (taking into account the Doppler shift) can be either positive or negative, that is, the signal vector Vs on the signal plane (see Fig. 3) can rotate clockwise (negative detuning), and counterclockwise (positive detuning). The dynamic component of the signal phase deviation caused by the quantization error is the smaller, the higher the bit depth of the first and second ADCs 4 and 5, as well as the double arctangent computer 10.

The first multiplier divider 11 removes phase manipulation of the signal. The operation of multiplying the phase of the signal by M, without taking into account overflow, removes phase manipulation, and the operation of dividing by M leads to the same phase slope of the signal, which does not depend on the modulation index.

The phase of the signal at the output of the first multiplier divider 11 will be determined by the formula:

where M is the FM index;

- оцененная фаза сигнала на выходе вычислителя двойного арктангенса 10;

- estimated phase of the signal at the output of the double arctangent computer 10;

k is the overflow coefficient.

For example: the FM-4 signal can have four phase positions: 45 °, 135 °, 225 ° and 375 °, which after calculation by formula (2) become equal to 45 °. For a digital signal in binary form, the operation of multiplication-division is replaced by zeroing (excluding) the upper digits at the output of the double arc tangent calculator 10. The number of nullable digits is determined by the binary logarithm of M - the FM index. To modulate FM-2, one senior bit is zeroed, after which the arctangent function is formed at the output of the first multiplier divider 11, and for FM-4 the double-angle arctangent function is formed. For an unmodulated signal at M = 1, the most significant bits are not reset. The graphs of these functions D (φ) for M = 1, M = 2 and M = 4 are shown in FIG. 2.

The phase 16 synthesizer is an integral part of report synthesizers or direct synthesis synthesizers. In this case, you do not need to restore reports. As a synthesizer of phase 16, a digital integrator or accumulating adder is used. The synthesizer of phase 16 has the ability to obtain at its output both an increasing (positive derivative) and a decreasing (negative derivative) phase, depending on the sign at its input. The frequency or instantaneous frequency of the phase at its output is determined by the formula:

where φ _C (nT) is the current phase value;

φ _C (nT-T) is the delayed phase value;

T is the quantization period.

The phase 16 derivative or frequency is set at the input of the phase 16 synthesizer. With a negative input derivative, at the output of the synthesizer, its phase will be decreasing. With limited capacity, the frequency or frequency of the phase repetition is determined by the formula:

where K is the decimal value of the digital input signal (both positive and negative);

N is the capacity of the synthesizer.

From formula (4) it can be seen that the phase 16 synthesizer can only generate discrete frequency values with a step equal to the lowest frequency value at K = 1. With an input signal equal to zero, the phase at the output of the synthesizer does not change and has a random (last) value. The specified synthesizer is used in the FAP loop to track the rotation of the signal vector caused by the detuning of the carrier frequency of the receiver and transmitter, taking into account the Doppler shift.

The first phase subtractor 13, the loop filter 15 and the second multiplier divider 12 are also included in the FAP loop. The first subtractor 13 performs the function of a phase detector that compares the phase of the signal vector with the manipulation removed with the phase of the phase 16 synthesizer, and a difference is formed at the output of the PD phase Δφ (see figure 3). Figure 3 shows the conditional vector Vc of the phase 16 synthesizer. The closed loop PLL will tend to reduce the phase difference A Δφ → 0 and maintain this state. A phase detector is a linear device that does not increase the phase dispersion of the signal. The discriminatory characteristics of the phase detector D (Δφ) are shown in Fig.2. The loop filter 15 determines the order of the loop phase-locked loop.

The second multiplier divider 12 resets (eliminates) the upper bits of the synthesizer of phase 16 from the tracking process, that is, makes the phase of the synthesizer of phase 16 equivalent to the phase of the signal with the removed manipulation. The frequency of the phase at the output of the second multiplier divider 12 increases M times. The overall periodicity of the phase at the output of the phase 16 synthesizer in the tracking mode, taking into account the senior bits, will correspond to f = Ω _o / 2π the frequency of the detuning of the carrier of the receiver and transmitter.

The ambiguity of the phase at the output of the synthesizer of phase 16, relative to the transmitted, will be a multiple of 2π / M.

The second subtraction unit 14 is a compensator for the rotation of the phase of the signal vector, to the first input of which the signal phase value estimated by the double arctangent computer 10 is supplied, and the second unmodulated signal phase value, filtered, restored by the PLL, is fed to the second input. The output of the second subtraction unit 14 forms a non-rotatable phase of the signal vector, which is determined by the formula:

- составляющая, обусловленная манипуляцией фазы сигнала передатчика информационными символами, где d может принимать значения от 0 до М-1;Where

- a component due to the manipulation of the phase of the transmitter signal with information symbols, where d can take values from 0 to M-1;

φ _PH (nT) - is not compensated, the dynamic component of the carrier phase deviation of the receiver and transmitter frequencies caused by CPM;

φ _N (nT) is the dynamic component of the phase deviation of the signal caused by ABGS;

φ _K (nT) is the dynamic component of the signal phase deviation caused by quantization error (noise);

- фазовая неоднозначность, где m может принимать значения от 0 до М-1.

- phase ambiguity, where m can take values from 0 to M-1.

The first component of the phase is due to the transmitted information, which must be highlighted.

The second component of the phase is determined by the quality of the local oscillators of the receiver and transmitter, their total PFM and the possibility of its compensation by the FAP loop of the proposed device. Since the FAP loop operates autonomously, there is a great opportunity to compensate for the PFM, in comparison with the prototype, by setting the optimal noise band, as a result of which, in specific cases, the requirements for the PFM of the analog part can be reduced.

, вызванная аддитивным шумом, также определяет энергетические потери. Дисперсия фазы сигнала на входе устройства обратно пропорциональна отношению C/N, а дисперсия фазы на выходе контура ФАП определяется его шумовой полосой, которая прямо пропорциональна отношению односторонней шумовой полосы контура ФАП к односторонней шумовой полосе согласованного фильтра или односторонней эффективной ширине спектра сигнала. Дисперсия фазы восстановленной несущей при воздействии АБГШ и при отсутствии ПФМ определяется формулой:The component of the phase deviation of the signal vector caused by the ABGS is determined by the sufficient noise band Fшд FAP. Signal phase dispersion

caused by additive noise also determines energy loss. The phase dispersion of the signal at the input of the device is inversely proportional to the C / N ratio, and the phase dispersion at the output of the PLL loop is determined by its noise band, which is directly proportional to the ratio of the one-sided noise band of the PLL loop to the one-sided noise band of the matched filter or the one-sided effective signal spectrum width. The dispersion of the phase of the restored carrier when exposed to ABGS and in the absence of PFM is determined by the formula:

where N is the input noise power in the matched band;

C is the power of the signal (carrier) at the input;

B _L - one-sided noise band of the PLL;

W _S - one-sided effective signal spectrum width.

Using formula (6) and setting the standard deviation (SD) σ _φ phase and the ratio C / N, sufficient noise bandwidth is calculated Fshd PLL circuit. For example: the standard deviation of the phase σ _φ , equal to 0.1 radian, practically does not introduce additional energy losses for FM-2, and at C / N = 1, the sufficient noise band Fшд will be one hundredth of the one-sided effective signal spectrum width.

The dynamic component of the phase deviation of the signal vector, caused by a quantization error, depends on the capacity of the device and at six, seven bit ADCs, its rms value is not more than 0.01 radian.

и

. При повороте фазы входного сигнала ФМ-2 на 18° дополнительные энергетические потери составляют не более 0,1 дБ. Исходя из допустимости таких потерь максимальная расстройка по частоте f_max между приемником и передатчиком должна быть не более

.Additional energy losses of the proposed device occur due to time slicing. These losses occur due to the fact that the phase of the input signal in the interval of the symbol duration is rotated by a certain angle, as a result of which interference occurs between the quadrature components of the signal

and

. When the phase of the input signal FM-2 is rotated by 18 °, the additional energy loss is not more than 0.1 dB. Based on the admissibility of such losses, the maximum frequency detuning f _max between the receiver and the transmitter should be no more than

.

The output signal of the second subtraction unit 14 is the output signal of the device, by which a decision is subsequently made on the transmitted symbols.

The phase ambiguity of the device is similar to analogues and prototype.

By setting the maximum possible FAP band, synchronization can be made for several tens of characters.

A quadrature converter, a frequency synthesizer, a reference generator, an ADC are commercially available by industry. The digital part of the carrier frequency instability compensation device for phase-shifted signals can, for example, be an integral part of digital signal processing devices based on programmable logic integrated circuits (FPGAs), base matrix crystals (BMCs), or signal processors.

Really achievable experimental results, namely, energy losses introduced by the proposed device, were estimated by comparing the noise immunity of the device without compensating for the instability of the carrier at zero frequency with the noise immunity of the same device with compensation. For this, in both cases, the graphs of the dependence of the probability of bit error on the ratio of the bit energy to the spectral density of the noise power Eb / No in the range from minus 3 dB to plus 13 dB in the FM-2 and FM-4 modes were shot.

In the first case (without compensation), the sum of the signal and noise ABGS was fed to the input of the first ADC 4, and the probability of a bit error was estimated at the output of the first integrator with reset 7. In this case, the noise immunity curve is equivalent to coherent reception of the FM-2 and FM-4 signals.

In the second case (with compensation), in the FM-2 mode, the same signal was summed with the signals of different independent noise sources ABGS and fed to the input of the first and second ADCs 4 and 5. In the FM-4 mode, different signals were summed with different signals sources of noise. In this case, in the FM-2 and FM-4 modes, the probability of a bit error was estimated at the output of the compensator using a solver.

The compensation device had the following characteristics:

- clock frequency of information symbols - 5 MHz - clock frequency of the ADC - 80 MHz - bit ADC - 6 - input ROM capacity - 12 (2 × 6) - output bit capacity ROM - 8 - bit synthesizer phase - 16 - FAP noise band - 40 kHz.

The input signal levels (peak / peak) were 0.4 from the opening of the ADC.

As a result of the experiment, the graphs of the dependence of the probability of a bit error on the ratio of the bit energy to the spectral density of the noise power Eb / No, in the FM-2 and FM-4 modes using compensation, in the range from 0 dB to plus 13 dB completely coincided with the graph, where compensation was not used. The energy loss at an Eb / No ratio of minus 3 dB was 0.5 dB. In the absence of external ABGS noise, the mean square deviation of the phase caused by hardware noise and quantization noise, which amounted to no more than 0.01 radian, was estimated at the PD output.

Thus, the device for compensating for instability of the carrier frequency of phase-shifted signals practically does not introduce the energy losses that occur in the prototype with coherent demodulation of FM signals, and also reduces the time of synchronization and reduces the requirements for the analog part of the device.

Information sources

1. Application RU No. 97101981, publ. 02/27/1999

2. Sklyar B. Digital Communications, Moscow "St. Petersburg" Kiev, 2003.

3. Patent RU No. 2044409, publ. September 20, 1995

4. Prokis J. Digital Communications, Moscow, Radio and Communications, 2000, p. 266, Fig. 6.2.10 (prototype).

Claims (1)

A device for compensating the instability of the carrier frequency of phase-shifted signals, comprising the first and second multipliers, the first and second integrators with a reset, a loop filter, a phase shifter, the first inputs of the first and second multipliers being combined and being the input of the device, the output of the phase shifter connected to the second input of the first multiplier, and the second the input of the second multiplier is combined with the input of the phase shifter, characterized in that it further comprises the first and second analog-to-digital converters, the reference generator, frequency synthesizer, double arctangent calculator, first and second divider multipliers, first and second subtraction blocks, phase synthesizer, wherein the output of the reference oscillator is connected to the input of the frequency synthesizer, the output of which is connected to the combined second input of the second multiplier and the input of the phase shifter, the outputs of the first and the second multipliers are connected to the inputs, respectively, of the first and second analog-to-digital converters, the outputs of which are connected to the inputs, respectively, of the first and second integrators with by reset, the outputs of the first and second integrators with reset are connected, respectively, to the first and second inputs of the double arc tangent calculator, the output of which is connected to the input of the first multiplier divider and to the first input of the second subtraction block, the output of the first multiplier divider is connected to the first input of the first block subtraction, the output of the first block, subtraction is connected to the input of the loop filter, the output of which is connected to the input of the phase synthesizer, while the output of the phase synthesizer is connected to the input of the second divider multiplier and second input the second subtraction unit, the output of which is the output of the device, the output of the second divider multiplier is connected to the second input of the first subtraction unit, the second inputs of the first and second divider multipliers are combined and are the control input of the device.

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