RU2316810C2 - Device for active protection and for ensuring technical readiness of elements of distributed local computing network under conditions of external destructive influences - Google Patents

Abstract

FIELD: controlling and measuring equipment which allows conduction of constant monitoring and diagnosing of electromagnetic situation, important for operation of computers in composition of local area network, and, on basis of prediction results, to realize prior switching of users to computers, not subject to effect of electromagnetic impulse.

SUBSTANCE: device contains analyzer of parametric failures and breakdowns, field strength meter and controlling board with external launch, consisting of commutation block, reprogrammable permanent memorizing device and probability-based prediction device.

EFFECT: extended class of solved problems and ensured continuity of informational service provision to clients of distributed local area network.

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Description

The invention relates to a control and measuring technique that allows for continuous monitoring of the electromagnetic environment (EMO), which affects the performance of the elements of a distributed local area network (LAN), and, based on the results of forecasting, early shutdown of elements of a distributed LAN (computer) exposed electromagnetic pulse (EMP), from users and connecting backup computers that are not subject to this type of exposure, to users.

There is a device that allows you to determine the parametric failures of technical devices [1]. However, this device does not allow to identify the cause of the parametric failures that may occur due to external influences or operational factors. The closest in technical essence is the device, the main feature of which is the ability to identify the fact of failure of technical devices by a given number of failures for a selected time interval. This device is selected as a prototype [2].

The prototype device contains threshold blocks, a pulse shaper, delay elements, inverters, AND elements, an OR element, a differentiating element, triggers, a pause shaper, counters, a pulse generator, frequency dividers, a switch, a register, a pulse shaper, a register, a gradual failure control unit , clock generator, pulse counter modulo N, block of memory cells, display board, data selector, subtractor.

The block of memory cells of the analyzer of parametric failures and failures is designed to record information about: the number of failures of the monitored objects, the total duration of failures, the number of failures of the controlled product, the total duration of failures, and the mean time between failures for the required period of time.

The disadvantage of this device is the inability to use it to provide active protection and the required technical readiness of the elements of a distributed LAN under electromagnetic conditions, due to the fact that this device only records the fact of a parametric failure or failure, without determining the cause of their occurrence.

The technical result is the expansion of the class of tasks and ensuring the continuity of the provision of information services to subscribers of a distributed LAN by reducing the time of disconnecting LAN users from computers.

This result is achieved by the fact that in the prototype device containing the first threshold block, a pulse shaper, a first delay element, a first inverter, a first AND element, a second OR element, a differentiating element, a fourth And element, a first trigger, a third And element, a second inverter , second delay element, pause former, sixth AND element, third trigger, fourth trigger, second counter, pulse generator, first frequency divider, second AND element, first OR element, first counter, switch, register, fifth element And, the third counter, the second trigger, the seventh element And, the fifth trigger, the eighth element And, the fourth counter, while the input of the first threshold block is the information input of the analyzer, and the output of the first threshold block is connected to a single input of the third trigger, the input of the first delay element, the zero input of the first trigger, the third input of the third AND element, the reset input of the pause driver, the input of the second inverter and the start input of the pulse shaper, the output of which is connected to the input of the first inverter, the output of which is connected to the input of the differentiating element, the first input of the seventh element And, the reset input of the fourth counter and the second input of the first element And, the first input of which is connected to the output of the first delay element, and the output to the second input of the second OR element, the output of which is connected to the single input of the fourth a trigger whose inverse output is connected to the third input of the eighth AND element, and the direct output is connected to the first input of the fifth OR element, the output of which is connected to the counting input of the second counter and the second input of the second And element, the output of which is connected to the first input of the first OR element, whose output is connected to the summing input of the first counter, the output of the pulse generator is connected to the input of the first frequency divider, the output of which is connected to the first input of the second element And and the second input of the seventh element And, the output of which connected to the addition input of the fourth counter, the output of which is connected to the zero input of the fifth trigger, the single input of which is connected to the first input of the second OR element and the output of the third AND element, the second input is The second, as well as the zero input of the fourth trigger and the reset input of the pulse shaper are connected to the direct output of the third trigger, the zero input of which is connected to the output of the sixth element And, the first and second inputs of which are connected to the outputs of the second delay element and pause driver, respectively, the first input of the third element And connected to the direct output of the first trigger, a single input of which is connected to the output of the fourth element And, the first input of which is connected to the output of the differentiating element, and the second input of the fourth And And the input of the second delay element and the start input of the pause driver are connected to the output of the second inverter, the first and second information outputs of the switch are connected to the second output of the first OR element and the subtraction output of the first counter, and the information input of the switch is connected to the output of the fifth AND element, the third input of the first OR element and the subtraction input of the fourth counter are connected to the output of the eighth AND element, the first input of which is connected to the direct output of the fifth trigger, and the second input is connected to the inverse ode of the second trigger, the first installation input of the third counter is connected to the register output, the zeroing output of the third counter is connected to the register read input and to the zero input of the second trigger, the direct output of the second trigger is connected to the input of the fifth element And, the clock generator is connected to the summing input of the fifth a pulse counter whose output is connected to the first input of the third OR element, the input of the fourth delay element and the first input of the fourth OR element, the output of which is connected to the counter input pulses modulo N, the output of which is connected to the control input of the block of memory cells, the output of which is connected to the display panel, the data selector, the output of which is connected to the input of the first threshold block, the second threshold block, the output of which is connected to the input of the third inverter, the output of which is connected to the input of the third delay element, the output of which is connected to the first input of the ninth element And, the second input of which is connected to the output of the fourth delay element, and the output of the ninth element And is connected to the second input of the fourth OR element and the second input of the third OR element, the output of which is connected to the control input of the data selector, the information inputs of the memory cell block are connected to the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth pulse counters, register, first, second , third, fourth, fifth triggers, pause driver, pulse generator, a second frequency divider, the input of which is connected to the output of the first threshold block, and the output with the first input of the tenth element And, the second input of which is connected to the output the first threshold block and the summing input of the seventh counter, the output of the tenth element And is connected with the summing input of the sixth counter, the output of which is connected to the first input of the first subtractor, the second input of which is connected to the output of the first counter, and the output with the summing input of the eighth counter, the zeroing output of the seventh counter connected to the first input of the second subtractor, the second input of which is connected to the zeroing output of the second counter, and the output of the second subtractor is connected to the summing input of the ninth counter, the output of which It is connected to the first input of the eleventh element And, also the output of the ninth counter is connected to the summing input of the tenth counter, the output of which is connected to the second input of the fifth element OR, a pulse shaper whose output is connected to the input of the third frequency divider, the output of which is connected to the summing input of the eleventh pulse counter the output of which is connected to the zeroing input of the twelfth pulse counter and the input of the fourth inverter, the output of which is connected to the second input of the eleventh element And, are introduced from Field strength tester (PIT), control board with external start (UPVZ), consisting of a switching unit (BC), an electronic reprogrammable read-only memory (EEPROM), a probabilistic forecasting device (UVP), while the output of the PID is connected to the first input of the BC the second output of which is connected to the first input of the EEPROM, the second output of which is connected to the first input of the UVP, the fourth input of the control unit is connected to the output of the UVP, the third input / output of the EEPROM is connected to the memory block of the analyzer of parametric failures and failures, The device is connected to the sixth input / output of the BC, the outputs of which (from the seventh ... to the Nth) are connected to the inputs of the distributed LAN computer, respectively, the outputs of each of the distributed LAN computers are connected to 1 to N inputs of the analyzer of parametric failures and failures.

The claimed device is illustrated by drawings, which show:

Figure 1 - device for active protection and ensuring technical readiness of the elements of a distributed local area network in the conditions of external destructive influences;

Figure 2 - analyzer parametric failures and failures;

Figure 3 is an embodiment of a structural diagram of a field strength meter;

Figure 4 is a variant of the structural diagram of the switching unit;

5 is a variant of the structural diagram of an electronically reprogrammable read-only memory device;

6 is a variant of the structural diagram of a device for probabilistic forecasting.

The device for active protection and technical readiness of the elements of a distributed local area network under external destructive influences, shown in Figure 1, contains: an analyzer of parametric failures and malfunctions 1, a field strength meter 2, a control board with an external trigger 3, consisting of a switching unit ( BC) 3.1, electronically-reprogrammable read-only memory (EEPROM) 3.2, probabilistic forecasting device (UVP) 3.3.

In figure 1 is indicated:

1. The analyzer of parametric failures and failures;

2. Field strength meter (IPP);

3. Control board with external start (UPVZ):

3.1. Switching Unit (BC);

3.2. Electronic Reprogrammable Read-Only Memory (EEPROM);

3.3. Probability prediction device.

4. Distributed LAN:

4.1 ... 4.N. computer

5. User.

The analyzer of parametric failures and failures is presented in figure 2, where it is indicated:

1.1 The first threshold block;

1.2 pulse shaper;

1.3 The first element of delay;

1.4 first inverter;

1.5 The first element And;

1.6 The second element OR;

1.7 differentiating element;

1.8 The fourth element And;

1.9 The first trigger;

1.10 The third element And;

1.11 Second inverter;

1.12 Second delay element;

1.13 Former pause;

1.14 The sixth element And;

1.15 Third trigger;

1.16 Fourth trigger;

1.17 Second counter;

1.18 pulse generator;

1.19 first frequency divider;

1.20 The second element And;

1.21 The first element OR;

1.22 first counter;

1.23 switch;

1.24 Register;

1.25 The fifth element And;

1.26 Third counter;

1.27 Second trigger;

1.28 The seventh element And;

1.29 Fifth trigger;

1.30 The eighth element And;

1.31 Fourth counter;

1.32 data selector;

1.33 Third element OR;

1.34 Clock generator;

1.35 Fifth counter;

1.36 The second threshold block;

1.37 Third inverter;

1.38 Third delay element;

1.39 The ninth element And;

1.40 Fourth delay element;

1.41 Fourth element OR;

1.42 Pulse counter modulo N;

1.43 block of memory cells;

1.44 Second frequency divider;

1.45 The tenth element And;

1.46 Sixth pulse counter;

1.47 Seventh pulse counter;

1.48 First subtractor;

1.49 Eighth pulse counter;

1.50 Second subtractor;

1.51 Ninth pulse counter;

1.52 display board;

1.53 Tenth pulse counter;

1.54 The fifth element OR;

1.55 pulse shaper;

1.56 Third frequency divider;

1.57 Eleventh pulse counter;

1.58 Fourth inverter;

1.59 The eleventh element And;

1.60 Twelfth pulse counter.

The field strength meter (SIR) 2 is a known device and is intended to measure the rms values of the electric and magnetic components of the electromagnetic field (EMF) of ultrahigh frequency (microwave) in the far zone of the radiation sources in the continuous generation, amplitude, frequency and pulse modulation modes. Alternatively, it can be performed on the basis of SIP P3-21 according to the scheme shown in Fig 3. The composition and principle of operation of SIP P3-21 are described in more detail in [4] (pp. 14-17, 45-48, 55).

Figure 3 marked:

2.1 Antenna Converter;

2.2 low pass filter;

2.3 Converter analog-to-digital;

2.4 control device;

2.5 electric quantity counter;

2.6 Indicator.

The switching unit 3.1 is a known device and is intended for advance switching of the user to a computer that is not affected. It also provides the connection of a field strength meter to an EEPROM. Alternatively, it can be performed on the basis of the KVM-1600 switch according to the scheme shown in Fig. 4. The composition and principle of operation of the KVM-1600 are described in more detail in [5].

In figure 4 are indicated:

3.1.1 Interface Converter;

3.1.2 network card;

3.1.3 push button switch;

3.1.4 microcontroller;

3.1.5 decoder;

3.1.6 Cross-switching matrix.

The electronic-reprogrammable read-only memory 3.2 is a known device [6] (pp. 255-259) and is intended for storing reference reference values of electric field strength as well as electric field strength, leading to computer crashes and failures. Alternatively, it can be performed on the basis of the AT28BV64B microcircuit [7] (p. (1-17)) presented in FIG. 5.

The device of probabilistic forecasting 3.3 is a known device [8] (p. 158-159 Fig. 17) and is designed to determine and signal the probability of a diagnostic parameter going out (not going out) beyond the permissible limits at a certain (set) time moment, as well as an alarm working (main or standby) at a given point in time the computer. Alternatively, the UVP can be performed according to the scheme shown in Fig.6. It includes a switching and measuring unit (BKI) 3.3.1, a memory unit (BP) 3.3.2, a weight coefficient block (BVK) 3.3.3, a unit for calculating the probabilistic characteristics of a priori information (BV1) 3.3.4, a unit for calculating conditional a posteriori of probabilities (BV2) 3.3.5, result correction block (BKR) 3.3.6, indication blocks (BI) 3.3.7 and control (BU) 3.3.8.

Introduction to the prototype of new distinguishing features allows the device to expand the class of tasks to be solved and to ensure the continuity of the provision of information services to LAN subscribers by monitoring the electromagnetic environment and determining the causes of failures and malfunctions.

The analysis of the prior art made it possible to establish that there are no analogues identical to the features of the claimed technical solution, which indicates the compliance of the claimed device with the patentability condition of "novelty". The introduced distinguishing features - IPP and UPVZ are not found in them. Therefore, the claimed device meets the criterion of "inventive step". The industrial applicability of the introduced elements is due to the presence of the element base on the basis of which they can be performed.

The device for active protection and ensuring the technical readiness of the elements of a distributed local area network under external destructive influences works as follows.

From the IPP output, the instantaneous value of the electric field strength in digital form is fed to the input of the control circuit board with an external trigger. From the output of the BC, the signal goes to the EEPROM, where it is written to the table in the form of a 4-bit two-digit code as the reference reference value E _et , in which the operation of the computer and the LAN is carried out in a mode that does not lead to failures and failures. Thus, in the EEPROM the first measured value of the electromagnetic field strength is recorded as a reference value of the electromagnetic field strength, which does not lead to crashes and failures. The EEPROM table also stores the predetermined calculated first minimum values of the electric field strength E _min at which failures and malfunctions on the computer and the LAN do not occur and the first maximum values of the electric field E _max at which failures and malfunctions occur. From the second output of the EEPROM, the value of the reference reference E _et and the subsequent measured values of the electric field E _ism go to the first input of the UVP. The EEPROM is associated with a block of memory cells of the analyzer of parametric failures and failures. In the event of a failure, a signal of failure from the block of memory cells of the analyzer of parametric failures and failures enters the EEPROM. With EEPROM, a failure signal is input to the control unit BU 3.3.8 through the switching and measuring unit BKI 3.3.1. Having measured the value of the electromagnetic field strength, having received information that it is a failure and critical stress E _cr for the system to work, the BCI commutes it to the input of BU 3.3.8, after which the BU 3.3.8 gives a command to read and write E _cr in the memory block BP 3.3 .2 UVP of the real value of the electric field strength, leading to computer failures and malfunctions.

Thus, continuous monitoring of the electromagnetic environment and the determination of the possibility of failures are carried out. From the second output of the EEPROM, the value of the reference reference E _et and the subsequent measured values of the electric field E _ism go to the first input of the UVP.

The probabilistic prediction device 3.3 continuously evaluates the changing parameters. In the first step of the OHR 3.3 in a memory unit which also stores the value of the electric field strength, resulting in failure of a computer, receives from EEPROM and stored reference value of the reference electric field strength E _fl. The memory block 3.3.2 using the switching and measuring unit 3.3.1 compares the value of the electric field strength coming from the EEPROM with a predetermined calculated first minimum value of the electric field strength E _min , which does not lead to computer failures and malfunctions and the first maximum value of the voltage E _max leading to failures and malfunctions. The obtained values are transferred to the memory cells of the memory block 3.3.2, and are also multiplied by the weight coefficients of the block 3.3.3. Then, using the blocks for calculating the probabilistic characteristics of a priori information BV1 3.3.4 and the block for calculating the conditional posterior probabilities BV2 3.3.5, the technical condition is estimated and the time of failure occurrence in the computer is predicted, i.e. time (t _lead ) with a given probability during which the computer will be in working condition. If the value of the electric field of the electromagnetic field tends to a value that exceeds the permissible limits (E _cr > 1.5 V / m), the display unit 3.3.7 gives an alarm about the probability of a failure in the computer and the minimum time (T _min ) that it will remain operational, which corresponds to the length of time until the first tolerance is reached by the measured parameter. In this case, the control unit 3.3.8 from the output 3 of the probabilistic forecasting device 3.3 issues a control signal “UPR-1” to the BC for switching the user from the affected computer as part of a distributed LAN to a computer that is not affected. At the same time, the display unit 3.3.7 turns on the alarm, and on the front panel of the UPVZ switching unit, a light alarm appears on the registration of the changes that have occurred.

If the level of electric field remains between a predetermined first minimum E _min and the first maximum values of E _max , the second stage of work. UVP 3.3 compares the instantaneous value of the electric field strength _{generated by the SIP} with a predetermined second minimum value of E _min2 corresponding to the value of the electric field at which the normal functioning of the computer and a predetermined second maximum value of E _max2 corresponding to the value of the electric field, at which a failure or failure occurs. Accordingly, the assessment of the technical condition and prediction of the occurrence of computer failure is carried out similarly to the previous stage. If the probabilistic forecasting device 3.3 determines the probability of the instantaneous value of the electric field strength exceeding the permissible limits at a certain point in time, i.e. below a predetermined second minimum value or above a predetermined second maximum value, first a control signal is output from the BC indicating a possible computer failure, and then, at the end of time T _min, the switching unit 3.1, using the control unit 3.3.8, also makes the switch to Computer not affected. In addition, similarly to the first stage of operation, the indication unit 3.3.7 turns on the alarm, and the switching unit UPVZ gives a control signal on the display panel of the analyzer of parametric failures and failures about the registration of the failures.

In accordance with the norm at the given stage of the diagnosed parameters, the display unit and the display panel give information about the local computer network maintaining a healthy state, and the control unit 3.3.8 again transfers the probabilistic forecasting device 3.3 to the first stage of operation. The end of the work.

During the operation of this device, the process of diagnosing the technical condition of the computer as part of a distributed LAN is carried out. UPVZ constantly polls the analyzer of parametric failures about the condition of the diagnosed equipment. In the event of a failure, a signal of its occurrence from the block of memory cells of the analyzer of parametric failures is fed to the EEPROM, which gives the command to write E _cr to the memory block of the UVP.

Thus, continuous monitoring of the electromagnetic environment and the possibility of failures, as well as the constant adaptation of the proposed device to a change in the electromagnetic environment. The use of the developed device will ensure the continuity of the provision of information services to subscribers of a distributed LAN.

Efficiency assessment is carried out by comparing the minimum allowable time of switching a user to a computer that is not exposed to an electromagnetic pulse, in relation to the time of disconnecting the user from a computer exposed to this effect. In the event of a computer failure subject to EMR, the time of switching the user to another computer will be equal to the sum of the time intervals of the impact of the EMR on the computer, determining the computer's failure, and switching the user to another computer.

The time a user disconnects from a computer exposed to EMR obtained by using the proposed device will be equal to the time the user switches to a computer that is not exposed to this effect. Thus, the time gain when using the proposed device will be equal to the sum of the time intervals of the impact of the EMR on the computer and determining the computer failure, provided that the times of switching the user to the computer are not affected by the electromagnetic pulse for the proposed and existing devices.

We will evaluate the effectiveness using a temporary model of this effect, which is illustrated by the graph of the increase in the electric field EMR, shown in Figure 1 [9].

Figure 1 - Graph of the increase in the electric field EMR

The following notation is introduced on the chart:

Δt ₁ = t ₂ -t ₁ - interval of increasing amplitude E of the electric intensity of the EMP (ns);

Δt ₂ = t ₃ -t ₂ - EMR exposure interval on a computer (ns);

Thus, when using the prototype, the time the user disconnects from the computer will be calculated by the following formula:

where Δt ₃ - time to determine the failure of a computer (determined by reference data on the time of failure of semiconductor elements and integrated circuits when exposed to electromagnetic radiation of nanosecond duration [9];

Δt ₄ - time user switching on a computer, not exposed to an electromagnetic pulse (determined by the particular type of switching the switching unit time reference data [5]).

When using the proposed device, the time of disconnecting a user from a computer exposed to EMR will be equal to the time of switching the user to a computer that is not exposed to this effect for the following reasons. In the interval Δt ₁ (t ₁ , t ₂ , t ₃ ), the probabilistic forecasting device 3.3 points out points in which the amplitude of the EMF electric field increases to a critical value E _cr and the lead time t is determined _. (picture 1). The forecasting data in the UVP are compared with E _cr and, at E≥E _cr, the switching unit 3.1 switches the subscriber to a computer that is not affected, i.e.

Thus, the effectiveness of the proposed device is calculated as follows

We will evaluate the effectiveness for one of the typical options for the impact of EMR on computers [8] with the following initial data [10, 11]:

Δt ₂ = 5ns

Δt ₃ = 18 μs

Δt ₄ = 10 μs

After making the appropriate calculations in the MathCAD program, the effectiveness of the proposed device will be equal to:

Information sources

1. Parametric failure analyzer. Patent SU 1405075 A1, G06F 15/46, 06.23.88.

2. A positive decision on the grant of a patent for the invention "Analyzer of parametric failures and failures", No. 2004104978 from 09.09.2005

3. Shubinsky IB and others. Active protection against failures of control modular computing systems. - S.-Pb .: Nauka, 1993 .-- 284 p.

4. Field strength meter PZ-21. Technical description and operating instructions 2.741.010 TO.

5. PLANET Technology Corp. KVM-1600 16-port KVM Switch with OSD and Daisy Chain., Min Chuan Road, Hsin Tien, Taipei, Taiwan, R.O.C. 11F, No.96. http://www.planet.com.tw.

6. Tokheim R. Fundamentals of Digital Electronics. Per. from English - M .: Mir, 1988 .-- 392 p.

7. Atmel Corporation. AT28BV64B 64K (8K × 8) Battery-Voltage Parallel EEPROM with Page Write and Software Data Protection. 2005 www.atmel.com/literature.

8. Technical diagnostic tools: Reference / VV Klyuev and others. Under the general. ed. V.V. Klyueva. - M.: Mechanical Engineering, 1989 .-- 672 s, ill.

9. Ivanov V.A., Dvilyansky A.A. Justification of the criterion and indicators of functional damage to the computer. - M.: Telecommunications, No. 3, 2005.- P.3-8.

10. Digital and analog integrated circuits: a Handbook / S.V. Yakubovsky, L.I. Nisselson, V.I. Kuleshova and others. Ed. S.V.Yakubovsky. - M.: Radio and Communications, 1990. - 496 p. silt

11. Tereshchuk R.M., Tereshchuk K.M., Sedov S.A. Semiconductor receiving and amplifying devices: Handbook of a radio amateur. - 4th ed. - Kiev: Naukova Dumka, 1989 .-- P.800.

Claims (1)

A device for providing active protection and technical readiness of elements of a distributed local area network (LAN) under external destructive influences (electromagnetic pulse), consisting of an analyzer of parametric failures and failures, which contains a first threshold block, a pulse shaper, a first delay element, a first inverter, a first AND element, second OR element, differentiating element, fourth AND element, first trigger, third AND element, second inverter, second delay element, driver pauses, sixth element And, third trigger, fourth trigger, second counter, pulse generator, first frequency divider, second element And, first element OR, first counter, switch, register, fifth element And, third counter, second trigger, seventh element And , the fifth trigger, the eighth element And, the fourth counter, while the input of the first threshold block is the information input of the analyzer, and the output of the threshold block is connected to a single input of the third trigger, the input of the first delay element, the zero input of the first trigger, tr the fourth input of the third element And, the reset input of the pause driver, the input of the second inverter and the start input of the pulse shaper, the output of which is connected to the input of the first inverter, the output of which is connected to the input of the differentiating element, the first input of the seventh element And, the reset input of the fourth counter and the second input of the first AND element, the first input of which is connected to the output of the first delay element, and the output - with the second input of the second OR element, the output of which is connected to the unit input of the fourth trigger, inverse the output of which is connected to the third input of the eighth AND element, and the direct output is connected to the first input of the fifth OR element, the output of which is connected to the counting input of the second counter and the second input of the second AND element, the output of which is connected to the first input of the first OR element, the output of which is connected to to the summing input of the first counter, the output of the pulse generator is connected to the input of the first frequency divider, the output of which is connected to the first input of the second element And and the second input of the seventh element And, the output of which is connected to the input with The second counter, the output of which is connected to the zero input of the fifth trigger, the single input of which is connected to the first input of the second OR element and the output of the third AND element, whose second input, as well as the zero input of the fourth trigger and the reset input of the pulse shaper are connected with the direct output of the third trigger whose zero input is connected to the output of the sixth AND element, the first and second inputs of which are connected to the outputs of the second delay element and the pause driver, respectively, the first input of the third AND element is connected to the direct output of the first trigger, the single input of which is connected to the output of the fourth element And, the first input of which is connected to the output of the differentiating element, and the second input of the fourth element And, as well as the input of the second delay element and the start input of the pause driver, are connected to the output of the second inverter, the first and second information outputs of the switch are connected to the second output of the first OR element and the subtraction output of the first counter, and the information input of the switch is connected to the output of the fifth AND element, the third output the first OR element and the subtraction input of the fourth counter are connected to the output of the eighth AND element, the first input of which is connected to the direct output of the fifth trigger, and the second input is connected to the inverse output of the second trigger, the first installation input of the third counter is connected to the register output, the zeroing output of the third counter is connected with a register read input and with a zero input of the second trigger, the direct output of the second trigger is connected to the input of the fifth element And, the clock is connected to the summing input of the fifth s pulse counter, the output of which is connected to the first input of the third OR element, the input of the fourth delay element and the first input of the fourth OR element, the output of which is connected to the input of the pulse counter modulo N, the output of which is connected to the control input of the block of memory cells, the output of which is connected to the board display, a data selector, the output of which is connected to the input of the first threshold block, the second threshold block, the output of which is connected to the input of the third inverter, the output of which is connected to the input of the third element a delay whose output is connected to the first input of the ninth AND element, the second input of which is connected to the output of the fourth delay element, and the output of the ninth AND element is connected to the second input of the fourth OR element and the second input of the third OR element, the output of which is connected to the control input of the data selector, the information inputs of the block of memory cells are connected to the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth pulse counters, register, first, second, third, fourth, fifth triggers, form a pause element, a pulse shaper, a second frequency divider, the input of which is connected to the output of the first threshold block, and the output to the first input of the tenth element And, the second input of which is connected to the output of the first threshold block and the summing input of the seventh counter, the output of the tenth element And is connected to the summing the input of the sixth counter, the output of which is connected to the first input of the first subtracter, the second input of which is connected to the output of the first counter, and the output with the summing input of the eighth counter, the output of zeroing the seventh counter and connected to the first input of the second subtractor, the second input of which is connected to the zeroing output of the second counter, and the output of the second subtractor is connected to the summing input of the ninth counter, the output of which is connected to the first input of the eleventh element And and the summing input of the tenth counter, the output of which is connected to the second input of the fifth OR element, a pulse shaper whose output is connected to the input of the third frequency divider, the output of which is connected to the summing input of the eleventh pulse counter, the output of which is connected It is connected to the zeroing input of the twelfth pulse counter and the input of the fourth inverter, the output of which is connected to the second input of the eleventh element And, characterized in that a field strength meter (SIP), a control board with an external start (UPVZ), consisting of a switching unit ( BC), an electronically-reprogrammable read-only memory (EEPROM), a probabilistic forecasting device (UVP), while the output of the SIP is connected to the first input of the BC, the second output of which is connected to the first input of the EEPROM, the second whose output is connected to the first input of the UVP, the fourth input of the BC is connected to the output of the UVP, the third input / output of the EEPROM is connected to the memory block of the analyzer of parametric failures and failures, the user is connected to the sixth input / output of the BC, the outputs of which (from the seventh ... to Nth) are connected to the inputs of a distributed LAN computer, respectively, the outputs of each of the distributed LAN computers are connected to the inputs of the analyzer of parametric failures and failures.

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