RU2248067C2 - Method for measuring electrophysical parameters of thin silicon dioxide films of gates - Google Patents

Abstract

FIELD: measuring parameters of gate insulator.

SUBSTANCE: proposed method includes evaluation of set of parameters of many MIS structures on entire wafer within its single trace, measurement of pre-breakdown current-voltage characteristic of MIS structure, breakdown voltage of gate insulator and charge injected in gate dielectric before its irreversible breakdown in single measurement process. Thus, electrophysical parameters of MIS structure are determined within singe measurement cycle.

EFFECT: reduced time taken to measure characteristics of gate insulator on wafer.

1 cl, 2 tbl

Description

The invention relates to electrophysical methods for controlling the parameters of thin gate dielectrics, in particular to methods for controlling the electric strength and durability of the gate oxide of a MOS transistor.

и менее необходимо иметь информативные высокопроизводительные методики контроля качества затворных систем с целью аттестации технологического процесса и оборудования.In the production of CMOS VLSI with a gate insulator thickness of 500

and it is less necessary to have informative high-performance methods of quality control of shutter systems in order to certify the technological process and equipment.

A known method of controlling the reliability of a dielectric shutter film (Abadeer, Wangli W., International Business Machines Corporation, 324-719, US 9814317, 01/27/1998), based on the assessment of the durability of the dielectric shutter film of a semiconductor device, in which a group of test elements is supplied to a group of test elements bias voltages and measure the corresponding currents in the films and determine the relationship between currents and, accordingly, the durability of the structure.

There is a method of controlling the time before degradation of a gate dielectric (Time Dependent Dielectric Breakdown (TDDB)), based on the control of the time elapsed from the application of a bias voltage to the test MIS structure to the moment of irreversible electrical breakdown (destructive breakdown) of a gate dielectric (Time Dependent Breakdown of Ultrathin Gate Oxide, Abdullah M. Yassine, IEEE Transactions On Electron Devices, vol. 47, No. 7, July 2000). Being a modern way of controlling the quality of a gate dielectric, informative and quite productive, the method of studying time-dependent dielectric breakdown, developed in the second half of the 80s, is widely used by a number of foreign and domestic manufacturers of VLSI and allows you to control the defectiveness of the gate dielectric, to certify technological equipment and process creation of gate systems, to predict the reliability of VLSI during their operation. The method is based on the control of the time interval elapsed from the moment of applying a voltage slightly smaller than the breakdown voltage to the moment of breakdown of the gate insulator to the MIS structure. The control is carried out on a large number of MIS structures (100 or more) over the entire area of the silicon wafer, which makes it possible to separate MIS structures containing latent defects in the gate dielectric from structures with a practically defect-free dielectric.

A known method for predicting the reliability of oxide under the influence of negative bias at an electric field strength of 12 MB / cm (Yoshiko Yoshida, Mikihiro Kimura, Morihiko Kume, Hidekazu Yamomoto, Test Structure for the Evaluation of Si Substrates, IEICE Trans. Electron., Vol. E79-C No 2, February 1996).

A known method for assessing the quality of thin thermally grown SiO ₂ films by monitoring the voltage-voltage characteristics, current-voltage characteristics, time-dependent electrical breakdown and ellipsometric measurements of the thickness of silicon dioxide (Chiou-Feng Chen, Ching-Yuan Wu, Ming-Kwang Lee, Chuen-Nam Chem , The Dielectric Reliability of Intrinsic Thin SiO ₂ Films Thermally Grown on a Heavily Doped Si Substrate-Characterization and Modeling, IEEE Transaction on Electron Devices, Vol. Ed34, No. 7, July l987).

The main disadvantage of the existing methods for monitoring the electrophysical characteristics of MIS structures is the significant length of the measurement process, caused by the need to separately determine such characteristics as the electric field strength of the dielectric breakdown, prebreakdown voltage-current characteristic, and the length of time before the destructive breakdown of the dielectric. As a result of this, it is impossible to quickly obtain the necessary information about the properties of the thin gate silicon dioxide, which significantly slows down the feedback from the technological process of creating gate systems.

A distinctive feature of the proposed technical solution is the determination of the entire set of electrophysical parameters of the MIS structures on the wafer in one round of the wafer and a significant reduction in time to the devastating breakdown of gate silica. The proposed solution is implemented in the following sequence:

- the high-frequency capacitance-voltage characteristic (HF VFH) of the MIS structure is measured and its electrophysical parameters are determined, in particular, the thickness of the gate silicon dioxide;

- a linearly increasing voltage is applied to the MOS structure and the prebreakdown CVC of the MIS structure is measured in the range of low current densities (from 1 · 10 ^-5 A / cm ² to 1 A / cm ² );

- at a set value of the current density through the dielectric of the MIS structure, the breakdown voltage of the gate SiO _{2 is} determined;

- the voltage of the irreversible (destructive) breakdown of the gate dielectric is determined;

- constantly in the process of current flowing through the MIS structure, the total charge passed through it before the destructive breakdown and which is recorded after the destructive breakdown is calculated.

After degradation of the gate silica, they proceed to determine the parameters of the next MIS structure on the plate.

The problem to which this invention is directed, is to achieve a technical result, which consists in determining the electrophysical parameters of the MIS structure in one measuring cycle, which can significantly reduce the time for determining the characteristics of the gate dielectric on the plate. The problem is solved using a combination of modern electrophysical methods for controlling the parameters of MIS structures.

Thus, as a result of a complex of measurements, the following parameters are determined for a large number of MIS structures on the control plate:

- the capacity of the MIS structures in the regime of strong enrichment;

- the thickness of the gate dielectric, determined for a given dielectric constant;

- stress of the flat zones of the MIS structures;

- effective surface charge density at the silicon-insulator interface;

- the concentration of the doping donor (acceptor) impurity in the surface layer of silicon;

- breakdown voltage of the gate insulator at a given value of current density;

- voltage destructive breakdown of the gate insulator;

- the duration of the time interval until complete degradation of the gate dielectric;

- the magnitude of the charge injected into the gate dielectric before its destructive breakdown.

For certification control of technological processes, the creation of gate systems, in particular, oxidation under the gate, satellite plates with MIS structures with a field electrode area from 1 · 10 ^-5 cm ² to 1 · 10 ^-2 cm ^{2 should be used} . The MIS structure should imitate the structure of a real MIS transistor, that is, a thin gate gate dielectric should be created in the windows in a sufficiently thick local silicon dioxide. The field electrode should partially go to the thick dielectric, which will reduce the influence of edge effects, and in some cases, investigate the effect of the charge in the oxide at the edges of the gate region on the reliability characteristics of the gate systems. As the material of the field electrode, it is desirable to use the gate material of the MOS transistors, in particular polycrystalline silicon.

(пластины 1-4) и 200

(пластины 5-8), выращенной в окнах в полевом окисле. Площадь полевых электродов из n+Si* над тонким окислом в окнах в толстом полевом окисле составляла 4е-4 см².EXAMPLE 1. 8 wafers (silicon substrates of the KEF-4.5 grade, crystallographic orientation (100) with a diameter of 150 mm) with MIS structures based on a thin SiO ₂ gate with a thickness of about 250

(plates 1-4) and 200

(plates 5-8) grown in windows in field oxide. The area of n + Si * field electrodes above the thin oxide in the windows in the thick field oxide was 4–4 cm ² .

The specific measurement results are summarized in Table 1, which shows the average values of the breakdown voltages (for 69 MIS structures at a current of 0.01 mA) and the electric field strengths of the breakdown of the gate SiO ₂ , standard deviations from the average values and the number of MIS structures on the plate, and the voltage breakdown fields of which are higher than 8 · 10 ⁶ V / cm and below 2 · 10 ⁶ V / cm. The values of d _{ox are} obtained from measurements of the HF CV characteristic of MIS structures averaged over five regions. Table 2 shows the times to complete degradation of 50% and 90% of all controlled MIS structures on the plates (F = N / 69 and corresponds to the ratio of degraded MIS structures to all MIS structures).

Claims (1)

A method for controlling the quality of thin layers of a gate dielectric, which allows one to determine the set of electrophysical parameters of a large number of MIS structures throughout the wafer, whereby the high-frequency voltage-voltage characteristic (HF VF) of the MOS structure is first measured and its electrophysical parameters are determined, in particular, the thickness of the gate dielectric, then charge density (Q) as the current integral over time

the pre-breakdown current-voltage characteristic (CVC) of the MIS structure is measured in the range of low current densities (from 10 ^-5 A / cm ² to 1 A / cm ² ) by applying a linearly increasing voltage to the MIS structure, the reversible breakdown voltage of the gate dielectric is determined, at the assigned value of the current density through the dielectric of the MIS structure, determine the voltage of the irreversible (destructive) breakdown of the gate dielectric, calculate the charge passing through the structure, characterized in that the pre-breakdown current-voltage characteristic (CVC) MIS structures, the breakdown voltage of the gate dielectric and the charge injected into the gate dielectric before its irreversible breakdown are measured in a single process.