RU2046455C1 - Method of switching on of field-effect transistor with controlling p-n junction - Google Patents

Abstract

FIELD: microelectronics. SUBSTANCE: method of switching on of field-effect transistor with controlling p-n-junction lies in feed on input signal to gate of transistor, of bias voltage to drain and source and in provision of operation of transistor in linear region of volt-ampere characteristics. Values of bias voltage of drain and source are chosen so that junction "gate-source" is biased in forward direction and junction "gate-drain" in reverse one. Realization of certain proportion of voltage values provides for equality by absolute value of currents "gate-source" and "gate-drain" and their mutual compensation. EFFECT: improved reliability of method. 2 dwg, 1 tbl

Description

 The invention relates to methods for switching on field-effect transistors with a pn junction control (PTN) and can be used both in analog and digital integrated circuits, mainly in cascades with an extremely small input current.

There is a method of turning on the anti-theft switch in a differential amplifier, in which the corresponding bias voltage is applied to the drain and the source, and the input signal and the current bias are supplied to the gate, the current bias being equal to the gate current of the anti-theft gate and the direction opposite to the gate current [1]
This technical solution allows to reduce the input current of the PTUP by compensating it.

 The disadvantage of this method of switching on the anti-theft gate is the high noise level and the complexity of the practical implementation of the current displacement of the gate, which is equal in magnitude and opposite in direction to the gate current of the anti-theft gate, requiring the use of complex technological processes.

The closest in technical essence to the claimed method is the method of turning on the anti-roll bar used in a differential amplifier, in which the corresponding bias is applied to the drain and source, the input signal is fed to the gate, and the bias voltage applied to the drain and source is chosen such that worked in the linear region of current-voltage characteristics (CVC) [2] ie the condition
U _uc <U _UTS, where U _uc voltage between source and drain;
_UTS U cut-off voltage.

 This technical solution has the best combination of parameters: low noise and input current.

 The disadvantage of the technical solution [2] is the relatively high level of input currents with an extremely low noise level.

 The aim of the invention is to reduce the input current of the anti-tank circuit while maintaining a low noise level.

+

(1) где ΔU_зи, Δ U_зс падение напряжения на переходе затвор-исток, затвор-сток по абсолютной величине, В;
U_отс напряжение отсечки, В;
m безразмерный фактор, характеризующий отклонение ВАХ от идеальной, 0,5 ≅ m ≅2,5;
φ_т- температурный потенциал, В;
φ_т=

где К постоянная Больцмана, Дж/K;
T температура в градусах, К;
q заряд электрона, Кулон;
K 1,38×10^-23

q 1,6 x 10^-19 K.The goal is achieved by the fact that in the method of turning on the anti-theft gate, including supplying a control signal to the gate, applying bias voltage to the drain and the source, ensuring the operation of the field-effect transistor in the linear region of the current-voltage characteristic when the gate-drain transition is biased in the opposite direction, the voltage value the bias applied to the source is selected from the condition of providing the bias of the gate-source transition in the forward direction while satisfying the ratio of the absolute values of the voltage drops at the gate-drain transitions and beyond thief-source condition
ΔU _zi = mφ _t ln

+

(1) where ΔU _zi , Δ U _zs voltage drop at the gate-source transition, gate-drain in absolute value, V;
U _ots cutoff voltage, V;
m dimensionless factor characterizing the deviation of the I – V characteristic from the ideal, 0.5 ≅ m ≅ 2.5;
φ _t - temperature potential, V;
φ _t =

where K is the Boltzmann constant, J / K;
T is the temperature in degrees K;
q electron charge, Coulomb;
K 1.38 × 10 ^-23

q 1.6 x 10 ^-19 K.

 The essence of the invention lies in the fact that with this circuit, the inclusion of anti-theft protection by fulfilling the ratio of the claims ensures equality in absolute value of the gate-source and gate-drain currents, and their mutual compensation and the total gate current of the anti-theft gate are equal in the opposite direction.

 Figure 1 presents a diagram of the inclusion of vocational schools in accordance with this method; figure 2 a typical structure of the n-channel transistor PTAP.

The switching method involves setting the source and drain bias in the PTUP 1 through the corresponding power sources 2 and 3 and connecting the PTUP shutter to the source 4 of the control voltage U _s .

Let us consider the operation of a DTEC if an n-channel transistor formed on a p-type semiconductor substrate 5 is used with an n-type epitaxial layer 6 in which an electrically insulated pocket is formed using the dividing regions of the p ⁺ type 7 and the source regions are formed 8 and drain 9 n ⁺ -type conductivity, gate 10 p-type conductivity. In the dielectric oxide 11 covering the surface of the device, windows are opened and leads 12 are formed to all these areas.

When a source-drain voltage is applied to the anti-theft control system in such a way that the drain potential is higher than the source, a current will flow through the anti-theft channel through the channel from the drain to the source, which will cause a voltage drop on the channel. We assume that the channel potential at the point with the coordinate X 0 is equal to the gate potential, then the part of the channel between 0≅ X≅ l ₂ (II) is biased by the gate-drain voltage in the opposite direction, and the part of the channel between -l ₁ ≅X <0 (I ) in the forward direction by the gate-source voltage.

Applying the reverse voltage ΔU _ss to the gate-drain _transition , and the forward voltage ΔU _zi , the absolute values of which correspond to relation (1), to the gate-source transition, it is possible to ensure that the reverse current through the gate-drain transition is the same as the direct current through the gate-source transition. But since both currents have the opposite direction, the gate current is zero.

 The m-factor included in relation (1) characterizes the deviation of the I – V characteristic from the ideal one, is associated with the presence of trapping centers, impurities, dislocations, and other disturbances, and also depends on the surface cleanliness and its degree of protection from external destabilizing factors. Usually 1 <m <2.4.

 In this solution, the part of the channel-gate p-n junction is shifted in the forward direction and the other part is in the opposite direction; selection of gate-source, gate-drain bias in accordance with a specific ratio.

 The fulfillment of the first condition is necessary for the operation of the device, but insufficient, since it guarantees only the flow of gate-source, gate-source and gate-drain currents opposite in direction, through the gate output of the anti-theft gate.

 The fulfillment of the second condition provides a certain ratio between the gate-source and gate-drain currents, but does not determine their different direction.

 Only the joint fulfillment of both conditions determines the flow through the gate output of equal in magnitude and opposite in direction of currents, causing full compensation of the input current.

 An example implementation of the proposed method.

 The proposed method of turning on a field effect transistor with a pn junction control is used in the input differential stage (DC) of an electrothermal amplifier. Experimental samples specially made for these purposes were used as the anti-theft system, in the design of which measures were taken to reduce leakage currents due to secondary effects: leakage currents were minimized due to imperfections in the passive coating of the crystal surface, along the transistor case, etc. Serially produced transistors of the type 2PS10CHA were also used as PTUP.

 To provide the possibility of regulating the voltage at the source and drain of the anti-theft system, an adjustable current source was included in the source circuit, and an adjustable voltage regulator was included in the drain circuit. The resolution resolution was 1 mV.

When using the proposed method for turning on the anti-theft system in the DC circuit of the electric amplifier, the gate current is less than 1 ˙ 10 ^-14 A, and with the traditional inclusion of the anti ^- theft system 1 ˙ 10 ^-11 -1˙10 ^-12 A.

The voltage range ΔU _Зi , for which the gate current is less than 1 ˙ 10 ^-14 A, is within 30 mV, with a fixed value of the gate-drain voltage, which ensures its value (less than 1 ˙ 10 ^-14 A) in the entire operating range operating temperatures PTUP (+5) - (+ 40) ^о С.

The gate-source voltage range at which the gate current is less than 1˙10 ^-15 is in the range of 2-3 mV. Due to the consistency of DC field-effect transistors in terms of gate-to-source voltage stability, gate current stability can be ensured at a level of 1˙10 ^-15 under normal operating conditions (T 20 ± 5 ^о С).

The table shows the experimental and calculated data determined from relation (1) at m 1. The data are given for the gate current of the PTUP 1 ˙ 10 ^-15 A.

 For commercially available 2UP104A type anti-theft arrester, the deviation of the calculated and theoretical data is more noticeable with a decrease in the gate current. This is due to the influence of additional leaks in the transistor case, "masking" the true value of the gate current.

Thus, this method of turning on the anti-theft system in comparison with the traditional one allows reducing the gate current in real devices by 10 ² -10 ³ times.

Claims (1)

METHOD FOR SWITCHING A FIELD TRANSISTOR WITH A PN CONTROL TRANSITION, including applying a control signal to the gate, applying bias voltages to the drain and source, providing the field-effect transistor in the linear region of the voltage-current characteristic when the gate-drain transition is biased in the opposite direction, characterized in that the voltage value the bias applied to the source is selected from the condition of providing the bias of the gate-source transition in the forward direction while satisfying the ratio of the absolute values of the voltage drops eniya transitions gate-drain and gate-source condition

where ΔU _{communication,} the voltage drop ΔU _sc transitions gate-source, gate-drain in absolute value, V;
U _{about t with} a cutoff voltage, V;
m dimensionless factor characterizing the deviation of the current-voltage characteristics from the ideal, 0.5 ≅ m ≅ 2.5;
φ _t temperature potential, V.

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