RU2038695C1 - Convolution coder - Google Patents

Abstract

FIELD: electrical communications. SUBSTANCE: convolution coder having first read-only storage unit, first delay element, first adder, second adder, second read-only storage unit, second delay element, first multiplier, third adder, fourth adder, third delay element, second multiplier, fourth delay element, fifth adder, and fifth delay element is provided, in addition, with inverters, sixth adder, and sixth delay element. EFFECT: improved noise immunity of signal train shaped by coder in channels with carrier wave phase jump multiple of 90 degrees due to increasing free space between convolutionally coded signal trains. 4 dwg, 1 tbl

Description

 The invention relates to telecommunications and can be used in high-speed modems for encoding information signals with a convolutional code.

A device for convolutional coding containing a shift register, a first adder, a second adder and a switch [1]
A device for generating convolutional-encoded signals containing three delay lines, two adders and a block for selecting a signal point [2]
The disadvantages of the known devices are the low noise immunity of the generated convolutional-coded sequences at low signal-to-noise ratios (≅ 20 dB), as well as their sensitivity to phase jumps of the carrier wave equal to n π / 2, where n 1,2,3, in the presence of which in the communication channel, it becomes impossible to correctly decode the received sequence.

Closest to the invention in technical essence is a device for encoding a convolutional code, the output signals of which are insensitive to phase jumps of the carrier wave in the communication channel, a multiple of 90 ^about [3] containing the first block of read-only memory, the first and second output of which through the first and second delay lines connected respectively to the third and fourth inputs of the first block of read-only memory, connected in series to a third delay line, a first adder, a second adder, a fourth delay line, a third sum Mathor, fourth adder, fifth delay line, second read-only memory block, and also fifth adder, first multiplier and second multiplier, the output of the fifth adder being connected to the second input of the first adder, the inputs of the fifth adder are the first and second outputs of the first read-only memory, and the output of the fifth delay line is the combined first input of the third delay line, the first multiplier and the second multiplier, the second inputs of the first multiplier and the second multiplier are respectively the output of the third sum ora and the second output of the first block of read-only memory, the outputs of the first multiplier and second multiplier are connected respectively to the second inputs of the second and fourth adders, the first output of the first block of read-only memory is the second input of the third adder and the third input of the second read-only memory, the fourth input of which is connected to the second the output of the first block of read-only memory, the first and second inputs of the first and second blocks of read-only memory being information inputs, and the outputs of the second block of read-only memory Mints are device outputs.

/

+1 2/3 обеспечивает асимптотический энергетический выигрыш от кодирования (АЭВК) 4 дБ по сравнению с некодированной передачей методом квадратурно-амплитудной модуляции КАМ-16. АЭВК обусловлен величиной свободного расстояния (минимальное евклидово расстояние) между двумя любыми передаваемыми сверточно-кодированными последовательностями сигналов, равной

. Сигналы, закодированные сверточным кодом, являются нечувствительными к скачкам фазы несущего колебания в канале связи, кратным 90^о. Это достигается за счет выполненного определенным образом [3] назначения подмножеств сигнальных точек, полученных в результате разбиения [1,4] исходного ансамбля сигналов, переходам графа состояний, соответствующего назначения бит сигнальным точкам ансамбля сигналов и применения операции дифференциального кодирования.The device generates signals encoded by a convolutional code, which allow transmitting 4 information bits (m 4), for one modulation interval. Code used for convolutional coding at a rate of R

/

+1 2/3 provides an asymptotic energy gain from coding (AEC) of 4 dB compared with unencrypted transmission using the KAM-16 method of quadrature amplitude modulation. AEVK is determined by the amount of free distance (the minimum Euclidean distance) between any two transmitted convolutionally encoded signal sequences equal to

. The signals encoded by the convolutional code are insensitive to phase jumps of the carrier wave in the communication channel, a multiple of 90 ^about . This is achieved through the assignment of subsets of signal points obtained in a certain way [3] as a result of splitting [1,4] the original signal ensemble, state transitions, the corresponding assignment of bits to the signal points of the signal ensemble, and the application of the differential encoding operation.

} которая дала бы на выходе второго блока постоянной памяти последовательность сигналов

} наиболее близкую к принимаемой

} по евклидовому расстоянию

-

min

,
при этом

}∈c

где С совокупность всех возможных последовательностей на выходе второго блока постоянной памяти. Характеристики "мягкого" декодирования зависят от свободного расстояния
d_своб= min

,
при этомS_n} ≠P_n} S_n}P_n} ∈c.To decode a sequence of signals encoded by a convolutional code, the reception uses a maximum likelihood decoder with a soft solution [5,6]. The decisive rule for such a decoder can be formulated as follows. As a decision, such an information sequence is taken.

} which would give a sequence of signals at the output of the second block of read-only memory

} closest to accepted

} by Euclidean distance

-

min

,
wherein

} ∈c

where C is the set of all possible sequences at the output of the second block of read-only memory. Soft decoding performance dependent on free distance
d _freedom = min

,
moreover, S _n } ≠ P _n } S _n } P _n } ∈c.

}P_n}

{S_n}) P_r({

}a

}

{a_n}) Q(d

2σ), где Q интеграл вероятностей;
σ среднеквадратическое отклонение шума.Assume that the signal posledovatelnostiS iP _{n} n}} with the minimum Euclidean distance d between them _svob respectively generated binary posledovatelnostyamia ia _{n} n} '} Then the probability that the transmitted instead posledovatelnostia _n} will be decoded posledovatelnosta _n'} is defined as
P _r ({

} P _n }

{S _n }) P _r ({

} a

}

{a _n }) Q (d

2σ), where Q is the probability integral;
σ standard deviation of noise.

N(d_своб)·Q(d_своб/2σ), (1) где N(d_своб) число ошибочных последовательностей, находящихся на расстоянии d_своб от действительно переданной последовательностиS_n} которое зависит от структуры графа переходов [4]
Как видно из (1), определяющее влияние на помехозащищенность сверточно-кодированной последовательности сигналов оказывает свободное расстояние d_своб. АЭВК, обусловленный величиной свободного расстояния, составляет 4 дБ. Однако в каналах с аддитивным белым гауссовым шумом (АБГШ) при скачках фазы несущего колебания, кратных 90^о, выигрыш от кодирования значительно снижается при малых и средних отношениях сигнал/шум (15-18 дБ). Так, например, при вероятности ошибки Р_ош 10^-4выигрыш от кодирования составляет около 2,5 дБ.When the signal-to-noise ratio tends to infinity, the probability that a sequence S _n '} located at a distance greater than d _freedom from the actually transmitted sequence _{S n} } can be taken as a solution can be neglected in comparison with the probability that the solution will be sequence taken at a distance d _{n} svob} Therefore otS
P

N (d _freedom ) · Q (d _freedom / 2σ), (1) where N (d _freedom ) is the number of erroneous sequences located at a distance d _freedom from the actually transmitted sequence _{S n} } which depends on the structure of the transition graph [4]
As can be seen from (1), the free distance d freedom has a decisive influence on the noise immunity of a convolutionally encoded sequence of signals _. AEVK, due to the magnitude of the free distance, is 4 dB. However, in channels with additive white Gaussian noise (AWGN) for the phase jumps of the carrier wave are multiples ^of 90, the coding gain is significantly reduced at low and medium signal / noise (15-18 dB). So, for example, with an error probability of _Psh 10 ^{-4, the} gain from coding is about 2.5 dB.

 Thus, the sequence of signals encoded by the convolutional code generated by the prototype device has a low noise immunity due to the amount of free distance.

The aim of the invention is to increase the noise immunity generated by the device a sequence of signals, and consequently, the energy gain from coding in channels with phase jumps of the carrier wave, multiples of 90 ^about , at small and medium signal-to-noise ratios (s / w).

 The goal is achieved by the fact that the device for encoding with a convolutional code containing the first block of read-only memory, the first and second inputs of which are the same information inputs of the device, the first output of the first block of read-only memory is connected through the first delay element to the third input of the first read-only memory and directly to the first the inputs of the first and second adders and the second block of read-only memory, the second output of the first block of read-only memory is connected through the second delay element to the fourth input the first block of read-only memory and directly with the second inputs of the first adder and the second block of read-only memory, the third and fourth inputs and outputs of which are respectively the same information inputs and outputs of the device, the output of the second adder is connected to the first input of the first multiplier, the output of which is connected to the first input of the third the adder, the fourth adder, the output of which through the third delay element is connected to the second input of the first multiplier and the first input of the second multiplier, the fourth element nt delay, the output of which is connected to the first input of the fifth adder, and the fifth delay element, is equipped with additional inverters, a sixth adder and a sixth delay element, the output of the first adder is connected to the second input of the third adder, the output of which is connected to the second input of the fifth adder, the output of which the fifth delay element and the first inverter are connected in series with the second input of the second adder and the first input of the fourth adder, the inputs of the second inverter and the sixth delay element are connected the output of the third delay element, the output of the sixth delay element is connected to the input of the fourth delay element, the output of the second inverter is connected to the fifth input of the second read-only memory block, the input of the third inverter is connected to the second output of the first read-only memory, the output is connected to the second input of the second multiplier, the output of which is connected to the first input of the sixth adder, the second input of which is connected to the first output of the first block of read-only memory, the output is connected to the second input of the fourth adder.

 Comparative analysis with the prototype shows that the proposed device is characterized by the presence of new units: inverters, the sixth delay line, the sixth adder and their connections with the rest of the circuit elements.

 Thus, the proposed device meets the criterion of "novelty."

Comparison of the proposed solution with other technical solutions shows that inverters, delay line and adder are widely known [7]
However, when administered in said communication with other circuit elements in the proposed device for encoding convolutional code achieved increase noise immunity signals generated by a device, with the phase jumps channels of the carrier wave multiples of ⁹⁰ °, by implementing greater free distance between any two encoded sequences of signals Compared to the prototype. This allows us to conclude that the technical solution meets the criterion of "significant differences".

 Figure 1 presents a structural electrical diagram of a device for encoding a convolutional code; in figure 2 and 3 thirty-two and sixteen-point ensembles of signals; figure 4 transition graph convolutional encoder.

 The device for encoding with a convolutional code comprises a first read-only memory unit 1, a first delay line 2, a second delay line 3, which are a differential encoder, connected in series a sixth delay line 4, a fourth delay line 5, a fifth adder 6, a fifth delay line 7, a first inverter 8, the fourth adder 9, the third delay line 10, the second inverter 11, the second read-only memory block 12 and the second adder 13, the first multiplier 14, the third adder 15, and the first adder 16 and the series Newly connected third inverter 17, second multiplier 18 and sixth adder 19.

 The device operates as follows.

The information bits of the device at time n receive the information bits I1 _n , I2 _n , I3 _n, I4 _n (m 4). Two bits I4 _n , I3 _n go directly to the fourth and third inputs of the second block of read-only memory and are denoted as Y4 _n and Y3 _n, and bits I2 _n and I1 _n are supplied to the first and second inputs of the differential encoder.

 The table presents data describing the operation of a differential encoder.

⊕ сумма по mod 2.The application of the differential encoding operation makes it possible to make the signal sequence generated by the device encoded by a convolutional code insensitive to phase jumps of the carrier wave, multiple of 90 ^about . The possibility of applying differential encoding is provided by the specific assignment of bits Y4 _n , Y3 _n , Y2 _n , Y1 _n , Y0 _{n to the} signal points of the ensemble of signals. From the output of the differential encoder, bits Q2 _n 'Q1 _n ' are sent to a convolutional encoder containing the sixth delay line 4, the fourth delay line 5, the fifth adder 6, the fifth delay line 7, the first inverter 8, the fourth adder 9, and the third delay line 10 , the second inverter 11 and the second adder 13 connected in series, the first multiplier 14, the third adder 15, and the first adder 16 and the third inverter 17 connected in series, the second multiplier 18 and the sixth adder 19. The following steps describe the operation of the convolutional encoder nological functional dependencies

⊕ mod 2 sum.

They associate the subsequent state W1 _{n + 1} , W2 _{n + 1} , W3 _{n + 1,} W4 _{n + 1} and the output bit Y0 _{n of the} encoder with the current state W1 _n W2 _n W3 _n W4 _n and the input bits of the encoder Q2 _n 'Q1 _n ' . These expressions are obtained by minimizing the full functional dependences due to the transition graph and the assignment of bits YI _n , I 0.1.4 to the signal points of the ensemble of signals using Veitch diagrams. The transition graph (Fig. 4) displays the operation of the convolutional encoder as a state machine with memory.

Each transition that leaves one state and leads to the next is assigned a specific set of signal points from the ensemble of signals, called a subset. The receipt of these subsets is based on the idea of mapping by splitting the set [1,2,4] In this case, the initial extended signal set (alphabet of signals) is sequentially divided into nested subsets, and the distance between the elements of the subset (signal points) at each step of the partition increases, and the number of elements in it decreases. As the initial extended signal set applied thirty-two-point cross-shaped constellation (32-CR) (figure 2). It is extended, because for transmitting m 4 non-encoded information bits over a channel for a modulation interval using the quadrature amplitude modulation (QAM) method, it would be sufficient to have an ensemble of signals consisting of 16 points (16-QA) (Fig. 3). The application of convolutional coding to the input information bits Q2 _n 'Q1 _n ' (m = 2) leads to the appearance of an additional redundant fifth bit Y0 _n . Therefore, the ensemble of signals must have M 2 ^{m + 1} 32 points. In this case, an ensemble of 32-CR signals with 90-degree symmetry is used, which is a necessary condition for ensuring the insensitivity of the generated signal sequence of the signals encoded by a convolutional code to phase jumps that are multiples of 90 ^about .

= 8(

2 число входных бит сверточного кодера) вложенных подмножеств А, В, С, D, E, F, G, H (фиг.2).Using an approach based on dividing the original signal set into nested subsets leads to dividing the original thirty-two-point signal set into 2

= 8 (

2 is the number of input bits of a convolutional encoder) of nested subsets A, B, C, D, E, F, G, H (Fig. 2).

+1) 3 шага. На первом шаге разбиения получается два подмножества (фиг.2) A∪B∪C∪D и E∪F∪G∪ H (U знак объединения) с минимальным евклидовым расстоянием Δ₁=

=2 где Δ_o- минимальное евклидово расстояние для исходного сигнального множества Δ_o=

.The partition is carried out in (

+1) 3 steps. At the first step of the partition, two subsets are obtained (Fig. 2) A∪B∪C∪D and E∪F∪G∪ H (U is the sign of the union) with a minimum Euclidean distance Δ ₁ =

= 2 where Δ _o is the minimum Euclidean distance for the original signal set Δ _o =

.

Δ₁= 2

. На последнем шаге разбиения имеем восемь подмножеств A, B, C, D, E, F, G, H с Δ₃=

Δ₂= 4. При вращении сигнального множества по часовой стрелке на 90^о подмножества A, B, C, D, E, F, G, H переходят соответственно в подмножества E, F, G, H, C, D, A, B. При вращении на 180^о подмножества A, B, C, D, E, F, G, H переходят соответственно в C, D, A, B, G, H, E, F, а при 270^о в G, H, E, F, A, B, C, D. Построение графа переходов базировалось на следующих правилах [3, 4]
а) граф переходов должен быть симметричен и все переходы в нем должны выполняться с одинаковой частотой;
б) переходам, начинающимся в одном состоянии и ведущим в различные состояния, необходимо ставить в соответствие сигналы одного из подмножеств, полученных на первом шаге разбиения;
в) сигналы из этих же подмножеств назначаются переходам, выходящим из различных состояний и ведущих в одно и то же состояние;
г) если обозначить q состояний кодера через i 0,1,q-1, то для того, чтобы кодер, и как результат, последовательность сигналов, были прозрачны к фазовой неопределенности в канале вязи, кратной 90^о, должны существовать функции однозначного соответствия f_l:0,1,q-1} _→0,1,q-1} l 1, 2, 3 такие, что выполняется следующее утверждение. Для каждого перехода из состояния i в состояние j, i, j ∈0,1,q-1} обозначим через ХО группу сигнальных элементов одного из полученных в результате разбиения подмножества, а через Х1, Х2 и Х3 группы сигнальных элементов, полученные из ХО посредством вращения по часовой стрелке соответственно на 90, 180 и 270^о. Тогда каждому переходу из состояния f_l(i) в состояние f_l(j), l 1, 2, 3 назначается группа сигнальных элементов Xl, l 1, 2, 3 соответственно.At the second step of the partition, we obtain the subsets AUB, CUD, EUF, GUH Δ ₂ =

Δ ₁ = 2

. At the last step of the partition, we have eight subsets A, B, C, D, E, F, G, H with Δ ₃ =

Δ ₂ = 4. When the rotation signal set clockwise by 90 ^{about the} subsets A, B, C, D, E, F, G, H respectively into subsets E, F, G, H, C, D, A, B . Upon rotation 180 ^{of the} subsets a, B, C, D, E, F, G, H respectively into C, D, a, B, G, H, E, F, and at 270 ^a in G, H, E, F, A, B, C, D. The construction of the transition graph was based on the following rules [3, 4]
a) the transition graph must be symmetrical and all transitions in it must be performed with the same frequency;
b) transitions starting in one state and leading to different states, it is necessary to match the signals of one of the subsets obtained in the first step of the partition;
c) signals from the same subsets are assigned to transitions emerging from different states and leading to the same state;
g) If we denote q i through encoder states 0.1, q-1, then to an encoder, and as a result, a signal sequence, are transparent to the phase uncertainty in the channel the tie multiple of ^90, there should be unambiguous correspondence function f _l : 0,1, q-1} _ → 0,1, q-1} l 1, 2, 3 such that the following statement holds. For each transition from state i to state j, i, j ∈0,1, q-1} we denote by XO the group of signal elements of one of the subsets obtained as a result of partitioning, and by X1, X2 and X3 the groups of signal elements obtained from XO by rotating clockwise respectively 90, 180 and 270 ^about . Then, each transition from the state f _l (i) to the state f _l (j), l 1, 2, 3 is assigned a group of signal elements Xl, l 1, 2, 3, respectively.

f₂:

f₃:

Для графа переходов (фиг. 4) квадрат свободного расстояния равен 12. Действительно, если по каналу передается последовательность сигнальных точек, принадлежащих, например, подмножеству А (нулевое состояние), то ближайшей к ней будет последовательность из сигнальных точек, принадлежащих подмножествам B-D (рассматривается решетчатая диаграмма, получающаяся при развертке графа переходов во времени). С учетом минимального расстояния между точками подмножеств А и В, А и D ( Δ_AB= 2

, Δ_AB=2 фиг.2) квадрат свободного расстояния между рассматриваемыми последовательностями будет равен d_своб ² Δ_AB ²+Δ_AD ² 12. Если за правильную последовательность выбрать любую другую, то также найдется последовательность, отстоящая от нее на расстоянии

.The transition graph is presented in figure 4. The unambiguous correspondence functions have the form
f ₁ :

f ₂ :

f ₃ :

For the transition graph (Fig. 4), the square of the free distance is 12. Indeed, if a sequence of signal points belonging to, for example, a subset A (zero state) is transmitted along the channel, then the sequence of signal points belonging to the subsets BD will be closest to it (considered trellis diagram obtained by scanning the transition graph in time). Given the minimum distance between the points of the subsets A and B, A and D (Δ _AB = 2

, Δ _AB = 2 of Fig. 2) the square of the free distance between the sequences in question will be equal to d _freedom ² Δ _AB ² + Δ _AD ² 12. If you choose any other for the correct sequence, then there is also a sequence spaced apart from it

.

10lg

4,7712∂Б.The free distance allows you to evaluate AEVK in comparison with the non-encoded transmission method KAM-16. Then, taking into account normalization by average power, for AEVK we have [2, 4]
G _c = 10lg

10lg

4.7712∂B.

From the output of the convolutional encoder, the output bits, denoted as Y0 _n , Y1 _n , Y2 _n , respectively arrive at the 5, 2, and 1 inputs of the second block of read-only memory, the 3 and 4 inputs of which are supplied with uncoded information bits, denoted by Y3 _n and Y4 _{n .} In accordance with the input sequence of bits YI _n , I 0,1. 4 in the block, a choice is made for transmitting on the channel one of the points of the alphabet of signals (FIG. 2).

To ensure the insensitivity of the signal elements of the ensemble of signals to phase jumps of the carrier wave, a multiple of 90 ^about , the assignment of bits YI _n , I 0,1.4 signal elements made in compliance with the following rules (figure 2):
1. The signal elements in each of 2 ^{m + 1} 2 ³ 8 subsets A, B, C, D, E, F, G, H are assigned the same bit values Y2 _n , Y1 _n , Y0 _n .

2. The group consisting of bits Y2 _n , Y1 _n corresponding to the sets of signal elements assigned to the transitions emerging from the same state of the transition graph contains all possible combinations of bits Y2 _n Y1 _n .

:

2_n

1_n

O_n
Для работы дифференциального кодера используется последовательность 11, 10, 01, 00, состоящая из различных битовых пар Y2_nY1_n и назначаемая согласно третьего пункта вышеизложенных правил последовательности сигнальных элементов группы, у которой каждый последующий элемент может быть получен из предыдущего путем вращения по часовой стрелке на 90^о.3. Control and communication protection Each of the four groups of elements in which each element pocleduyuschy can be obtained from the previous by the clockwise rotation of ^about 90 Hands, naznachayutcya different values of bit pairs Y2 _n Y1 _n;
4. Assignment of uncoded information bits Y4 _n Y3 _{n to the} signal elements of the ensemble of signals can be performed arbitrarily. In this case, the signal elements of the group consisting of the four elements received from the first rotation by 90, 180 and 270 ^on clockwise respectively assigned the same bits Y4 _n, Y3 _n. The following assignment of bits Y2 _n , Y1 _n , Y0 _n is applied, satisfying the first three points of the above rules:
Subsets

:

2 _n

1 _n

O _n
For the operation of the differential encoder, the sequence 11, 10, 01, 00 is used, consisting of various bit pairs Y2 _n Y1 _n and assigned according to the third paragraph of the above rules to the sequence of signal elements of the group, in which each subsequent element can be obtained from the previous one by rotating clockwise at 90 ^about .

In accordance with the input bits YI _n , I 0,1.4 in the second block 12 of read-only memory, a signal point is uniquely determined and the outputs of block 12 receive signals Q _n and P _n corresponding to the coordinates of the in-phase and quadrature components of the signal point.

The second block 12 of read-only memory is a read-only memory (ROM) that stores the values of the signal elements. The input bits YI _n , I = 0.1.4 for block 12 form the address code of the signal element in the ROM. Examples of implementation of block 12 are presented in Fig. 5.17, 18, p. 182, 183 [7]
Simulation results of the proposed device for encoding convolutional code have shown that in comparison with the prototype in channels with additive white Gaussian noise at the phase jumps of the carrier wave are multiples ^of 90, for small and medium-sized S / N ratio (15-18 dB), it provides a significant improvement noise immunity of the generated signal sequence by increasing the free distance between the signal sequences. So, for example, the code gain in comparison with the non-encoded transmission (KAM-16) in the channel with ABGS, phase ambiguity, multiple of 90 ^о , and information transfer rate of 9600 bit / s is about 3.6 dB at _Рш 10 ^-4 , which approximately 1.1 dB more than the code gain provided by the prototype device under the same conditions.

Claims (1)

 A convolutional device containing a first block of read-only memory, the first and second inputs of which are the same information inputs of the device, the first output of the first block of read-only memory is connected through the first delay element to the third input of the first read-only memory and directly to the first inputs of the first and second adders and the second block of read-only memory, the second output of the first block of read-only memory is connected through the second delay element to the fourth input of the first block of read-only memory memory and directly with the second inputs of the first adder and the second read-only memory block, the third and fourth inputs and outputs of which are respectively the same information inputs and outputs of the device, the output of the second adder is connected to the first input of the first multiplier, the output of which is connected to the first input of the third adder, the fourth an adder, the output of which through the third delay element is connected to the second input of the first multiplier and the first input of the second multiplier, the fourth delay element, the output of which connected to the first input of the fifth adder, the fifth delay element, characterized in that, in order to increase the noise immunity of the signal sequence generated by the device, inverters, the sixth adder and the sixth delay element are introduced into it, the output of the first adder is connected to the second input of the third adder, the output of which connected to the second input of the fifth adder, the output of which through the fifth delay element and the first inverter is connected in series with the second input of the second adder and the first input of the fourth the adder, the inputs of the second inverter and the sixth delay element are connected to the output of the third delay element, the output of the sixth delay element is connected to the input of the fourth delay element, the output of the second inverter is connected to the fifth input of the second read-only memory, the input of the third inverter is connected to the second output of the first read-only memory , the output is connected to the second input of the second multiplier, the output of which is connected to the first input of the sixth adder, the second input of which is connected to the first output of the first constant block memory, the output is connected to the second input of the fourth adder.

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