RU2024886C1 - Device for tuning phased arrays - Google Patents

Abstract

FIELD: radio engineering. SUBSTANCE: device for tuning phased arrays exercises the automatic phasing of the array elements into the point where a fixed metering probe is which results in obtaining tuning codes at the outputs of memory units at which the maximum amplification of the phased array is achieved in the direction in which the metering probe is disposed. In so doing the phased array tuning is exercised element by element taking into account the changes in the field phase distribution which take place due to these elements and the influence of these rephasings on the neighboring emitters. EFFECT: simpler design. 2 dwg

Description

 The invention relates to the field of antenna measurements and can be used to adjust the phased array antenna (PAR).

 The purpose of the invention is to increase accuracy and ensure that the HEADLIGHT tuning is performed in automatic mode.

 In FIG. 1 shows a diagram of an electrical structural device for tuning the HEADLIGHT; in FIG. 2 - phase measurement graphs of a controlled phase shifter.

 The device for tuning the PAR includes a microwave generator 1 connected in series, a directional coupler 2 and a first controlled discrete phase shifter 3, a frequency divider 4 in series with C, a first 5 and a second 6 frequency divider in two, the output of which is connected to the second and third control inputs of the first controlled discrete phase shifter 3, the first control input of which is connected to the output of the frequency divider 4 to C, the rectangular pulse generator 7 is connected in series, the frequency divider 8 to m, commutator OR 9 of the control signal, the control input of which is connected to the output of the square-wave pulse generator 7 through a frequency divider 10 by e, and the first output of the switch 9 is connected to the input of the first address switch 11 and to the input of the third frequency divider 12, the output of which is connected to the input of the second address switch 13 and to the input of the fourth frequency divider 14 into 2, the output of which is connected to the input of the third address switch 15, the i-th input of the first 11, second 13 and third 15 address switches in series through the adder m I will two first 16, second 17 and third 18 groups, respectively, connected to the first, second, third control inputs of the phase shifter 19 and the adjustable HEADLIGHT 20.

 The device also contains a serially connected probe 21, a second controlled discrete phase shifter 22, a balanced mixer 23, a switch 24, a first intermediate frequency amplifier (IFA) 25, and a phase meter 26, the second input of which is connected to the output of the second amplifier 27, the input of which is connected to the second output switch 24. The output of the phasemeter 26 is connected to the input of the decoder 28, the first, second and third outputs of which are connected to the input of the first 29, second 30 and third 31 address switches switches settings, the output of each of which is through block 4 of the memory 32, 33 and 34 is connected to the second input of the i-th adder modulo two first 16, second 17 and third 18 groups, respectively. The sixth 35 and seventh 36 frequency dividers into two are connected in series, and their outputs are connected to the second and third inputs of the second controlled phase shifter 22, the first control input of which and the input of the sixth frequency divider 35 are connected to the second output of the control signal switch 9. The output of the address block 37 is connected to the control input of the phase meter 26, the first 11, second 13, third 15 address switches, the first 29, second 30 and third 31 address switch settings. The control input of the switch 24 is connected to the output of the frequency divider 10 to e.

 The device for tuning the HEADLIGHT operates as follows.

The signal of the microwave generator 1, passing a directional coupler 2 and the first controlled discrete phase shifter 3, is subjected to triple phase manipulation, respectively, with indices of 45, 90 and 180 degrees. In this case, the state control signals of the discrete phase shifter 3 come respectively from the generator 7 of rectangular pulses through the frequency divider 4 to C, to the frequency dividers by two 5 and 6. The laws of change of state of the phase shifter 3, as well as the general law of phase change of the microwave signal at the output of phase shifter 3 are shown in FIG. 2, where the value of the signal frequency from the output of the frequency divider 6 into two is taken as Ω ₁ . To simplify the analysis, we approximate the stepwise law of phase change of the signal at the output of the phase shifter 3 into a sawtooth, as shown in FIG. 2.

можно представить в виде
θ(t) =

t = Ω₁t, а изменение частоты колебания при этом запишется в виде
Δ ω (t)=d θ (t) / d t=Ω .The law of the phase change of the signal θ (t) within one modulation period T ₁ =

can be represented as
θ (t) =

t = Ω ₁ t, and the change in the oscillation frequency is written in the form
Δ ω (t) = d θ (t) / dt = Ω.

, (1) где V₀ - амплитуда сигнала;
ω_o / 2 π - частота генератора СВЧ1;
t - время.Thus, the signal at the output of the phase shifter 3 due to modulation receives a frequency increment
U _c (t) = V ₀ e

, (1) where V ₀ is the signal amplitude;
ω _o / 2 π is the frequency of the microwave generator 1;
t is time.

сигнала, поступающего с выхода делителя 10 частоты на e, модулирующие сигналы поступают на управляющие входы подстраиваемого фазовращателя решетки, а в течение другой половины периода частоты Ω₃ / 2 π управляющие сигналы поступают на управляющие входы фазовращателя 22 измерительного канала. Переключение управляющего канала, поступающего с выхода делителя 8 частоты на m, осуществляется с помощью коммутатора 9. На фазовращатели 19 ФАР 20 управляющие сигналы проходят через адресный коммутатор 11, сумматоры 16 по модулю два для 45-градусных дискретов, адресный коммутатор 13 и сумматоры 17 по модулю 2 для 90-градусных дискретов, и адресный коммутатор 15, сумматоры 18 по модулю два для 180-градусных дискретов. При этом управляющие сигналы аналогичны изображенным на фиг. 2 с тем отличием, что сигнал модулирующей частоты для 180-градусного дискрета, поступающий с выхода делителя 14 частоты на 2, имеет частоту Ω₂ / 2 π.A signal of the form (1) is the signal of the reference channel input to the input of the balanced mixer 23. Consider the formation of the signal of the measuring channel coming to the other input of the balanced mixer 23. This is transmitted via a controlled discrete phase shifter 22 from the measuring probe 21, which, in turn, receives a tunable PAR 20 signal, which is a superposition of field vectors of individual emitters that differ in phase shifts. The state control of the phase shifters 19 of the PAR 20 is organized so that half the frequency period Ω ₃ / 2π =

signal output from the frequency divider 10 to e, modulating signals are supplied to control inputs of the phase shifter being adjusted grating, and during the other half period of frequency Ω _3/2 π control signals supplied to the control inputs of the phase shifter 22 of measuring channel. Switching the control channel from the output of the frequency divider 8 to m is carried out using switch 9. To the phase shifters 19 HEADLIGHTS 20 control signals pass through the address switch 11, the adders 16 modulo two for 45-degree discrete, the address switch 13 and the adders 17 module 2 for 90-degree samples, and the address switch 15, adders 18 modulo two for 180-degree samples. In this case, the control signals are similar to those shown in FIG. 2 with the difference that the signal for modulating the frequency of 180-degree increment output from the frequency divider 14 by 2, has a frequency Ω _2/2 π.

₍₂₎ где T₃ =

- период коммутации сигнала,
i - номер подстраиваемого фазовращателя ФАР 20,
φ₁ - фазовый сдвиг суммарного сигнала ФАР 20,
φ_i - фазовый сдвиг сигнала i-го излучателя,
U₁, U₁ ⁱ - амплитуды сигналов суммарного и i-го излучателей.Thus, at the beginning of the configuration, the address unit 37 sets all address switches 11, 13 and 15 to a position in which control signals are fed to the inputs of the phase shifter 19 of the HEADLIGHT 20. At the same time, the switch 9 switches the modulation to either phase shifter 19 or phase shifter 22 with a frequency Ω _2/2 π. The signal at the input of the balanced mixer 23 in this case takes the form:
U ₁ (t) =

₍₂₎ where T ₃ =

- period of signal switching,
i is the number of adjustable phase shifter PAR 20,
φ ₁ - phase shift of the total signal PAR 20,
φ _i - phase shift of the signal of the i-th emitter,
U ₁ , U ₁ ⁱ are the amplitudes of the signals of the total and ith emitters.

≈ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{1}}$ ,
так какU₁ ⁱ << U₁*
На выходе смесителя 23 без учета суммарной компоненты от перемножения сигналов (1) и (2) имеем сигнал вида
U₂(t) =

(3)
Коммутатор 24, управляющий тем же сигналом, что и коммутатор 9 управляющего сигнала, разделяет измерительный сигнал одного элемента в смеси с фоном, соответствующий верхней строчке выражения (3), и опорный сигнал всей ФАР (нижняя строка выражения (3) на два канала

(4)
УПЧ 25 и 27 настроены на промежуточную частоту Ω₁-Ω₂) / 2 π и имеют полосу пропускания, намного меньшую, чем скорость переключения коммутаторов 9 и 24, поэтому сигналы (4) УПЧ 25 и 27 из амплитудно-манипулированных превращаются в непрерывные с постоянной амплитудой
U₅ (t)=U ₅ ⁱ e

;
U₆ (t)=U₆ e

. (5)
Иными словами, УПЧ 25 и 27 вырезают только центральные несущие частоты амплитудно-манипулированных сигналов (4), превращая их в опорный и измерительный сигналы для фазометра 26. На выходе фазометра 26 формируется цифровой сигнал разности фаз двух когерентных сигналов φ₁-φ_i.

≈ U $\genfrac{}{}{0ex}{}{\text{*}}{\text{1}}$ ,
since U ₁ ⁱ << U ₁ *
At the output of the mixer 23 without taking into account the total component from the multiplication of signals (1) and (2) we have a signal of the form
U ₂ (t) =

(3)
The switch 24, controlling the same signal as the switch 9 of the control signal, separates the measuring signal of one element in the mixture with the background corresponding to the top line of expression (3), and the reference signal of the entire headlamp (bottom line of expression (3) into two channels

(4)
The amplifiers 25 and 27 are tuned to the intermediate frequency Ω ₁ -Ω ₂ ) / 2 π and have a bandwidth much lower than the switching speed of the switches 9 and 24; therefore, signals (4) of the amplifiers 25 and 27 are converted from amplitude-manipulated to continuous with constant amplitude
U ₅ (t) = U ₅ ⁱ e

;
U ₆ (t) = U ₆ e

. (5)
In other words, the IFA 25 and 27 cut out only the central carrier frequencies of the amplitude-manipulated signals (4), turning them into the reference and measuring signals for the phasemeter 26. At the output of the phasemeter 26, a digital signal of the phase difference of two coherent signals φ ₁ -φ _i is generated.

Simultaneously with the supply of signals to set the address of the switches 11, 13, 15, 29, 30 and 31, the address block 37 gives a signal to enable the reading of the measurement results to the phase meter 26, but with some delay necessary to establish the signals of the reference and measuring channels for the phase meter 26, t. e. the establishment of the oscillations in the amplifier 25 and 27. Then, the readings of the phasemeter 26 are read and digitally fed to the input of the decoder. Decoder 28 has three outputs, corresponding to 45, 90 and 180 degrees. The operation of the decoder 28 is based on comparing the readings of the phasemeter 26 with phase discrete from 0 to 360 degrees in increments of 45 degrees. For example, if the value of the phase shift between the signal element PAR 20 and PAR 20, the entire signal corresponds to ^about 40, the decoder 28 outputs a logic level ( "1") at the first output corresponding to the 45-degree increments (adjustable) phase shifter 20. If the PAR 19 value of the phase shift is ^about 285, the decoder 28 outputs the adjustment signal ( "1") on the second and third outputs simultaneously, corresponding to 90 and 180-degree phase shifter 19 being adjusted discrete FAS 20. These logic levels at the outputs of the decoder 28 via switch signal adjustment 29, 30, 31 are coupled to respective blocks 32, 33 and 34 of memory, which continue to hold logic level adjustment signal if they have been submitted, and after installation addressable switches 29, 30 and 31 in another position.

 After the reading and writing time of the tuning code into the storage devices of the first phase shifter PAR 20, the address block 37 switches the address switches 29, 30 and 31 to the inputs of the second lattice phase shifter. Similarly to the first, the phase shift of the signal of the second element of the PAR 20 is compared with the slightly changed phase shift of the overall signal of the PAR 20 due to the adjustment of the first element. The tuning codes for the second element of the array are recorded, and then the tuning process is carried out for all N elements of the PAR 20, with the adders 16, 17 and 18 modulo two used in the device to match the outputs of digital devices, i.e. the outputs of the address switches 11, 13 and 15, memory blocks 32, 33 and 34, which are included in the inputs of the phase shifters 19 of the HEADLIGHT 20.

 Thus, the invention allows automatic phasing of the lattice elements to the point where the stationary (measuring) probe 21 is located, which makes it possible to obtain tuning codes at the outputs of memory blocks 32, 33 and 34 at which the maximum amplification of the PAR 20 is achieved in the direction which contains the (measuring) probe 21. In this case, the phased adjustment of the PAR 20 is carried out taking into account changes in the phase distribution of the field that occur due to the rephasing of the elements and the effects of these rephasing on adjacent emitters. An element-wise comparison of the phases of the signals of individual elements with the phase of the signal from the entire lattice increases the accuracy of tuning the PAR 20.

Claims (1)

 DEVICE FOR CONFIGURING PHASED ANTENNA ARRAY (PAR), including a serially connected microwave generator, a directional coupler, a first controlled discrete phase shifter, a series-connected rectangular pulse generator, a frequency divider C, the output of which is connected to the first control input of the first controlled discrete phase shifter, the first and second frequency dividers into two, the outputs of which are connected to the second and third control inputs of the first controlled discrete phase shifter, the divider h frequency at m, the input of which is connected to the output of the square-wave pulse generator, the second output of the directional coupler is connected to the input of the tunable headlamp, containing i phase shifters of the tunable headlamp, a probe, the first intermediate frequency amplifier, the output of which is connected to the first input of the phase meter, characterized in that, with in order to improve accuracy and ensure that the tuning is performed in automatic mode, a control signal switch is connected in series, the input of which is connected to the output of the frequency divider by m, the first address switch, a third frequency divider in two connected in series, the input of which is connected to the output of the control signal switch, a fourth frequency divider in two, the outputs of the third and fourth frequency dividers in two connected to the input of the second and third address switches, respectively, and the i-th the output of the first, second and third address switches through the introduced i-th adder modulo 2 of the first, second and third groups, respectively, is connected to the first, second and third control inputs of the i-th a phase shifter of a tunable headlamp, respectively, connected in series to a second controlled discrete phase shifter, the input of which is connected to the probe output, a balanced mixer, a switch and a second intermediate frequency amplifier, the output of which is connected to the second input of the phase meter, and the first controlled input of the second controlled phase shifter is connected to the second output of the control switch a signal connected in series by the fifth and sixth frequency dividers into two, the outputs of which are connected to the second and third control the input inputs of the second controlled discrete phase shifter, and the input of the fifth frequency divider into two is connected to the second output of the control signal switch, the second input of the balanced mixer is connected to the output of the first controlled discrete phase shifter, the control input of the switch and the control input of the control signal switch are connected to the output of the square-wave generator through the introduced frequency divider by l, a decoder whose output is connected to the output of the phase meter and the first, second and third outputs to the input conducted by the first, second and third address configuration switches, respectively, the i-th output of the first, second and third address configuration switches, through the introduced i-th memory block is connected to the second input of the i-th adder modulo 2 of the first, second and third groups, respectively, the address block, the output of which is connected to the control input of the phase meter, first, second and third address switches, first, second and third address settings switches, where i = 1,2,3, ..., N is the phase shifter number of the adjustable HEADLIGHT.

Images