RU2018860C1 - Direction finding method of determining temporal location of videopulse - Google Patents

Abstract

FIELD: radio location. SUBSTANCE: time scale is formed according to the method, maximal value of videopulse is indicated, tracking thresholds are formed and values of droop of pulse and leading edge of the pulse are compared with values of thresholds. Moments when videopulses cross tracking thresholds are fixed and time location of videopulse is calculated subsequently. EFFECT: improved precision. 2 dwg

Description

 The invention relates to radar and can be used in areas where it becomes necessary to measure the temporal position of the video pulse for any ratio between the signal amplitude and the dynamic range of the receiver, in particular when the signal amplitude exceeds the dynamic range of the receiver.

 The purpose of the invention is to increase the accuracy of determining the temporal position of the video pulse for any ratio between the signal amplitude and the dynamic range of the receiver for video pulses in which the trailing edge is a mirror image of the leading edge, compressed or extended in time.

 Mathematically, the essence of the proposed method lies in the fact that the leading and trailing edges of the video pulse are linearly approximated by two points obtained at the moments when the last two measurement thresholds intersect, the obtained lines are extrapolated to the mutual intersection and the abscissa of the intersection point is used as the temporary position of the video pulse.

 Let us find a relation that allows us to determine the abscissa of the intersection point of the approximating lines.

, где V₁(t) - аналитическое представление переднего фронта видеоимпульса;
t₁, t₂ - моменты пересечения передним фронтом видеоимпульса следящих порогов V₁ = λ₁ V_m, V₂ = λ₂ V_m соответственно;
λ₁, λ₂ - относительные уровни измерения, причем 0 < λ₁ < λ₂ < 1.The equation of a line passing through two points of the leading edge can be represented as:
V ₁ (t) =

where V ₁ (t) is the analytical representation of the leading edge of the video pulse;
t ₁ , t ₂ - moments of crossing the leading edge of the video pulse of the following thresholds V ₁ = λ ₁ V _m , V ₂ = λ ₂ V _m, respectively;
λ ₁ , λ ₂ are relative measurement levels, with 0 <λ ₁ <λ ₂ <1.

V _m - the maximum value of the video pulse.

, где V₂(t) - аналитическое представление заднего фронта видеоимпульса;
t₃, t₄ - моменты пересечения задним фронтом видеоимульса следящих порогов V₂ и V₁ cоответственно.Similarly, the equation of a line passing through two points of a trailing edge
V ₂ (t) =

where V ₂ (t) is the analytical representation of the trailing edge of the video pulse;
t ₃ , t ₄ - the moments of crossing the trailing edge of the video pulse tracking thresholds V ₂ and V _1, respectively.

При этом достигается поставленная цель изобретения для указанного в ней класса видеоимпульсов, передний и задний фронты которых в этом случае можно представить соответственно в виде
V₁(t) = V_mφ₁[α(t_m-t)],
V₂(t) = V_mφ₁[α(t-t_m)] где φ₁(˙) - аналитическое представление переднего фронта нормированного видеоимпульса;
α- масштабирующий множитель с размерностью частоты;
t_m - абсцисса максимума видеоимпульса;
К - коэффициент, учитывающий сжатие (растяжение) заднего фронта видеоимпульса по отношению к переднему фронту.Given that at the intersection point t _{o of the} approximating straight lines, the ordinates are the same, i.e. V ₁ (t _o ) - V ₂ (t _o ), define
t _o =

In this case, the object of the invention is achieved for the class of video pulses indicated in it, the leading and trailing edges of which in this case can be represented, respectively, in the form
V ₁ (t) = V _m φ ₁ [α (t _m -t)],
V ₂ (t) = V _m φ ₁ [α (tt _m )] where φ ₁ (˙) is the analytical representation of the leading edge of the normalized video pulse;
α- scaling factor with frequency dimension;
t _m is the abscissa of the maximum video pulse;
K is a coefficient taking into account compression (tension) of the trailing edge of the video pulse with respect to the leading edge.

At the time t ₁ crossing the leading edge of the video pulse of the first tracking threshold, the equality
V ₂ (t ₁ ) = V ₁ .

Or after substituting values
V _m · φ ₁ [α (t _m -t ₁ )] = V ₁ .

/α=t_m-a,, где φ₁ ^-1 - функция, обратная φ $\genfrac{}{}{0ex}{}{\text{-}}{\text{1}}$ ¹(·),
a=

/α...Where from
t ₂ = t _m -

/ α = t _m -a ,, where φ ₁ ^-1 is the inverse function of φ $\genfrac{}{}{0ex}{}{\text{-}}{\text{1}}$ ¹ ()
a =

/ α ...

/α=t_m-b,,
t₃=t_m+

/kα=t_m+c,,
t₄= t_m+

/kα=t_m+d,, где b=

/α, c=

/kα, d=

/kα.Similarly, we determine the moments t ₂ , t ₃ , t _{4 of the} intersection by the leading edge of the video pulse of the second tracking threshold, the trailing edge of the second and first tracking thresholds, respectively:
t ₂ = t _m -

/ α = t _m -b ,,
t ₃ = t _m +

/ kα = t _m + c ,,
t ₄ = t _m +

/ kα = t _m + d ,, where b =

/ α, c =

/ kα, d =

/ kα.

Раскроем скобки и приведем подобные члены в последнем выражении:
t_o= t_m+

Нетрудно убедиться с учетом введенных обозначений, что ас - bd = 0, Окончательно
t_o = t_m.We substitute the found values of the moments of intersection by the leading and trailing edges of the video pulse of two tracking thresholds in the expression for determining the temporary position of the video pulse by the proposed method:
t _o =

We expand the brackets and give similar terms in the last expression:
t _o = t _m +

It is easy to verify, taking into account the introduced notation, that ac - bd = 0.
t _o = t _m .

Thus, for video pulses in which the trailing edge is a mirror image of the leading edge, compressed or extended in time, the proposed method provides an estimate of the temporal position of the video pulse, independent of the ratios V ₁ / V _m and V ₂ / V _m , i.e. unchanged at any selected measurement thresholds.

If the amplitude of the input signal falls into the dynamic range of the receiver, the measurement thresholds are V ₁ = λ ₁ V _m and V ₂ = λ ₂ V _m . If the amplitude of the input signal exceeds the dynamic range of the receiver, the video pulse is limited from above. In this case, the maximum value of the video pulse coincides with the upper limit of the dynamic range of the receiver, and the values V ₁ = λ ₁ V _g and V ₂ = λ ₂ V _g are used as measurement thresholds, where V _g is the value of the upper limit of the dynamic range of the receiver.

 But the assessment of the temporary position of the video pulse by the proposed method in any of the cases considered remains unchanged. At the same time, the prototype method provides a constant estimate of the temporal position of the video pulse when the amplitude of the input signal exceeds the dynamic range of the receiver only for signals with a linear edge.

_ t_c,
На фиг.1 приведена структурная схема устройства для осуществления способа.The formation of tracking thresholds requires a delay of the video pulse for a time t _c no less than the a priori known time for the video pulse to reach its maximum value. In view of this and the above calculations, the physical nature of the proposed method consists in forming a time scale, fixing the maximum value of the video pulse V _m , forming the first V ₁ = λ ₁ V _m and the second V ₂ = λ ₂ V _m tracking thresholds, 0 < λ ₁ <λ ₂ <1 delay the video pulse for a time t _c , no less than the a priori known time of the video pulse reaching the maximum value, compare the value of the leading edge of the delayed video pulse with the first tracking threshold and at the moment of crossing the leading edge of this threshold form the first comparison signal, which fixes the time value t ₁ on the time scale, compares the value of the leading edge of the delayed video pulse with the second tracking threshold, and at the moment the leading edge crosses the second monitoring threshold, a second comparison signal is generated, which fixes the time value t ₂ on the time scale, compare the value the trailing edge with said second delayed video pulse followed threshold and the moment of crossing this threshold the trailing edge forming a third comparison signal which fixed value t ₃ on a scale Yemeni, comparing the falling edge delayed video pulse value to a first threshold and followed at the time of intersection of the trailing edge forming a fourth threshold comparison signal, the value of which is fixed time t ₄ to time scale determined by the time t _o video pulse position according to the formula
t _o =

_ t _c ,
Figure 1 shows the structural diagram of a device for implementing the method.

The device contains an input 1 supply voltage of the video pulse, input 2 supply voltage of the detection threshold, input 3 "Start" of the device, input 4 "Stop" of the device, delay element 5, pulse counter 6, delay element 7, element And 8, pulse generator 9, triggers 10, 11, OR elements 12, 13, key 14, comparator 15, And 16 element, triggers 17-20, And 21-24 elements, inverters 25, 26, differentiation elements 27, 28, delay element 29, comparators 30, 31 , peak detector 32, differentiation element 33, delay element 34, trigger 35, voltage divider 36 from series resistance resistors R ₁ , R ₂ , R ₃ , group of elements AND 37, group of elements AND 38, group of elements AND 39, group of elements AND 40, element OR 41, registers 42, 43, group of elements AND 44, group of elements AND 45, group of elements OR 46, group of elements OR 47, multiplication unit 48, elements OR 49, 50, element 51, delay element 52, group of elements 53, group of elements 54, group of elements OR 55, counter 56, accumulating adder 57, division block 58, the group of elements AND 59, the register 60, the group of elements AND 61, the element OR 62, the group of elements OR 63, the accumulating adder 64, the group of elements entov And 65, a group of outputs 66 ₁ -66 _m device, where m is the capacity of the time code. The multiplication unit 48 and the division unit 58 can be performed according to the scheme of read-only memory of the matrix type.

 Figure 2 shows the structural diagram of these blocks.

It contains inputs 67 ₁ -67k of supplying the code of the first number, inputs 68 ₁ -68k of supply of the second number, where k is the bit depth of the numbers, installation input 69, initiating input 70, registers 71, 72, decoders 73, 74, group of registers 75, the number of registers 75 of the group of elements AND 76, the group of elements OR 77, register 78, the outputs of the result in the direct code 79 ₁ -79 _m , the outputs of the result in the reverse code 80 ₁ -80 _m .

 In block division 58 there are no registers 71 and 72. Their role is played by the counter 56 and the adder 57.

 The device operates as follows.

In the initial state, triggers 10, 11, 17, 18, 19, 20, 35 are reset. The zero level from the direct output of the trigger 10 closes the And 8 element, blocking the further propagation of pulses from the output of the running pulse generator 9. The zero level from the direct output of the trigger 11 closes the And 16 element. The zero levels from the direct outputs of the triggers 17-20 close the And 37 elements, respectively 39, 38, 40. The zero level from the direct output of the trigger 35 closes the elements And 21, 22, 23, 24, 51. At the input 2 of the device, a detection threshold voltage is applied, which leads to the appearance of a zero level at the output of the comparator 15, which opens the key 14 . The peak detector 32 is reset to zero, at the outputs of the comparators 30 and 31 arbitrary levels that can change under the influence of noise. The pulses generated when the differentiation elements 27 and 28 change levels are quenched by closed elements I 21, 22, 23, 24, 51. Registers 42, 43, counters 6, 56, adders 57, 64 are reset. The inverse code of the value (-1) t _c is entered into register 60 and adder 64, where t _c is the delay time of the delay element 29, registers 71 and 72 are reset in the multiplication unit 48, the codes of the results of the operation of multiplying two k-bit numbers are entered in the registers 75 . In the division block 58, the codes of the results of the operation of dividing two k-bit numbers are entered into the registers 75 (the inputs of the initial settings and the entries of the entries are not shown in the drawing).

 At the beginning of the measurements, a pulse is applied to input 3 of the “Start” device, which transfers trigger 10 to a single state. A single level from the direct output of trigger 10 opens the And 8 element and pulses from the output of the pulse generator 9 are counted in counter 6. A discrete time scale is formed.

When the voltage of the front of the video pulse arriving at input 1 exceeds the voltage of the detection threshold, a single positive voltage drop is formed at the output of the comparator 15 and a unit level is established. From a single voltage drop, the differentiation element 33 generates a pulse of positive polarity arriving at the input of the delay element 34. A single level from the output of the comparator 15 closes the key 14, which ensures the supply of voltage of the video pulse to the inputs of the delay element 29 and the peak detector 32. The peak detector 32 monitors the current value the voltage front of the video pulse, fixes its maximum value V _m and feeds it to the input of the voltage divider 36. In this case, a voltage is formed at the common point of the resistors R ₁ and R ₂ the first monitoring threshold V ₁ = λ ₁ V _m , which is supplied to the first input of the comparator 31, and at the common point of the resistors R ₂ and R _{3 the} voltage of the second monitoring threshold V ₂ = λ ₂ V _m , which is supplied to the first input of the comparator 30. The appearance of voltage tracking thresholds at the first inputs of the comparators 30 and 31 leads to the establishment at their outputs of zero levels.

In the delay element 29, the video pulse is delayed by a time t _c not less than the time it reaches its maximum value (a priori known), measured by the level of the detection threshold.

 The delay time of the delay element 34 is less than the delay time of the delay element 29 by the time of the trigger 35. The pulse from the output of the delay element 34 puts the trigger 35 in a single state. A single level from the direct output of the trigger 35 opens the elements And 21, 22, 23, 24, 51. The voltage of the delayed video pulse from the output of the delay element 29 is supplied to the second inputs of the comparators 30, 31.

 When the voltage of the front of the delayed video pulse coincides with the voltage of the first tracking threshold, a single positive voltage drop is formed at the output of the comparator 31, from which the differentiation element 28 forms a pulse of positive polarity. The generated pulse is fed to the input of the inverter 26, passes through the open element And 23 and puts the triggers 19 and 11 (the last through the element OR 13) in a single state. The pulse of negative polarity from the output of the inverter 26 is suppressed by the input circuits of the diode isolation of the elements And 24, And 51 (not shown in figure 1).

 A single level from the direct output of the trigger 11 opens the And 16 element. A single level from the direct output of the trigger 19 opens the And 38 elements.

The next nearest pulse from the output of the pulse generator 9 passes through the elements And 8, 16 to the counting input of the counter 56, and also reads the time code t ₁ from the discharge outputs of the counter 6 and enters it into the register 71 of the multiplication unit 48 through the elements AND 38, OR 46.

 The pulses from the outputs of the AND 38 elements are combined by the OR 41 element and the received pulse resets the trigger 19.

 The pulse from the output of element And 8 is delayed by the delay element 7 for the duration of reading the time code from the discharge outputs of counter 6, after which it is fed to the counting input of the latter, increasing its value by one.

 The zero level from the direct output of the trigger 19 closes the AND 38 elements. Subsequent pulses from the output of the And 8 element pass through the And 16 element and continue to be counted in the counter 56.

 When the voltage of the front of the delayed video pulse coincides with the voltage of the second tracking threshold, a single positive voltage drop is formed at the output of the comparator 30, from which the differentiation element 27 forms a pulse of positive polarity. The generated pulse is fed to the input of the inverter 25, passes through the open element And 22 and puts the trigger 18 in a single state, and the trigger 11 (through the element OR 12) - in the zero state.

The zero level from the direct output of the trigger 11 closes the element And 16, which ensures the fixation in the counter 56 of the code of the time difference t ₂ -t ₁ .

 A single level from the direct output of the trigger 18 opens the And 39 elements. A pulse of negative polarity from the output of the inverter 25 is suppressed by the input circuits of the diode isolation of the And 21 element (not shown in FIG. 1).

The next closest pulse from the output of the And 8 element reads the time code t ₂ from the outputs of the counter 6 and, through the And 39 elements, enters it into the register 42. The pulses from the outputs of the And 39 elements are combined by the OR 41 element and the received pulse resets trigger 18. Zero level from direct trigger output 18 closes the elements And 39.

 With the coincidence of the voltage drop of the video pulse with the voltage of the detection threshold at the output of the comparator 15, a single negative voltage drop is formed and a zero level is set. From the differential element, the differentiation element 33 forms a pulse of negative polarity, which is then suppressed by the input circuits of the diode isolation of the trigger 35 (not shown in Fig. 1). A zero level from the output of the comparator 15 opens the key 14.

 When the decay voltage of the delayed video pulse coincides with the voltage of the second tracking threshold, a single negative voltage drop is formed at the output of the comparator 30, from which the differentiation element 27 forms a pulse of negative polarity. The generated pulse is suppressed by the input circuits of the diode isolation of the element And 22 (not shown in figure 1), the inverted inverter 25 passes through the element And 21 and translates the triggers 17 and 11 (the last through the element OR 13) to a single state.

 A single level from the direct output of the trigger 11 opens the And 16 element. A single level from the direct output of the trigger 17 opens the And 37 elements.

The next closest pulse from the output of the pulse generator 9 passes through the elements And 8, 16n to the counting input of the counter 56, and also reads the time code t ₃ from the output outputs of the counter 6 and enters it into the register 72 of the multiplication unit 48 through the elements AND 37, OR 47. The pulses from the outputs of the AND 37 elements are combined by the OR 41 element and the received pulse resets the trigger 17. A zero level from the direct output of the trigger 17 closes the And 37 elements. Subsequent pulses from the output of the And 8 element pass through the And 16 element and continue to be counted in the counter 56.

 When the recession voltage of the delayed video pulse coincides with the voltage of the first tracking threshold, a single negative voltage drop is formed at the output of the comparator 28, from which the differentiation element 28 forms a pulse of negative polarity. The generated pulse is suppressed by the input circuits of the diode isolation of the element And 23 (not shown in figure 1), the inverted inverter 26 passes to the output of the element And 51, passes through the element And 24 and puts the trigger 20 in a single state, and the trigger 11 (through the element OR 12 ) to the zero state.

The zero level from the direct output of the trigger 11 closes the And 16 element, which ensures the fixation in the counter 56 of the code t ₂ -t ₁ + t ₄ -t ₃ , which from its discharge outputs is fed to the inputs of the decoder 73 of the division unit 58.

 A single level from the direct output of the trigger 20 opens the elements And 40.

The next nearest impulse from the output of the And 8 element reads from the bit outputs of the counter 6 a time code t ₄ and enters it into the register 43 through And 40 elements.

 The pulses from the outputs of the AND 40 elements are combined by the OR 41 element and the received pulse resets the trigger 20. The zero level from the direct output of the trigger 20 closes the And 40 elements.

 The pulse from the output of the element And 51 is fed to the input of the delay element 52 and puts the trigger 35 in the zero state. The zero level from the direct output of the trigger 35 closes the elements And 21, 22, 23, 24, 51.

The pulse delayed by the switching time of the trigger 35 from the first tap of the delay element 52 resets the peak detector 32 and, through the OR element 49, enters the initiating input 70 of the multiplication unit 48. This leads to the output of the result of the multiplication of codes t ₁ xt ₃ from the corresponding register 75 through the corresponding group of elements And 76 and OR element 77 in register 78.

Additionally, the pulse delayed during the transient in the multiplication unit 48 from the second tap of the delay element 52 reads the return result code (-1) xt ₁ xt ₃ from the outputs 80 ₁ -80 _m of the multiplication unit 48 and enters it through the AND 53, OR 55 elements adder 57.

 Additionally, the pulse delayed from the third tap of the delay element 52, delayed by the reading time, is transmitted through the OR element 50 to the installation input 69 of the multiplication block, where it resets the registers 71, 72, 78.

Additionally delayed during the initial settings, the pulse from the fourth tap of the delay element 52 reads the time codes t ₂ and t ₄ from the registers 42 and 43, respectively, and through the elements AND 44, OR 47 and AND 45, OR 46 enters it into the registers 72 and 71 of the block multiplications of 48 respectively.

Additionally, the pulse delayed from reading from the fifth tap of the delay element 52 through the OR element 49 is supplied to the initiating input 70 of the multiplication unit 48. This leads to the output of the code multiplication t ₂ xt ₄ from the corresponding register 75 through the corresponding group of AND elements 76 and the OR element 77 to register 78.

Additionally, the pulse delayed during the transient in the multiplication unit 48 from the sixth tap of the delay element 52 reads the direct result code t ₂ xt ₄ from the outputs 79 ₁ -79 _m of the multiplication unit 48 and feeds it through the AND 54, OR 55 elements to the counting inputs of the adder 57 working in accumulation mode. This leads to the formation at the bit outputs of the adder 57 of the code of the quantity t ₂ xt ₄ - t ₁ xt ₃ , which is fed to the inputs of the decoder 74 of the division unit 58.

Дополнительно задержанный на время переходных процессов в блоке деления 58 импульс с восьмого отвода элемента задержки 52 считывает прямой код результата операции деления с выходов 79₁-79_m блока деления и через элементы И 59, ИЛИ 63 подает его на счетные входы сумматора 64, работающего в режиме накопления. Это приводит к формированию на разрядных выходах сумматора 64 кода временного положения видеоимпульса
t_o=

- t_c
Дополнительно задержанный на время считывания и на время выполнения операции сложения в сумматоре 64 импульс с выхода элемента задержки 52 производит начальные установки сумматора 57 и блока деления 58, считывает с разрядных выходов сумматора 64 код временного положения видеоимпульса и через элементы И 65 выдает его на выходы 66₁-66_mустройства.Additionally, the pulse from the seventh tap of the delay element 52, delayed by the time of reading and during the addition operation in the adder 57, makes the initial settings in the multiplication unit 48 through the OR element 50 and is fed to the initiating input 70 of the division unit 58. This leads to the issuance of the block in register 78 division 58 of the result code of the division operation

Additionally, the pulse delayed by the time of transients in the division 58 from the eighth tap of the delay element 52 reads the direct code of the result of the division operation from the outputs 79 ₁ -79 _m of the division block and feeds it through the AND 59, OR 63 elements to the counting inputs of the adder 64 operating in accumulation mode. This leads to the formation of the bit outputs of the adder 64 code temporary position of the video pulse
t _o =

- t _c
Additionally, the pulse from the output of the delay element 52, delayed by the time of reading and during the addition operation in the adder 64, makes the initial settings of the adder 57 and the division unit 58, reads the code of the temporary position of the video pulse from the outputs of the adder 64, and outputs it to the outputs 66 through the And 65 elements ₁ -66 _m device.

The pulses from the outputs of the AND 65 elements are combined by the OR element 62 and the received pulse resets the registers 42, 43, 56, the adder 64, and also reads the inverse code of the value (-1) t _c from the register 60 and enters it through the AND 61, OR 63 elements adder 64.

 The device is ready to determine the temporary position of the next video pulse.

 Upon completion of the measurements, a pulse is applied to the input 4 of the “Stop” device, which is fed to the input of the delay element 5 and puts the trigger 10 in the zero state. Zero level from the direct output of the trigger 10 closes the element And 8.

 The delay time of the delay element 5 is longer than the delay time of the delay element 7 during the transients of the counter 6. The pulse from the output of the delay element 5 resets the counter 6. The device is in the initial state.

 The introduction of new operations with the proposed method allows, in comparison with the prototype method, to increase the accuracy of determining the temporal position of the video pulse for any ratio between the amplitude of the video pulse and the dynamic range of the receiver for video pulses in which the trailing edge is a mirror image of the leading edge, compressed or extended in time.

Claims (1)

A direction finding method for determining the temporal position of a video pulse, which consists in forming a time scale, fixing the maximum value of the video pulse v _m , forming the first v ₁ = λ ₁ v _m and the second v ₂ = λ ₂ v _m tracking thresholds, 0 << λ ₁ <<λ ₂ << 1, the video pulse is delayed for a time t _c no less than the a priori known time of the video pulse reaching the maximum value, the value of the leading edge of the delayed video pulse is compared with the first tracking threshold, and at the moment the front edge crosses this threshold, the first signal l comparison, which fixes the value of time t ₁ on a time scale, compares the value of the leading edge of the delayed video pulse with the second tracking threshold, and at the moment of crossing the leading edge of the second tracking threshold, a second comparison signal is generated, which fixes the value of time t ₂ on the time scale, characterized in that, in order to increase the accuracy of determining the temporary position for any ratio between the amplitude of the video pulse and the dynamic range of the receiver for video pulses in which the trailing edge is by mirroring the leading edge, compressed or extended in time, the value of the trailing edge of the delayed video pulse is compared with the second tracking threshold, and at the moment of crossing this threshold by the trailing edge, a third comparison signal is generated, which fixes the time value t ₃ on the time scale, and the value of the trailing edge of the delayed video pulse is compared with the first tracking threshold and at the moment of crossing the trailing edge of this threshold, a fourth comparison signal is formed, which fixes the value of time t ₄ on the time scale , determine the temporary position of the video pulse t ₀ according to the formula t _o =

_ t _c,.

Images