RU2013133611A - DELAY CONTROLLED DEVICE - Google Patents
DELAY CONTROLLED DEVICE Download PDFInfo
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- RU2013133611A RU2013133611A RU2013133611/08A RU2013133611A RU2013133611A RU 2013133611 A RU2013133611 A RU 2013133611A RU 2013133611/08 A RU2013133611/08 A RU 2013133611/08A RU 2013133611 A RU2013133611 A RU 2013133611A RU 2013133611 A RU2013133611 A RU 2013133611A
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- input
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- controlled delay
- adder
- delay line
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Abstract
Управляемое устройство задержки, содержащее первую линию управляемой задержки, отличающееся тем, что в него введены сумматор, вычитающий счетчик импульсов, генератор импульсов эталонной частоты, пороговый элемент, элемент памяти, ограничитель и вторая линия управляемой задержки, высокочастотный вход устройства соединен с первым входом сумматора, вход импульса запуска устройства - со вторым входом сумматора и со входом записи вычитающего счетчика импульсов, счетный вход которого соединен с выходом генератора импульсов эталонной частоты, программный вход - со входом управления устройства, а выход - с сигнальным входом элемента памяти, сигнальный вход первой линии управляемой задержки соединен с выходом сумматора, управляющий вход - со старшими разрядами входа управления устройства, а выход - со входом ограничителя и входом порогового элемента, соединенного своим выходом со входом записи элемента памяти, сигнальный вход второй линии управляемой задержки соединен с выходом ограничителя, управляющий вход - с выходом элемента памяти, а выход является выходом устройства.A controlled delay device containing a first controlled delay line, characterized in that an adder subtracting a pulse counter, a pulse frequency generator of a reference frequency, a threshold element, a memory element, a limiter and a second controlled delay line, a high-frequency input of the device is connected to the first input of the adder are introduced into it, the input pulse of the device’s start is with the second input of the adder and with the recording input of the subtracting pulse counter, the counting input of which is connected to the output of the reference pulse generator s, the program input is with the control input of the device, and the output is with the signal input of the memory element, the signal input of the first controlled delay line is connected to the output of the adder, the control input is with the upper bits of the control input of the device, and the output is with the input of the limiter and the input of the threshold element connected by its output to the input of the memory element record, the signal input of the second controlled delay line is connected to the output of the limiter, the control input is connected to the output of the memory element, and the output is the output of the device.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| RU2013133611/08A RU2542576C1 (en) | 2013-07-18 | 2013-07-18 | Controlled delay device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| RU2013133611/08A RU2542576C1 (en) | 2013-07-18 | 2013-07-18 | Controlled delay device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| RU2013133611A true RU2013133611A (en) | 2015-01-27 |
| RU2542576C1 RU2542576C1 (en) | 2015-02-20 |
Family
ID=53281112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| RU2013133611/08A RU2542576C1 (en) | 2013-07-18 | 2013-07-18 | Controlled delay device |
Country Status (1)
| Country | Link |
|---|---|
| RU (1) | RU2542576C1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2746958C1 (en) * | 2020-09-22 | 2021-04-22 | Российская Федерация, от имени которой выступает Государственная корпорация по атомной энергии "Росатом" (Госкорпорация "Росатом") | Start signal delayer |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SU1630589A1 (en) * | 1989-05-31 | 1994-10-15 | В.И. Линючев | Delay unit |
| SU1734562A1 (en) * | 1989-11-27 | 1994-11-30 | Научно-исследовательский институт измерительных систем | Device for delay of high-frequency signal |
| KR20010053677A (en) * | 1999-12-01 | 2001-07-02 | 박종섭 | Delay circuit capable of program |
| US6496048B1 (en) * | 2000-07-20 | 2002-12-17 | Silicon Graphics, Inc. | System and method for accurate adjustment of discrete integrated circuit delay lines |
| US7855611B2 (en) * | 2006-11-15 | 2010-12-21 | Qualcomm Incorporated | Delay line calibration |
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2013
- 2013-07-18 RU RU2013133611/08A patent/RU2542576C1/en active
Also Published As
| Publication number | Publication date |
|---|---|
| RU2542576C1 (en) | 2015-02-20 |
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