RU1840900C - Composite signal parameter analyser - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: analyser comprises a limiting amplifier, two multipliers, a delay line, a signal and signal parameter selection unit, an adder, two squaring devices, a quardrature directional coupler, a frequency doubler, four low-pass filters, two subtractor units, an additional delay line, two additional multipliers, an additional quardrature directional multiplier, connected to each other in a certain manner.

EFFECT: broader functional capabilities.

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Description

The proposed device relates to pulse information receivers used in radar, radio reconnaissance and is intended to determine the type of modulation and measure the modulation parameters of complex signals.

Currently, analyzers of modulation parameters of complex signals are known. We will carry out their comparative analysis.

As the first analogue, we consider a device that measures the frequency deviation of signals with linear frequency modulation (LFM), determines the number of phase jumps of signals with binary 0, π phase shift keying (FM) and the type of modulation of the incoming signal (LFM or FM signal).

The disadvantages of the known device are:

1. Low sensitivity of the measuring channel during the processing of chirp signals.

2. Recognition and measurement of frequency deviation of chirp signals is possible only in a limited range of parameters of their modulating functions.

3. A narrow band of operating frequencies when processing FM signals.

The low sensitivity of the measuring channel when processing the LFM signals is due to the fact that the input of the counter of the known device receives the total noise of the low-pass filter and a band-pass filter, and information about the frequency deviation of the LFM signal is received only from a narrow-band low-pass filter.

Recognition and measurement of the frequency deviation of the chirp signals in a limited range of modulation parameters of the modulating functions is determined by the need to select the device parameters taking into account the inequalities:

$${\tau }_s\le \frac{{\tau }_{dm\mathrm{and}\mathrm{<figure-callout\; id="2"\; label="n"\; filenames="00000003.png,00000004.png"\; state="\{\{state\}\}">n</figure-callout>}}}{2};\left(\mathrm{one}\right)$$

$$\mu \le \frac{f_{\mathrm{from}R}-\frac{\mathrm{one}}{T_{m\mathrm{and}n}}}{{\tau }_s};\left(2\right)$$

where τ _s - the delay value of the signal in the delay line;

τ _{d min} - the minimum duration of the discrete code FM signals;

µ is the frequency tuning frequency of the chirp signal;

f _cf - the first cut-off frequency of the band-pass filter;

T _min - the minimum duration of the envelope of the chirp signal.

The need to fulfill the condition ω ₀ τ _s = 2πn, where ω ₀ is the carrier frequency of the FM signal n = 1, 2, 3 ..., limits the width of the working band when processing FM signals.

As a second analogue, we consider a device that also measures the frequency deviation of the LFM signals, determines the number of phase overshoots in the FM signal code and the type of modulation of the incoming signal. A distinctive feature of this device is its high sensitivity when analyzing chirp signals. An increase in the sensitivity of the measuring channel is achieved by introducing into a known device a circuit for blanking the output of the bandpass filter, which is carried out by a pulse that determines the reception of a signal with linear frequency modulation. The disadvantages of the device are set forth in paragraphs 2, 3, the disadvantages of the first analogue.

As a third analogue, we consider the device described in ed. testimonial. No. 1840896 dated 07/05/1976), in which binary FM signals are recognized in a wide frequency band, and modulation parameters are measured (frequency deviations of the LFM signals are carried out in a wide range of values of their modulating functions. This device is, by technical essence, the closest to the claimed selected as a prototype, it contains an amplifier-limiter, three multipliers, two delay lines, a broadband quadrature directional coupler, a reset pulse shaper (control shaper pulses), the input of the device through the amplifier-limiter connected to the inputs of the delay lines, the driver and the first inputs of the multipliers connected together; the output of the first delay line is connected to the input of the broadband quadrature directional coupler, the first and second outputs of which are connected respectively to the second inputs of the first and second multipliers; the output of the second delay line is connected to the second input of the third multiplier; two band-pass filters, an adder, a low-pass filter, three quadrators and three peak detectors with a reset, an inverter, five threshold circuits; two counters, an “AND” circuit, five keys, an “OR” circuit, while the outputs of the first and second multipliers, respectively, through bandpass filters and quadrators are connected to the inputs of the adder, the output of which is connected to the inputs of the first and second circuits connected together, the first circuit containing the first peak detector and the threshold circuit are connected in series, and the second circuit is the second threshold circuit, the first key and counter, the fourth key; the output of the third multiplier through a low-pass filter is connected to the inputs of the third, fourth and fifth circuits connected together, and the third circuit contains the third quadrator and the threshold circuit, the second key and counter, the fifth key, the fourth circuit - the second peak detector and the fourth threshold circuit, the fifth circuit is an inverter, a third peak detector and a fifth threshold circuit; the outputs of the fourth and fifth circuits, respectively, are connected to the inputs of the "AND" circuit, the output of which through the third key is connected to the control input of the fifth key; the outputs of the second and third circuits are respectively connected to the inputs of the OR circuit, and the output of the first circuit is connected to the control inputs of the third and fourth keys; the first and second outputs of the shaper are respectively connected to the reset inputs of the peak detectors, counters connected together, and to the control inputs of the first and second keys.

In the known device, the expansion of the range of variation of the parameters of the modulating functions of the chirp signals when measuring the frequency deviation is achieved through the use of an additional single-channel autocorrelator, for the parameters of which inequality (1) is not satisfied. The width of the working frequency band in the analysis of FM signals is increased by processing the FM signals with a quadrature autocorrelator, provided that inequalities (1), (2) are preserved.

A disadvantage of the known device is the recognition of chirp signals in a limited range of changes in their modulating functions.

The range of variation of the tuning frequencies of the LFM frequencies is limited by the need to fulfill inequality (2). Failure to fulfill inequality (2) leads to the fact that the beat signal passes through a band-pass filter and the device makes an erroneous decision on the reception of the FM signal. Calculations show that for real parameters of the channel for processing FM signals τ _s = 0.1 μs, f _cf = 1 MHz, T _min = 2.5 μs, the maximum tuning speed of the LFM signals at which they are correctly recognized is no more than 6 MHz / μs. The search for ways to increase the accuracy characteristics, noise immunity, and stealth of the radar operation has led to the development of overseas radars with ultra-wideband LFM signals whose frequency tuning rate reaches about 50-100 MHz / μs.

The reconnaissance of such signals by a known device is not possible. The aim of the present invention is to expand the range of speeds of tuning the frequency of the chirp signals when they are recognized.

This goal is achieved by the fact that in a known device containing an amplifier-limiter, three multipliers, two delay lines, a broadband quadrature directional coupler, a low-pass filter, an inverter, three quadrants, an adder, three peak detectors with reset, five threshold circuits, five keys , a shaper of control pulses, two counters, and the input of the device through an amplifier-limiter is connected to the inputs of the delay lines, a shaper of control pulses and the first inputs of the multiplier connected together minutes, the first delay line output is connected to the input of a broadband quadrature directional coupler, the first and second outputs of which are connected respectively to the second inputs of the first and second multipliers, and a second delay line output is connected to the second input of the third multiplier; the output of the third multiplier through a low-pass filter is connected to the inputs of three circuits connected together, the first of which contains the third quadrator and threshold circuit, the second key and counter, the fifth key in series; the second circuit is a second peak detector and a fourth threshold circuit; the third circuit is an inverter, a third peak detector and a fifth threshold circuit; the "And" circuit, the inputs of which are respectively connected to the outputs of the second and third circuits, while the output of the "And" circuit is connected to the input of the third key; the outputs of the first and second quadrators are respectively connected to the inputs of the adder, the output of which is connected to the inputs of the fourth circuit connected together, connected in series with the first peak detector and the threshold circuit and the fifth circuit, connected in series with the second threshold circuit, the first key and counter, the fourth key; OR circuit, the outputs of the first and fifth circuits respectively connected to the inputs of the OR circuit, and the output of the fourth circuit connected to the control inputs of the third and fourth keys; the output of the third key is connected to the control input of the fifth key; the first and second outputs of the control pulse generator are respectively connected to the control inputs of the first and second keys and to the reset inputs of the counters and peak detectors connected together; additionally, a circuit consisting of a frequency doubler and a frequency divider by 2, the third delay line, the fourth and the fifth multipliers, the second broadband quadrature etched coupler, four low-pass filters, two subtraction schemes, and the output of the limiter amplifier in series the included frequency doubler and a frequency divider of 2 is connected to the first inputs of the fourth and fifth multipliers and the third delay line connected together; the output of the third delay line is connected to the input of a broadband quadrature directional coupler, the first and second outputs of which are respectively connected to the second inputs of the fourth and fifth multipliers; the outputs of the first and fourth multipliers, respectively, through low-pass filters are connected to the inputs of the first subtraction circuit, and the outputs of the second and fifth multipliers, respectively, through low-pass filters are connected to the inputs of the second subtraction circuit; the outputs of the first and second subtraction circuits are respectively connected to the inputs of the first and second quadrators.

The introduction of an additional channel at a doubled frequency into the known device made it possible to expand the range of variation of the tuning frequencies of the LFM signals during their recognition.

Figure 1 shows the structural diagram of the proposed device. It includes an amplifier-limiter 1, a frequency doubler 2, a frequency divider 3, delay lines 4, 5, 6, multipliers 7, 9, 10, 12, 13, broadband quadrature directional couplers 8, 11, low-pass filters 14, 15 , 16, 17, 18, inverter 19, subtraction schemes 20, 21, quadrants 22, 25, 27, peak detectors 23, 24, 32, adder 26, control pulse shaper 28, threshold circuits 29, 30, 31, 33, 35 , keys 36, 37, 40, 41, 43, AND circuit 34, counters 38, 39, OR circuit 42.

The output of the amplifier-limiter 1 is connected to the inputs of the frequency doubler 2 connected together, the first input of the multipliers 10, 12, 13, the inputs of the delay lines 5, 6 and the control pulse shaper 28. The output of the frequency doubler 2 through the frequency divider 3 is connected to the first input of the multipliers 7, 9 and delay lines 4. The outputs of the delay lines 4, 5 are respectively connected to the inputs of the broadband quadrature directional couplers 8, 11, the first and second inputs of which are respectively connected to the second inputs of the multipliers 7, 9 and 10, 12. The outputs of the multipliers 7, 10, respectively, through the low-pass filters 14, 16 are connected to the inputs of the subtraction circuit 20, and the outputs of the multipliers 9, 12, respectively, through the low-pass filters 15, 17 are connected to the inputs of the subtraction circuit 21. The outputs of the subtraction circuits 20, 21, respectively through squares 25, 27 are connected to the inputs of the adder 26, the output of which is connected to the inputs of two circuits connected together, the first of which includes a peak detector 32 and a threshold circuit 35 connected in series, and the second includes a threshold circuit 33, key 36, counter 38 and key 41 . AT the output of the delay line 6 is connected to the second input of the multiplier 13, the output of which through the low-pass filter 28 is connected to the inputs of three circuits connected together, the first of which contains a quadrator 22 connected in series, a threshold circuit 29, a key 37, a counter 39, and a key 43; the second circuit is a peak detector 23, a threshold circuit 30, and the third circuit is an inverter 19, a peak detector 24, a threshold circuit 31. The outputs of the threshold circuits 30 and 31 are connected to the inputs of the AND circuit 34, the output of which is connected via a key 40 to the control input key 43. The output of the threshold circuit 35 is connected to the control inputs of the keys 40, 41, and the outputs of the keys 41, 43 are respectively connected to the inputs of the OR circuit 42. The first and second outputs of the driver pulse generator 28 are respectively connected to the control inputs of the keys 36, 37 and to the reset inputs of the peak detectors 23, 24, 32, Meters withstand 38, 39.

The outputs "FM", "LFM" and "PARAMETERS" of the proposed device, respectively, are the outputs of the threshold circuit 35, key 40 and the circuit "OR" 42.

In the proposed device, the FM signals are processed by two identical quadrature autocorrelators of the channels of the main and double frequencies and accordingly contain delay lines 5 and 4, broadband quadrature directional couplers 11 and 8, multipliers 10, 12 and 7, 9, low-pass filters 16, 17 and 14, 15. The use of identical autocorrelators is achieved due to the inclusion of a frequency divider 3 between the output of the frequency doubler 2 and the input of the autocorrelator of the channel of the doubled frequency. The information on the signal from the outputs of the autocorrelators of the channels of the main and double frequencies is obtained. Figure 2 (a, b) shows the voltage diagrams of the FM signals at the outputs of the low-pass filters of the common-mode multipliers of the autocorrelators of the channels of the main and double frequencies. The response of the autocorrelator of the channel of the main frequency S _{K1 FM} (t) corresponds to the product of two modulating functions of the FM signal shifted by the delay value τ _s , and the response of the autocorrelation of the channel of the double frequency S _{K2 FM} (t) is a unipolar video pulse. The voltage amplitudes of the signals S _{K1 FM} (t) and S _{K2 FM} (t) are equal. The voltage diagram S _Δ (t) obtained by subtracting the signals S _{K1 FM} (t) and S _{K2 FM} (t) is presented in figure 2 (c). The signal S _Δ (t) contains a sequence of "FM pulses" of a rectangular shape, the number of which is equal to the number of phase overshoots of the FM signal code.

When processing the LFM signals of the form of voltages and their amplitudes at the outputs of the low-pass filters of the common-mode multipliers of the autocorrelators of the channels of the main and double frequencies, the same figures 2 (g, d). At the outputs of the subtraction schemes 20, 21, there are no signals (Fig. 2, e), i.e. The LFM signals do not pass into the channel for processing the FM signals, which ensures the recognition of LFM signals in a wide range of changes in their modulation parameters.

To ensure the analysis of FM signals in a wide frequency band, "FM pulses" from the outputs of the subtraction circuit 20, 21, respectively, are fed to the adder 26 via quadrants 25, 26. Moreover, the amplitudes of the "FM pulses" at the output of the adder 26 are independent of the carrier frequency of the input FM signal . “FM pulses” charge the peak detector 32, the voltage of which triggers the threshold circuit 35, fixing the reception of FM signals. From the output of the adder 26, the “FM pulses”, normalized in amplitude by the threshold circuit 33, also go to the counter 38. The counter 38 in binary code provides information on the number of phase jumps of the FM signal code, which through key 41, opened by the PM signal reception pulse, and the circuit "OR" 42 is fed to the output "PARAMETERS" of the proposed device.

In the analyzer, the processing of the LFM signals is performed by a single-channel autocorrelator containing a delay line 6, a multiplier 13, a low-pass filter 18. The response of the autocorrelator to the LFM signal is a bipolar beating voltage. To measure the frequency deviation, the quadrator 22 converts the bipolar beating voltage into a unipolar sequence of pulses, which are normalized in amplitude and shape by the threshold circuit 29 and are fed to the input of the counter 39. The output of the counter 39 contains information on the number of half-waves of the beat signal (on the frequency deviation of the chirp signal). To recognize the LFM signals, the positive half-waves of the beat signal charge the peak detector 23, and the negative ones charge the peak detector 24. In order to use identical circuits of the peak detectors 23 and 24, the beat signal is input to the peak detector 24 through the inverter 19. The charge voltage of the peak detectors 23 and 24 causes respectively, the triggering of threshold circuits 30 and 31. The pulses of threshold circuits 30 and 31 overlap in time and an impulse of a sign of receiving an LFM signal is generated at the output of circuit “And” 34. Information about the magnitude of the frequency deviation from the output of the counter 39 through the key 43, opened by the pulse of the sign of receipt of the chirp signal, and the circuit "OR" 42 is fed to the output "PARAMETERS" of the device.

When processing FM signals, a single-channel autocorrelator generates a false pulse of receiving the LFM signal. To eliminate this phenomenon, the analyzer uses a key 40, which is closed by the pulse of the threshold circuit 35 (pulse receiving the FM signal).

The driver pulse train 28 is a threshold detector. Shaper 28 at the output 1 produces a standard amplitude rectangular video pulse "τ", the temporary position of which corresponds to the temporary position of the envelope of the input signal. The pulse "τ" opens the keys 36, 37 and the pulses of the threshold circuits 29, 33 are fed to the counters 38, 39. This processing makes it possible to exclude the accumulation of information on the counters 38, 39 due to the operation of the threshold circuits 29, 33 from the influence of noise in the absence of a signal. At the output 2 of the shaper 28, a reset pulse is generated, which is delayed relative to the trailing edge of the pulse "τ" for several microseconds. The reset pulse resets the counters 38, 39 and resets the charge voltage of the peak detectors 23, 24, 32. To limit the dynamic range of input signal levels at the input of the analyzer, an amplifier-limiter 1 is switched on.

All new nodes of the proposed device are made according to well-known standard schemes.

Thus, the proposed device allows you to get a new positive effect - expanding the speed range of the frequency tuning of the chirp signals when they are recognized.

The echo allows the detection of chirp signals at a speed of tuning their frequency, much more than 6 MHz / μs. The non-identical parameters of autocorrelators at the fundamental and doubled frequencies limits the maximum tuning speed of the LFM signals. For example, if phase shifts of the beat voltage at the inputs of the subtraction schemes are not identical, Δφ = ± 15 °, the maximum tuning frequency of the LFM signals is approximately 50 MHz / μs, (the calculations are based on the condition that the residual voltage level at the outputs of the subtraction schemes is 0.25 amplitude " FM pulse "), i.e. the range of variation of the tuning frequencies of the LFM frequencies at which they are correctly recognized is increased by about 8 times.

Claims (1)

A complex signal parameter analyzer containing a limiter amplifier, the output of which is connected to the first inputs of two multipliers, the input of the delay line and the first input of the signal block and their parameters, an adder whose output is connected to the second input of the signal extraction block and their parameters, the adder inputs are connected to the outputs of two quadrants, the output of the delay line through a quadrature directional coupler is connected to the second inputs of the two multipliers, characterized in that, in order to expand the functionality by expanding the possible range of frequency tuning frequencies of the frequency-modulated signals, a double-frequency generating unit, four low-pass filters, two subtraction units, an additional delay line, two additional multipliers and an additional quadrature directional coupler are introduced, while the input of the double-frequency generating unit is connected to the output limiting amplifier, and the output is connected to the first inputs of additional multipliers and the input of an additional delay line, the output of which Without an additional directional coupler connected to the second inputs of the additional multipliers, the output of the first additional multiplier and the output of the first main multiplier are connected to the inputs of the first subtraction unit through the inputs of the first subtraction unit, the output of the second additional multiplier and the output of the second main multiplier are connected to the inputs of the second through the corresponding low-pass filters block subtraction, the output of each block subtraction is connected to the input of the corresponding quadrator.

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