RU1837386C - Pulse generator - Google Patents

Abstract

Usage: in automatic devices and computer technology. SUMMARY OF THE INVENTION: A pulse generator comprises a first control bus, an EXCLUSIVE OR element, two AND-NOT elements, a first time driving circuit consisting of a capacitor and a resistor. The introduction of the third and fourth OR-NOT elements, the second time of the driving circuit, consisting of a capacitor and a resistor, the second EXCLUSIVE OR element, the counter and the second control bus provides an extension of the frequency adjustment range by separately adjusting the periods of the first and second sequence of imp, ls the output of the second element EXCLUSIVE OR, pulse durations and pauses at the output of the counter. 2 ill.

Description

The invention relates to pulsed technology and can be used in automation devices and computer technology.

The purpose of the invention is to expand the frequency adjustment range.

In FIG. 1 shows an electrical pulse generator; in FIG. 2- time charts.

The pulse generator contains the first one) control 1, the first element EXCLUSIVE OR 2, the first 3 and second 4 elements OR NOT, the first time specifying a circuit consisting of a capacitor 5 and a resistor 6, the third 7 and fourth 8 elements 4 NOT, a second time zapodnaya circuit consisting of a capacitor 9 and a resistor

10, second element EXCLUSIVE OR

11, counter 12, second control bus 13.

The first control bus 1 is connected to the first input of the first EXCLUSIVE OR 2 element, the second input of which is connected to the capacitors 5 and 9 and the output

of the first element OR NOT 3. The inputs of the second element EXCLUSIVE OR 11 are connected to the outputs of the second 4 and third 7 elements OR NOT, and its output is connected to the input of the first element OR NOT 3 and the counting input of the counter 12, The first inputs of the second 4 and third 7 OR-NOT elements are connected respectively through resistors b and 10 with the output of the first element AND SCR YUZHESHAYAYE OR 2. The output of the counter 12 directly and through the fourth element OR-NOT 8 is connected to the second inputs of the second 4 and third 7 elements OR-NOT . The second control bus 13 is connected to the installation inputs of the counter 12. The ILL-NOT elements can be performed, for example, on type 176LP4 microcircuits, the EXCLUSIVE OR elements can be performed on type 176LP2 microcircuits, and the counter on type 176IE2 microcircuits. In the microelectronic version, for example, microchips of the 765 series can be used. Output pulses can be taken from the outputs of the counter

with

with

with

Vj

with

about

12, the first 3 and the fourth 8 elements OR - “the second element EXCLUSIVE OR 11.

The pulse generator operates as follows. At the initial moment of time (moment 0, Fig. 2a), a digital code is supplied from the second control bus 13 to the installation inputs of the counter 12 and written to it. Let the code value be such that at the output of counter 12 a level O is set, then at the output of the fourth OR-NOT 8 element there will be level 1 (moment O, Fig. 2d). This level 1 at the second input of the third OR-NOT 7 element blocks its switching according to the signals at the first input, and also sets the level O at its output. In the initial state, level O is present on the first control bus 1 (moment O, Fig. 2, b), capacitors 5 and 9 are discharged. The start-up of the generator is carried out by supplying level 1 from the first control bus 1 to the first input of the first EXCLUSIVE OR 2 element (moment 1, Fig. 2b). In this case, the charging of capacitors 5 and 9 begins in circuits: the first element OR-NOT 3, the capacitors 5 and 9, the resistors е and 10, the first element EXCLUSIVE OR 2. The voltage at the first input of the second element OR-NOT 4 decreases and reaches threshold value. The second OR-NOT 4 element is switched to state 1. Accordingly, the EXCLUSIVE element is switched by the agor. OR 11 and the first element OR NOT 3, at the output of the last level О is set (moment ta, Fig. 2, c). From this moment, the capacitors 5 and 9 are re-charged in chains: the first element is EXCLUSIVE OR 2, resistors 6 vi 10, capacitors 5 and 9, the first OR-NOT 3. element. "The voltage at the first input of the second OR-NOT 4 element rises and reaches a threshold value. The second element OR-NOT 4 switches to state O and the second element EXCLUSIVE OR 11, the first element OR-NOT 3 are switched accordingly. At the output of the latter, level 1 is set (moment t3, Fig. 2, c). This completes the formation of the first period of the pulse sequence.

For all subsequent periods, all processes are similar to the above. At the input of the counter 12, there are rectangular pulses, the parameters of which are determined by the first time by the driving circuit. Switching of the third OR-NOT 7 element does not occur, since it is blocked at the second input by level 1 from the output of the fourth OR-NOT 8 element.

10

fifteen

twenty

25

thirty

35

4.0

45

fifty

55

Upon receipt at the counting input of counter 12, the number of pulses equal to the capacity of counter 12 minus the code recorded at time to, 5 level 1 appears at its output (moment, Fig. 2, a), and at the output of the fourth element, OR- NOT 8 - level O (moment t4. Fig. 2, d). In this case, the second OR-NOT 4 element is blocked at its second input, thereby changing the charge on the capacitor 5 of the first time of the driving circuit causes the second OR-NOT 4 element to switch. At the same time, the level O at the second input of the third OR-NOT element 7, its switching is allowed, therefore, when the voltage on the capacitor 9 reaches the second time of the starting circuit of the threshold voltage, the third element is switched OR NOT 7. In the future (in the time interval m..db, the generator operates similarly to the above (and interval t2 ...), but with pulse parameters determined by the second time by the driving circuit.After time t4, the second code is written to the counter 12 via the control bus 13. In this case, the counter 12c switches level 1 to O when it arrives at its counter input the number of pulses equal to the counter capacity 12 minus the second code.

From time ts, the operation of the generator completely coincides with the work in the interval ti ... t4. When level O is applied to the first control bus 1 (moment, i.e., Fig. 2b), the generator stops.

The extension of the frequency adjustment range in the proposed device is achieved by the possibility of separately adjusting, firstly, the periods of following both the first and second sequences of pulses at the output of the second element EXCLUSIVE OR by changing the time parameters of the driver circuits, and secondly, the possibility of separately adjusting the pulse durations and pauses at the output of the counter due to separate recording of codes to generate a pulse and pause.

Claims (1)

The claims A pulse generator containing a first control bus connected to the first input of the first EXCLUSIVE OR element, the second input of which is connected to the output of the first OR-NOT element and, with the first output of the capacitor, the first time of the driver circuit, the second output of which is connected to the first input of the second OR element- NOT and through the resistor of the first time of the driving circuit - with the output of the first element EXCLUSIVE OR, characterized in that, in order to expand the frequency control range, into it (the third and fourth elements are OR-E, the second time is the driving circuit, the second is the 1st EXCLUSIVE OR counter, the control screw, and the first in the | code of the third element is NOT-NOT through the connector and resistor the second time is setting, ieu the circuit is connected respectively with the progress and the output of the first element, SUIT-1, or OR, the inputs of the second element The EXCLUSIVE OR is connected to the outputs of the second and third elements OR NOT, and its output is connected to the input of the first OR-NOT element and the counter input of the counter, the output of which is directly and through the fourth element OR-NOT connected to the second inputs of the second and third OR-NOT elements , the second control bus is connected to the installation inputs of the counter hl ABOUT and ib t5 thirteen P figure 1