RU1831767C - Method of local radiotelephone and system - Google Patents

Abstract

The invention relates to techniques for radiotelephony communications of mobile subscribers and can be used for stand-alone communications within medical or industrial complexes. The purpose of the invention is to reduce power consumption and increase the number of functional modes of subscriber units. In order to achieve the goal in the method, in addition to the frequency channels, at least one time channel (VC) is introduced, which is used to transmit overhead information with a Tec on-frame duration shorter than the time of auditory perception of its operation, while not reducing power consumption negotiating subscriber units (AA) include transceiver power circuits only for the duration of the VK operation, the duty cycle of which is set by QBK 5: 100. An increase in the number of functional modes is achieved by means of Duration of the modes General call, Group call, Auto-registration based on the use of positional pulse modulation (PIM) for transmitting service signals, which allows transmitting functional, address, control, frequency distribution, and synchronizing and other information, followed by highlighting the necessary data on a digital indicator for subscriber information. The reduction of energy consumption in the negotiation mode is achieved by using single pulses in the synchronized clock intervals of the speech with the time position modulated relative to the beginning of the interval, the achievable duty cycle of the speech pulses being QpH 10. This allows to increase the communication range when necessary a given average radiation power VQjn times. The transmission of speech pulses is carried out by taking samples with twice the upper frequency of the transmitted spectrum of the speech signal (2Pv). This, if necessary, makes it possible to increase the utilization of the frequency resource by compatible operation with the same type of radio frequency modulation media in which the frequency 2Pv is suppressed by the speech signal filter. In the radiotelephone communication system, quartz oscillators of the internal frequency reference frequency are introduced into the base and subscriber units. In the basic apparatus, the logic device connected to the transceiver contains a basic synthesizer of time intervals, a code synchroper generator, an interference analyzer, a frequency channel allocator, a lock switch for channels affected by interference. In the subscriber unit, a receiver and transmitter power supply circuit is connected, connected to a logic device, which includes a code synchronizer for the subscriber time, a reference frequency deviation corrector, a subscriber time interval synthesizer, a communication signal shaper-decoder, address signal shaper-decoder, and a decoder the presence of interference, the shaper-decoder of the receipt of readiness СО с оо о о VI СО

Description

a subscriber, a shaper-decoder of the occupied frequency channel number, a speech signal synchronizer, a control signal switch, an address indicator, a health indicator and a ready indicator, as well as an audio synthesizer. 2 sec and 11 zpp-fs, 17 ill.

The invention relates to radiotelephone communication technology for mobile subscribers and can be used in local office or cellular radiotelephone systems, as well as in wireless communication systems.

The purpose of the invention is to reduce power consumption and increase the number of functional modes of subscriber units.

The goal is achieved in that in the known method of radiotelephone communication with wideband signals with code division of subscribers, in which information signals are transmitted in non-overlapping frequency ranges, while at the base station located near the geometric center of the served territory (cell), a signal is generated. The frequency channel is free , by which the subscriber units, upon reaching the radio connection, fix a free frequency channel and transmit a signal during operation. The frequency channel is busy, in addition At least one common time channel (K) for all subscribers of the local radiotelephone system is introduced to the frequency channels, and at the base station, in each switching frame B K, a code synchronization group of intra-system time signals is generated and emitted in subscriber units after receiving the code synchronization group, the deviations of the subscriber time from the intra-system time are eliminated, after which, in the outgoing call mode, position-code pulse pulses with communication type signals (General call, Group call, Individual call, etc.), and after these signals, address-based position-code pulse signals similarly related to the intra-system time, while the base station controls the absence of positional interference in the address group of pulse signals and emit position-time pulsed signals of the presence or absence of interference, after which, in the subscriber station that received the address call the signal is no interference, form a response pulse signal receipt a radio connection containing information about the state of the radio line and the readiness of the called party for negotiations, then

the base station generates a position-impulse signal coupled to the clocks of the intra-system time The frequency channel fi is free, on the subscriber units of the outgoing and incoming call

this signal forms a pulse signal I occupy the frequency channel fi, after which the frequency synthesizers are switched to the frequency of the occupied channel in the subscriber units of the outgoing and incoming calls,

After that, work in this frame for turning on the temporary channel ends, subscriber units that have not received an address call disconnect the power supply circuits of the receiver and transmitter for a period of time until the next frame for turning on the VC, and subscriber units connected by an outgoing and incoming call negotiate with the busy frequency channel. In this case, for the transmission-reception of voice information

in subscriber units, the speech clock frequency 2FB is formed, the initial phase of which is set uniform in all subscriber units due to the operation of the VC. The duration of the speech clock intervals is

1

2F

v.

(1)

where is fb.p. is the upper frequency spectrum of the transmitted voice message.

When transmitting, the amplitude of the analog speech signal is counted at the beginning of the clock interval Tr and an information pulse with a time position modulated relative to the clock interval is proportional to the amplitude of the analog signal at the moment of taking the sample. When receiving, do the opposite

converting the received pulse signal with a modulated temporary position to a pulse-width pulse and then to an analog signal based on the counting of the temporary position of the received pulse with respect to the clock moments

formed in the receiving subscriber unit synchronously with the transmitting AA based on a single intra-system time.

The duration of the on-time frame of the TCE temporary signal is set much shorter than the time Tc of the auditory perception of service interruptions in the voice message, and the duration of operation in the frequency channel mode is set to several orders of magnitude longer frame duration of the temporary channel

Tvk 10tsl "Tchk UKTE

(2)

where K 2.

This allows saving energy consumption on subscriber units participating in negotiations by turning off their receivers and transmitters for a while

Tchk Totch Tech,

where Totch is the total operating time of the system;

The time the system was operating in time channel mode;

Point - the system’s operating time in the frequency channel operation mode, while the economy is proportional to the QBK of the duty cycle of the temporary and frequency channels, which are set within the limits

Qe Points / TVK 10-10000,

(3)

depending on the requirements of a particular local radiotelephone communication system.

The energy consumption of transmitters in subscriber units operating in the negotiation mode is reduced in relation to the prototype in Ovim / Oscps times, where Osc is the duty cycle of the transmission of speech pulses with time-pulse modulation when using the reference intra-system pressure (Ovim 10).

An increase in the number of functional modes is achieved by increasing the information content of pulses and the amount of transmitted service information based on position-pulse generation of codes using intra-system time, in particular, by forming subscriber numbers in the form of positional correspondence of the address pulse and the tact number in the address group, while the service priority subscriber unit numbers are set based on the time priority of the address pulses. This allows, firstly, to exclude a malfunction in the radio connection with matching applications of several

pairs of subscribers, and, secondly, at the same time ensure the service priority of the radio connection by blocking the emission of pulses with a lower time and, accordingly, service priority; thirdly, the formation of address pulses associated with the numbers of ticks of the address group, allows you to make a set of several arbitrary

.0 address signals for promptly calling a group of subscribers with a randomly dialed address composition; fourthly, the position-time method of transmitting address information allows you to record the caller's address in real time and quickly display it on the indicator, as well as to memorize in real time the addresses of incoming callers in auto-registration mode with a minimum amount of memory. In addition, the information content of the signals increased by using a single intra-system time makes it possible to make an operational indication of the state of radio line readiness and the subscriber being called up for negotiations after the VK is activated, monitoring the overall functioning of the local radiotelephone system, monitoring for interference, distribution

0 frequency channels, etc. with minimal energy costs.

Into a local radiotelephone communication system (L RTS) for receiving and transmitting by broadband signals and code division 5 of subscribers, containing the base and subscriber units, the base unit containing an antenna and connected to it via an isolation element, a receiver and a transmitter connected to the synthesizer

0 frequencies, and subscriber units containing the antenna and connected to it through the isolation element, a receiver and a transmitter connected at the input of switching frequency channels with a frequency synthesizer, and

5 to the information input of the transmitter and the information output of the receiver, connected by a modulator and a demodulator of speech signals, respectively, by a microphone and an earphone, in

0 basic apparatus (BA) introduced a basic crystal oscillator (BCG) of the reference frequency of the intra-system time and a basic logic device (BLU), which includes a basic synthesizer

5 time intervals (BSVI), a synchro-group shaper (FSH), an interference analyzer, a basic frequency channel allocator (BRCH) and a lock switch for blocking frequency channels affected by interference, the BCG output is connected to the BSVI signal input, the information output of which time interval of the sync group is connected to the enable FSH input, information outputs of time intervals of the type of communication, address group and interference monitoring are connected to the corresponding enabling inputs of the interference analyzer, information outputs are temporary x intervals of the distribution of frequency channels and occupation of frequency channels are connected to the corresponding enable inputs of the BRDC and, in addition, the information output of the time interval of occupation of frequency channels is connected to the enable input of the switch blocking the interference-affected channels, the output of which is connected to the signal input of the BRDC, the output of the receiver is connected to signal inputs of the interference analyzer and BRCH, information outputs of the FSH and BRCH are connected to the corresponding information inputs of the interference analyzer, the output of which connected to the start input of the transmitter, in subscriber units, said voice information signal modulator is made in the form of a converter of amplitude-modulated signals into pulse signals with time-pulse modulation (AM-VIM), and said speech signal demodulator is made in the form of a converter of time-pulse signals into an amplitude-modulated signal (VIM-AM), and in addition, a subscriber crystal oscillator (ACG) of the internal frequency reference frequency, a receiver power switch and transmitter, a switch for transmitter information inputs and a subscriber logic device (ALU), which includes a reference frequency deviation corrector, a subscriber time interval synthesizer (ASVI), a gate pulse generator, a speech signal synchronizer (SRS), a subscriber time code synchronizer, a subscriber frequency distributor channels (ARCHK), a signal decoder of noise control signals, a shaper-decoder of communication signals (FDVS), a shaper-decoder of address signals (Ф YES), readiness receipt shaper-decryptor (FDKG) of the called subscriber, piezoceramic call, digital address indicator, digital health indicator, digital indicator of the called subscriber’s readiness, sound signaling device, as well as a control switch, which includes toggle switches; Dialing mode; Microphone on. Auto registration and buttons Set of address units, Set of address dozens, Enter memory, Read memory, Reset memory, Synchronize, General call, Troupe call, while the ACG output is connected to the signal input of the reference frequency deviation corrector, the output of which is connected to ASVI signal input, information output of the time interval

0 of the synchronization group of which is connected to the enable input of the code synchronizer of the subscriber time, the information output of the communication type time interval is connected to the enable input of the FDVS,

5, the information output of the time interval of the address group is connected to the resolving input of the FDA, the information output of the time interval of the jamming control is connected to the resolving input of the decoder of the jammer, the information output of the time interval of the receipt of the called subscriber is connected to the resolving input of the PDKG, the bus information output of the time intervals of the frequency distribution of frequency channels and occupation of frequency channels connected to the enable bus input ARCHK, the output of the clock frequency is connected to the clock in by the steps of the mentioned logic devices, in addition, the information output of the reference frequency correction period is connected to the enable input of the reference frequency deviation corrector, the bus output of the ASVI audio frequencies is connected to

5 by the bus input of the sound signal frequencies, the information output of the time interval for switching on the asynchronous mode of the time channel (AVK) is connected to the input of asynchronous switching on the power switch of the receiver and transmitter, as well as to the input on the base frequency channel of the ARCH, the information output of the time interval of the synchronous mode VK is connected to the control input of the switch of the input signal of the transmitter, the bus output of the reference frequency of the intrasystem time and the speech clock frequency is connected to the op CPC and clock inputs, while the signal inputs of the subscriber time code synchronizer, ARCHK, FDVS, FDA, interference control decoder, FDKG and SRS are connected to the receiver output, the control inputs of the FDVS are connected to the buttons

5 General call, Group call, FDAS control inputs are connected respectively to the buttons Activate dialing mode, Turn on the microphone, Auto registration and buttons Set address units, Set address addresses, Enter memory, Read memory, Reset memory, General call , Group call, FDKG control input is also connected to the toggle switches; Dialing mode activation; Microphone activation; Auto registration; Synchronization button is connected to manual control input of the receiver and transmitter power switch; ARCHK control bus input with it is connected to the information outputs of the FDVS, FDA, the interference control decoder and FDKG, the information output of the subscriber time code synchronizer is connected to the start input of the ASVI, the bus sound information output of the address signal generator and decoder is connected to the bus signal input of the sound signaling device, the bus digital information output to the FDA by the signal input of the address indicator, the bus information output of the decoder of the noise control signals is connected to the bus input of the health indicator. The FDKG information bus output is connected to the bus input of the ready indicator, the signal outputs of the FDVG. FDA, FDKG, ARCHK are connected through the gate pulse generator to the input signal of the commutator of the input signals of the transmitter, the bus signal output of the frequency setting code of the ARCHK is connected to the bus signal input of the frequency setting code of the subscriber frequency synthesizer, the frequency registration output of the frequency channel of the ARCHK is connected to the radiation blocking input FDA address signals, the fixed clock output of the CPC is connected to the clock input of the AM-VIM converter, and the tunable clock output of the CPC is connected to the clock the VIM-AM converter, the pulse-width output of the received signal is connected to the input blocking input of the AM-VIM converter, while the current input of the power switch of the receiver and transmitter is connected to the power source, and the output of the switch is connected to the power input of the AM- converter VIM, switch input signals of the transmitter, receiver, VIM-AM converter, audio amplifier and frequency synthesizer.

The newly introduced devices make it possible to implement a local radiotelephone communication method, while the basic crystal oscillator of the intra-system time and the basic logic device introduced in

the base station, as well as the subscriber quartz oscillator of the intra-system time and the subscriber logic device, introduced into the subscriber units, 5 allow, in addition to the frequency channels in one of them, chosen as the reference, to introduce a common time channel for the LRTS system, which provides operational exchange service information (address-calling. information on the state of employment of the called subscriber, the presence of a free frequency channel, etc.) between the base unit and all subscriber units of the LRTS independently, regardless of their fate or non-participation in the negotiations, the LRTS functional mode is implemented, providing an increased number of radio connections of subscribers per unit time (up to 150 two-way three-minute conversations per hour), as well as a mode of calling a group of subscribers of an arbitrarily dialed composition, mode a at that, registration of subscriber numbers of an incoming call during a long busy period of a subscriber, service priority mode in a radio connection, mode of blocking the use of frequency channels affected by interference s, in particular, occupied by the outer spectrally

0 combined single-type and narrow-band radio systems, etc., while the PDA allows you to dial, receive, write to memory and read on the indicator the numbers of subscribers connected in the radio channel,

5, a base station interference analyzer and a subscriber unit interference decryptor make it possible to block a false call (sounding an alarm) from accidental industrial interference,

0 FDKG allows informing the calling subscriber about the state of busyness of the called subscriber, TCDC and ARCHK allow quickly occupying free frequency channels for radio connection, and CPC

5 makes it possible to eliminate the effect of clock synchronization errors in speech frequencies in radio-connected subscriber wearables due to rezli. by the spatial delay of the transmitted signals and hardware synchronization errors with an arbitrary arrangement of mobile subscribers in the LRTS coverage area.

The listed features of the claimed

5, the method and system of the local radiotelephone network allows us to conclude that the claimed invention is interconnected by a single inventive concept.

A comparison of the claimed technical solutions with the prototype allows us to establish compliance with their novelty criterion. When studying other technical solutions in the technical field, features that distinguish the claimed invention from the prototype were not identified and therefore they provide the claimed technical solution with the criterion that there are significant differences, the most important of which in the method are transmission and reception of service information with broadband pulses in the additionally introduced time channel, the transmission-reception of voice information by broadband pulses with a modulated time position relative to the phase of a single intrasystem narrowband speech clock frequency.

In the local radiotelephone communication system, significant differences are provided by the presence of basic and subscriber crystal oscillators of intra-system time, the presence in the subscriber devices of power switches of receivers and transmitters, the availability of shapers-decoders of service signals of a temporary channel, the presence of a synchronizer for receiving speech signals, as well as the presence of a switch blocking the affected interference (occupied by other radio systems) of frequency channels, etc.

Fig. 1 shows an example of the location of the base and subscriber units in the facility.

In FIG. 2a, b shows the appearance of the subscriber unit.

In FIG. Figure 3 shows the timing diagrams of the operation of the time and frequency channels.

In FIG. Figure 4 shows an example of the sequence of radio connection of subscribers according to service priorities for addressing applications matching in time.

In FIG. Figure 5 shows an example of allocating a frequency range to frequency channels.

In FIG. 6 shows timing diagrams of AM-VIM and VIM-AM conversion of analog speech signals.

In FIG. 7 is a structural diagram of a basic apparatus.

In FIG. 8 shows the timing diagrams of the basic apparatus.

In FIG. 9 is a structural diagram of a subscriber unit.

In FIG. 10 shows the timing diagrams of the operation of the subscriber unit.

In FIG. 11 is a block diagram of a basic logic device.

In FIG. 11a is a structural diagram of a subscriber time slot synthesizer.

In FIG. 12 shows the timing diagrams of the operation of synthesizers of time intervals, clock and gate pulses of the base and subscriber logic devices.

In FIG. 13 shows a diagram of a code synchronizer of subscriber time.

In FIG. 14 is a diagram of an address signal shaper-decoder.

In FIG. 15 is a diagram of a subscriber frequency channel distributor.

In FIG. 16 shows a diagram of a synchronizer for receiving speech signals.

In FIG. 17 shows the timing diagrams of the work of the CDS.

The local radiotelephone communication method is implemented as follows. In the territory of the institution (Fig. 1), within the radius of operation of the base unit 1, roaming subscribers 2 are provided with subscriber units (Fig. 2a, b), while the base unit 1 is placed near the geometric center of the institution.

The basic apparatus 1 with a period Ti (FIG. 3a) emits, at the frequency allocated for the operation of the time channel, a synchronizing group (SG) of pulses with a time code set for a specific LRTS, after which, after the end of the SG, all AAs that received the SG form zero moment to clock intervals of the intra-system time. This moment is the initial moment of operation of a temporary channel having a duration Tek T2. In the particular case, TI is chosen equal to

Ti (2) 22.10Н6 s - 4.194304 s

T2 (2) 14. 0.016384s

The temporal stability of the TI period is determined by the stability of the intrasystem time reference crystal oscillator transmitted to the base station 1, which in the example implementation is

Ti 4 4.2 μs.

Subscriber units 2 in a negotiation-free mode, according to the subsystem quartz generator of intra-system time introduced into their composition, form the period Tk. the duration of which 5 is chosen to be shorter than Ti for the duration of the transient processes of establishing the nominal sensitivity of the receiver (Ti - Tz 0,0 0.02 s), and at the end of the period Tk the power supply circuits of the receiver and transmitter AA are turned on, and after

0

5

0

5

0

5

0

5

0

Ode T2 is turned off. In the time interval Тз - Ti (Fig. 36) AA, the clock frequency drivers are set to the zero position, and after the clock receiver emitted by the base station 1 and the zero-point moment of the intra-system time is formed, the clock channel formers of the time channel for receiving-transmitting service overnight information (Fig. 36). The transmission and reception of service information AA and BA are carried out by pulse signals, the information value of which is established by the protocol of the time channel (Fig. 36), while the duration of the clock intervals T4 of the time channel (Fig. Sv) is set much longer than the spatial error of the subscriber synchronization time devices, which with a radius of action of L RTS R 1500 m is (Fig. 1)

4 1500m

3-10 m / s

 5 μs.

(4)

In the particular case, the clock intervals Ta of the time channel are selected equal to 128 μs for the duration of the transmitted information pulses mp 32-μs (Fig. Sv), and the wait interval is set to 64 μs too.

In this case, the clock interval with the detected pulse in the standby interval is also considered to be an information unit (Fig. Zg), and the clock interval with a skipped pulse in the standby interval is considered an information zero.

In the above version of the protocol of operation of the LRTS temporary channel (Fig. 36), after receiving a code synchronization group, for example, of the form 1101, the moment to - of the start of operation of the temporary channel, i.e. receiving and transmitting BA service information and all AA LRTS.

In the first four clock intervals (riBC), codes of the form of communication 1 (BC) are transmitted. For instance:

0000 - individual call - in this case, the connection is similar to a conventional landline telephone;

0100 - general call - conference mode, everyone hears

ООУ - a group call, wherein a radio connection is provided for an arbitrary group of subscribers, the composition of which is dialed by the initiating group call subscriber;

0110 - wired network subscriber call, etc:

In this case, codes 1111, 0111. 1110 are formed in the event of continuous interference, the presence of which is decrypted and displayed on subscriber units

5 LRTS.

In the interval - so on is the address group (AG) of the codes. The number of AG clock cycles corresponds to the number of LRTS subscriber numbers (in

0 implementation example N 99). At the same time, each AA is assigned a subscriber number corresponding to the assigned sequence number of the address clock interval, and the service distribution

5 subscriber numbers are produced according to the priority of service positions, in particular: the interval m corresponds to address 01 (manager), the interval Г2а to address 02 (deputy manager) and the interval ГЭЭ3 to address 99.

In the mode, an individual call AA of an outgoing call generates a position-pulse signal in the form of a unit on that AG time interval, whose number

5 corresponds to the number of the called AA and at the same time generates a signal of who is calling, radiating a unit at a temporary position corresponding to its own subscriber number. So, for example, if

0 YES 99 causes AA 01, then it emits two pulses, the first of which is located in the time interval ria, and the second in the interval Tud. If subscriber 01 calls subscriber 99, then pulses on

The 5 indicated positions emit AA 01.

The address signal received by the called subscriber is registered in the memory AA, the number of the calling subscriber is displayed on the indicator of the called AA.

0At the same time, the called AA generates a signaling device signaling the presence of a call, the action of which is interrupted by turning on the speech button, similar to disconnecting a wired call

5. The phone is on Handset mode.

In the General call mode, only one address pulse of the subscriber-initiator of the general call is emitted, while all AA LRTS are switched on in the Reception-transfer mode, on the indicators of all AA the number of the subscriber who emits the signal of the general call is displayed.

In the Group call mode, the AA of the outgoing call generates pulses at the 5 specific time intervals called

subscribers, for example, AA 01 for calling. ea 05. 25, 37, 17 radiates impulses

on the clock intervals tza, r -, -; 3, rjs 3,.

At the same time, everyone who received an address call

AAs are switched on and off, and their indicators show the number of the eldest in the subscriber group (05).

Since the address ringing signals are emitted only in the operation frame of the temporary channel, in order to exclude malfunctions of the L RTS during a temporary coincidence of several calls to the address negotiations, the radio connection is based on the sequence according to the time priority of the address pulses corresponding to the service priority of the distribution of AA numbers. In the diagram of FIG. Figure 4 shows an example of the priority distribution of the radio connection of three pairs of subscribers, in the case when AA 90 calls AA 01, 03 calls AA 19, AA 21 calls 17. To ensure the temporary priority of the radio connection, all AA LRTS in the AG interval include the mode of monitoring the presence of incoming from the air address pulses sequentially in each address interval, and in the case of detecting a pulse in the time interval preceding with the declared or belonging subscriber-initiator of the address call, AA blocks It emits address and other overhead signals with its transmitter in a given time channel enable frame.

AAs that have not detected time-priority address pulses with respect to their own or claimed, do not block the radiation of their transmitter, thereby ensuring the transmission and reception of address information in this frame for switching on a temporary channel and subsequent entry into the address radio connection, and then In subsequent frames of switching on the temporary channel, the radio-connected AAs block the emission of pulses at the address positions belonging to them and do not impede the subsequent priority of the junior radio connection in priority subscribers. In the case of priority radiation of address pulses and the absence of a radio connection, for example, due to the busyness of the called subscriber, priority AA blocks the emission of address pulses for several, for example, 4-5 frames, turning on the time channel, which eliminates the blocking of VC by priority and provides the necessary LRTS number of compounds per unit time (E 15 compounds per minute).

In the example shown, in the m frame of the VK radio connection, AA 90 and AA 01 will be included (Fig. 46), in the (t AND) frame of the VK connection will be AA 03 and AA 19

(figv), in (t + 2) frameVK-AA 17 and AA 2G (Fig. 4d).

In group call mode, a radio connection is also provided according to the rule

time priority, which is determined by the senior number in the called groups.

The KP interval (Fig. 36) is used for transmitting and receiving interference control signals during the operation of the VC. In case in this frame. turn on V K AA, entered into a radio connection, set the type of communication 0000 (individual call), the basic synchronizing device keeps track of pulses

5 on the interval AG. If at the same time the number of address pulses is N 2, a signal 10 is generated - there is interference. This signal is displayed on the indicator of the subscriber of the outgoing call, for example, in the form of a conditional symbol 1, while the radio connection of the subscribers does not occur, the operation of the sound signaling devices is blocked.

When continuous interference is applied to the KP interval, a signal equivalent to 11 is generated, which is also displayed as a symbol 1 on the indicators of the negotiating subscribers. t work VK on another frequency channel L RTS, free from radio interference.

5 The KG interval (Fig. 36) serves to transmit-receive a signal-receipt of the called subscriber's readiness for negotiations. This signal forms the AA of the called subscriber in the individual call mode after deciphering the received address pulse.

AA of the outgoing call after receiving the receipt signal, the indicator shows the ready state of the called

5 subscribers to the negotiations. In the particular case, the codes are set: 00i - the called subscriber is in radio shadow, the code is generated when the called signal does not pass under the conditions of shading, no power

0 for called AA, etc. This signal is displayed on the caller’s indicator in the form of the O symbol. Code О The G-subscriber is ready for negotiations, the radio line is not obscured, the called subscriber must be picked up. This signal is displayed on the indicator of readiness of the calling AA, for example, in the form of a symbol 1. Code 10 - the called subscriber is engaged in negotiations with the previous caller. This signal is displayed on the indicator of readiness of the calling AA, for example, in the form of character 2, code 11 - the called party's device is set to auto-registration mode, used for long hours (meeting, creative or lunch break, work of special importance, etc.). This signal is displayed on the indicator of the calling AA, for example, in the form of a symbol 3. In the absence of a radio connection due to radiation blocking due to reception of priority address pulses, the symbol 4 is displayed - No priority. In addition, the busy signals of the called subscriber are duplicated by sound signals in the earphone of the outgoing subscriber, the duration and tone of which corresponds to those received, in a wired telephone network.

In the Auto Registration mode, the AA of the called subscriber writes into the memory the address numbers of all those who contacted the call AA. At the end of the Auto-registration mode, the subscriber switches on the memory reading mode and AA displays on the indicator the numbers of all the subscribers who are making an incoming call, which is taken to reduce or decide on radiotelephone communication for the efficient exchange of information deferred to enable the auto-registration mode.

The RFC interval is used to transmit the BA and receive the AA number of the free frequency channel proposed in this turn-on switch KK, which can be occupied by subscribers who establish a radio connection in this time channel enable frame.

In the particular case (Fig. 5), the allocated frequency range TD is evenly distributed across n 8 frequency channels, while to reduce the level of out-of-band emission and reception of out-of-band interference, the channel numbering is carried out from the center of the range, for example, in the sequence: f {n-2), f (ni), fn °, f 1, f2 -... where fi is the value of the center frequency of the frequency channel. With this distribution, the most likely radio waves are the channel fi located in the center of the range, as having the highest occupation probability for negotiations, and the channel fn used to operate the time channel. In accordance with the established numbering of the LRTS frequency channels, the BA generates a free frequency channel code having units on the entire sequence of RFC clock intervals, except for the number of the clock interval that coincides with the number of the proposed free frequency channel;

01111111 - The fi channel is free. 10111111 - Channel f2 is free, etc.

The code of the proposed BA free frequency channel, if occupied, is stored in the memory of the calling and called AAs and, after a radio connection, is stored for the entire duration of the negotiations with highlighting the symbol 1 on the ready indicator - the presence of a radio connection and

10 facts of the readiness of the radio-connected subscriber for negotiations.

The 34K clock interval serves to transmit-receive the signal. I occupy the fl channel, which forms the AAs that established and

15 that support the radio connection during negotiations, in the particular case the channel occupation code is the inverse of the RFC code, i.e. contains zeros on the whole sequence of clock intervals

0 except for the numbers of the occupied frequency channel: 1000 ... - I occupy the ft channel, 0100: .. - I occupy the fa channel, etc.

The code of the occupied channels takes the BA, fixes them in the memory and in the next frame

5, power on K forms the code of the next free frequency channel. Code generation Channel fi takes AA outgoing call.

Missing code Channel f {busy is serving a hang-up signal (subscriber hangs up). The freed up frequency channel captures the BA and, if all the previous numbers of the frequency channels are busy, emits the corresponding code Channel

5 fl is free in the RFC interval, i.e. represents this channel for radio connection to the next pair or group of subscribers, which when occupied by the channel, generate similarly the occupied signals of the given frequency channel.

The signal Frequency channel fi occupy can be entered by turning on a logical unit on the corresponding RF clock cycle using the toggle switch

5 static switch installed on the BA. This allows the frequency channel affected by the interference to be removed from circulation and thereby eliminate, if necessary, the spectral interference with the territorial

0 close narrow-band or similar in type of signal radio systems operating in the frequency range of LRTS.

After the transmission and reception of signals occupying the frequency channels, the work of temporary

Channel 5 and the overhead transmission ends, AA, not participating in the negotiations, turn off the power supply circuits of the receivers and transmitters for the time interval T3 (Fig. 3A), and AA, negotiating, switch the frequency synthesizers to the frequency occupied by the results of the primary radio frequency connection channel, in this case, after the interval T3 AA, the negotiators again switch the frequency synthesizers to the frequency set for the VK operation. in which the code synchronizing group emitted by the BA is again received, the time instant t0 is again formed, the formers and pulse analyzers of the BC, AG, KP, KG, RFC are blocked, the signal is emitted The frequency channel fi is occupied, received by the BA and subscriber units participating in the address negotiations, and then the frequency synthesizers are switched back to the frequency of the frequency channel occupied for the negotiations. In the example shown, the duration of the work frame BK is

TVK - T4-H - (s-4) + 99 (tH-99) + 2 (t, 2) + + 2 (t) + 8 (gG a) + 8 (tGy-8) + 2ug

(5)

 0,037s

where Gust 0.01 s is the duration of the transient on and off transceiver, as well as switching () (fi) the frequency synthesizer.

As the experiment shows, pauses in a speech message of less than 0.1 s do not lead to loss of voice information, and a pause of DT of 0.04 s is below the auditory threshold

PERCEPTIONS Tel.

The fact that the frame of the time channel is turned on, the clock pulses are received, and the moment f0 is generated in AA that are not busy in negotiations are displayed on the service health indicator, for example, in the form of an O symbol pulsating with the switching frequency of the VK frames. This signal is a control signal for AA and LRTS operability and in the absence of negotiations indicates the serviceability of the receiver, power elements, the presence of the passage of radio signals, etc.

If there is no reception of the sync group, for example, due to the discharge of power elements, their disconnection during the change, the influence of radio shadowing during the movement of the subscriber, etc., AA automatically turns on the sound signal.Not faulty, while after eliminating the cause of the malfunction, Manually turning the transceivers on continuously waiting for SG to be received until the fault signals are cleared.

Two-way transmission-reception of voice messages AA LRTS is carried out by converting an analog amplitude-modulated (AM) speech signal

into discrete pulses with a modulated time position (VIM) relative to the phase of the intrasystem speech clock frequency on the transmitting side and

5 reverse conversion at the receiving side. At the same time, on the transmitting side, the amplitude of the analog speech signal is counted in synchronized clock moments for all LRTS subscribers (Fig.

10 ba), these samples are converted into proportional time intervals (Fig. 66) and emit single pulses inside each speech clock interval, and a pulse-width signal with a pulse duration in each clock interval determined by the time position of the received pulse is generated on the receiving side (Fig. 6c), after which integration of the reconstructed analog signal is restored. A voice-message reception-transmission quality close to a landline telephone is achieved with a transmitted frequency band of AFP of 3 kHz, due to the case in the example

25 implementation, the intra-system speech clock frequency is selected according to the well-known Kotelnikov 2FP theorem of 6.25 kHz, while the duration of the speech clock interval is Tr 160 μs. This allows transmitting and receiving service and speech signals with the same amplitude, shape and spectral structure of discrete pulses, for example, in the particular case, monoharmonic with a duration of 32 μs (Fig. Sv, Fig. 66). The use of the same pulses for transmitting service and voice information simplifies the construction of the receiver, transmitter, and logical device AA. VIM application

40 without the transmission of clock pulses allows to save energy consumption of the transmitter in comparison with the mode of angular modulation of a continuous carrier frequency in proportion to the QP-duty of speech

45 pulses, which, taking into account the blocking of the radiation of pulses in pauses of speech, reaches Qp of 8-10 times.

The discrete form of the transmitted signals makes it possible to provide a radio telephone50 two-way conversation in simplex mode without loss of time for a voice message transmission-reception, i.e. without the use of the tangential switching of the transmit-receive modes. This is achieved by means of electronic switching of the transmit-receive modes, which connects the transmitter to the antenna only for the duration of the emission of each individual information pulse of 32 μs, and in between

signals are received between the emitted pulses, which allows subscribers to negotiate in an individual communication mode, in group and conference mode. similar to the wired telephone mode of operation.

In FIG. Figure 5 shows an example of the spectral distribution of the frequency range of the L RTS over frequency channels. The frequency band occupied by the 32 µs information pulse, adopted in the exemplary embodiment, is Afc 30 kHz.

The required frequency isolation of adjacent channels for L RTS operating in an institution with AA located in adjacent adjacent frequency channels (Fig. 1) is not less than 70 dB, which is realized in small AAs. with limited possibilities of introducing filter circuits, with a protective frequency interval between adjacent Afs channels of 60 kHz. With this in mind, in an example implementation, the total frequency band required for each broadband frequency channel of the LRTS is Afn 100 kHz.

The broadband information pulsed signals selected for the LRTS operation with a duty cycle of radiation Q ' have a low effective level of influence on narrow-band radiotelephone and narrow-band digital systems with angular modulation (manipulation) due to the protective properties of frequency detectors to short-duration pulse-modulated interference signals. This makes it possible to territorially combine broadband pulsed LRTS with narrowband systems, thereby achieving the possibility of increasing the efficiency of using the frequency resource. In addition, due to the uniform time of emission of speech pulse signals, the operation of broadband LRTS channels is perceived by narrow-band radio receivers in the form of a weak narrow-band tone of frequency 2FB 6.25 kHz, which is outside the selectivity band of receivers made in accordance with GOST 122252-86 and does not interfere with the reception of speech and tonal digital audio signals received in narrowband systems.

The processing of pulsed information service and speech signals according to the proposed method with the formation of information signals in real time does not require high-speed logic elements and is therefore provided with economical CMOS logic

elements, which allows the low power consumption of non-disconnectable circuits of logic devices AA in SECONDS from negotiation mode.

A local radiotelephone communication system for mobile subscribers that implements the method (FIG. 1) comprises a base unit (BA) 1 and subscriber units (LA) 2, while BA 1 includes (FIG. 1) an antenna 3 and connected to it via an element isolation 4, transmitter, 5 and receiver B, as well as a frequency channel frequency synthesizer 7, a base crystal oscillator (BCS) 8 of the internal system time reference frequency and a base logic device (BLU) 9, which includes a base time slot synthesizer (BSVI) 40. shaper synchro group (FSH) 41, an interference analyzer 42, a basic frequency channel distributor (BRCH) 43 and a lock switch for interfering with the frequency channels 44, while the output of the BCG 8 is connected to the signal input of the BSVI 40, the information output of the time interval of the clock group is connected to the enable input of the FSH 41, the information outputs of the time intervals type of communication, address group and interference control are connected to the corresponding enabling inputs of the interference analyzer 42. information outputs of time intervals of the distribution of frequency channels and these frequency channels are connected to the corresponding enable inputs of the BRCH 43 and, in addition, the information output of the time interval for occupying the frequency channels is connected to the enable input of the jamming blocking switch for channels 44, the output of which is connected to the second signal input of the BRCH 43, while the output of receiver 6 is connected to the signal input of the interference analyzer 42, as well as to the first signal input of the BRCH 43, the information outputs of the FSH 41 and the BRCH 43 are connected to the corresponding information inputs of the interference analyzer 4 2, the output of which is connected to the start input of the transmitter 5.

The subscriber unit includes (Fig. 9) a subscriber antenna 10, a transmitter 11, a receiver 12, an isolation element 13, a subscriber frequency synthesizer 14, a subscriber crystal oscillator (ACG), an internal system time reference frequency, a microphone 17. an AM-VIM converter 18, the switch 19 of the input signals of the transmitter is a VI-AM 21 converter, an audio amplifier 22, an earphone 23, a power switch 24, a power supply 69. and also a subscriber logic device (ALU) 16, which includes a deflection corrector frequency 45, a subscriber synthesizer of time intervals (A C V I) 46, a driver of strobe pulses 46-1, a synchronizer for receiving speech signals (CPC) 47, a code synchronizer (CS) for subscriber time 48, a subscriber allocator of frequency channels (ARCHK) 49, signal decoder of noise control signals 50, shaper-decoder of signals of communication type (FDVS) 51, shaper-decoder of address signals (FDA) 52, shaper-decoder of receipt of called subscriber readiness (FDKG) 53, piezoceramic call 25, digital indicator address 26, a digital health indicator 27, a digital readiness indicator of the called party 28, a shaper of sound signals (FPS) 54, as well as a control switch 29, which includes the Speech (microphone on) buttons 30, Dial (dialing mode) 31, 1 ( set of address units) 32, 10 (set of address dozens) 33, VP (memory entry) 34, PE (read memory) 35, SP (collect memory) 36, SI (synchronization) 20, 0V (general call) 37, TV (group call) 38, AR (auto-registration) 39, while the output of the AGC 15 is connected to the signal input of the reference deviation corrector station 45, the output of which is connected to the signal input of the ASVI 46, the information output of the time interval of the sync group (SG) of which is connected to the enable input of the KS 48, the information output of the time interval of the type of communication (BC) is connected to the enable input of the FDVS 51, the information output of the temporary the interval of the address group (AG) is connected to the enabling input of the FDA 52, the information output of the time interval of the noise control (KP) is connected to the allowing input of the decoder of the noise control 50, the information output of the time interval of the receipt and the readiness (CG) of the called subscriber is connected to the enabling input of the FDKG 53, the bus information output of the time intervals of the distribution of frequency channels (RFCs) and the occupancy of the frequency channels (CCC) is connected to the bus enabling input of the ARCH 49, the output of the clock frequency (TCH) is connected to the the inputs of KS 48, ARCHK 49, noise control decoder 50, FDVS 51, FDA 52, FDKG 53, in addition, the information output of the reference frequency correction period (Tkorr) is connected to the enable input of the reference clock deviation corrector 45, the bus output is often t (34) among the terminals with the FZS bus input 54. The information output of the time interval of the asynchronous (AVK) VK mode is connected to the asynchronous input of the power switch 24, as well as to the input of the inclusion of the base frequency channel ARCH 49, the information output of the time interval of the ICS is connected to the control input of the switch 19 input signals of the transmitter, the bus output of the PM clock frequency of the intra-system time and speech clock frequency (TP) are connected to the counting and clock inputs of the CPC 47, while the signal inputs of the COP 48, ARCHK 49, d decoding control noise 50, FDVS 51, FDA 52, FDKG 53, SRS 47 connected to the output of the receiver 12; the control inputs of the FDVS 51 are connected to the buttons 0B 37, GV 38, the control inputs of the FDA 52 are connected to the buttons Set 31, Speech 30, a Set of address units 32, a Set of address tens 38, VP 34, PE 35, PE 36, 0V 37, HB 38, AP 39; the FDKG control input is connected to the Set 31, Speech 30, AP 39 buttons, the SI 20 button is connected to the manual control input of the power switch 24, the ARC K 49 control bus input is connected to the FDVS 51, FDA 52 information outputs, the interference control decoder 50 and the FDKG 53 the information output of KS 48 is connected to the start input of the ASVI 46, the bus information output of the ASVI 46 is connected to the bus signal input of the FZS 54, the bus digital information output of the FDA 52 is connected to the signal input of a digital indicator 26, the bus information output is decrypted A set of interference control signals 50 is connected to the bus input of the digital health indicator 27, the bus information output of the FDKG 53 is connected to the bus input of the digital readiness indicator 28, the signal outputs of the FDVS 51, DFA 52. The DFKG 53 and the frequency response 49 are connected through a gate pulse generator 46-1 s the input signal of the switch 19 input signals of the transmitter, the signal bus output of the frequency setting code ARCH 49 is connected to the bus signal input of the frequency setting code of the subscriber frequency synthesizer 14, the registration output is busy the frequency channel ARCHK 49 is connected to the input blocking radiation of the address signals of the FDA 52, the fixed clock output of the transmitted speech signals CPC 47 is connected to the clock input of the AM-VIM converter 18, the following clock output of the received speech signals CPC 47 is connected to the clock output of the VIM-AM converter 21 , the pulse-width output of the received signals which is connected to the input lock output signal AM-VIM Converter 18, while the current input of the power switch 24 is connected to a power source 6 9, and the output of the switch 24 is connected to the power inputs of the frequency synthesizer 14, the AM-VIM converter 18, the input signal switch of the transmitter 19, the transmitter 19, the receiver 12, the VIM-AM 21 converter, and the audio frequency amplifier 22.

The base time slot synthesizer (BSWI) 40 contains a twenty-two-bit counter 55 and a synchronizer 56 base interval shaper 56, a communication type base interval shaper 57, an address group base shaper 58, an interference control base shaper 59, the shaper of the base interval for the distribution of frequency channels 60, the shaper of the base interval for the occupancy of frequency channels 61 and the shaper b the clock interval of the time channel 62, as well as a clock and gate pulse generator (TSI) 63, connected to the outputs of the fourth, fifth and sixth bits of the counter, the clock output of which is connected to the clock inputs of the aforementioned time slot drivers, while the output twenty of the second bit of the counter 55 is connected to the enable input of the former of the base interval of the time channel 62, the output of which is sub. the keys to the enable input of the shapers of the time interval of the synchro group 56, and the signal outputs of the said shapers are connected to the enable inputs of the FSH 41, the interference analyzer 42, the BRCH 43 and the interlock switch for blocking the affected frequency channels 44.

The synchronizer (FSH) 41 contains a multiplexer 65 and a static generator of the sync code 64 connected to its signal inputs, while the enable input of the multiplexer 65 is connected to the signal output of the base interval generator of the sync group 56, a clock input with clock output t4 of the clock and gate pulses 63 BSVI 40, and the signal output of the multiplexer 65 is connected to the information input of the interference analyzer 42.

Interference analyzer 42 contains first 67 and second 81 registers, first 68 and second 73 inverters, counter 71, comparator 72, first 74 and second 79 elements OR, first 75, second 76, third 77, fourth 78 and fifth 66 elements AND, the first 80 and second 86-elements 3 OR, while the signal input of the first register 67 is connected to the output of the receiver 6, and its enable input is connected to the former 57 of the basic interval of the communication type ASVI 40, the first and fourth bit outputs of the first register 67 are connected to the first and second inputs of the first element OR 74, the second bit output ne the first register is connected to the second inverter 73, and also, to the input of the first element 3 OR 80, the third bit output of the first register 67 is connected to the first inverter 68, as well as to the input of the second element And 76, the second input of which is connected to the output A 2 of the comparator 72, while the output of the first element OR 74 is connected to the input of the second element OR 79, the outputs of the first inverter 68 and the second inverter 73 are connected respectively to the input of the first element And 75, the output of which is connected to the input of the third 77 and fourth 78 AND elements, while the second during the third 77 element And the output A 2 of the comparator 72 is connected, the input of which is connected to the output of the counter 71, the enable input of which is connected to the base interval shaper of the address group 58 BSVI 40, and the signal input is connected to the output of the receiver 6, while the output of the third 77 element And is connected to the second input 79 of the OR element, the output of the first 74 element OR is connected to the first input of the second 79 element OR, the output of which is connected to the input of the 1st bit of the second 81 register: output A 2 of the comparator 72 is connected to the second input of the fourth 78 ele An AND gate, the output of which is connected to the first input of the first 80 element 3 OR, while the output of the first 80 element 3 OR is connected to the input of the second bit of the second 81 registers, the input of the parallel data loading control is connected to the output of the register driver 58, the parallel load control input the data of which is connected to the output of the former 58 of the base interval of the address group BSVI 40, the input control serial data output of the second 81 registers is connected to the output of the former 59 of the basic interval of the control noise BS And 40, and the output of the second register 81 is connected to the second element 86 ahodom second OR 3, wherein the clock inputs of the first 67 and second registers 81 and counter 71 are connected

with the BSVI 40 clock interval shaper 40, the information reset inputs of the first register 67, the counter 71, and the second register 81 are connected to the output of the shaper 60 of the basic frequency allocation channel of the ASVI 40, and the output of the second 86 element 3 OR is connected to item 66 of the element And, the second input of which is connected to the output of the strobe pulses of the driver 63 clock and strobe pulses ASVI 40, and the output is connected to the start input of the transmitter 5,

The basic frequency channel allocator (BRCH) 43 contains the first 82 and second 85 OR elements, register 83, multiplexer 84, AND element 87, inverter 70 and RS-trigger 88, while the first input of the first OR element is connected to the output of receiver 6, and the second input of this element is connected to the output of the lock switch 44 of the frequency channels affected by the interference, the output of the first 82 OR element is connected to the information input of the register 83, the input of which is connected to the shaper 61 of the time interval for occupying the frequency channels BSVI 40, and the clock one - with the output of the generator 63 clock pulses, the bit outputs of the register 83 are connected to the corresponding inputs of the multiplexer 84, the permitting input of which is connected to the former 60 of the base interval of the allocation of frequency channels BSVI 40, and the output is connected to the first input of the second 85 element OR, output which is connected to the first input of the first 87 AND element, and the second input of which is connected to the BSVI 40 pulse shaper 63, and the output through the inverter 70 is connected to the S input of the RS flip-flop 88, the R-input of which is connected to the Iel 59 of the base interference monitoring interval BSVI 40, and the signal output of the above-mentioned trigger 88 is connected to the second input of the second OR element 85, while the output of the first AND element is connected to the third input of the second 86 element OR of the interference analyzer, the output of which is connected to the input transmitter start 6.

Switch 44 blocking the affected channels contains a multiplexer 90 and a statically controlled switch 89, the outputs of which are connected to the bit inputs of the multiplexer, while the resolving input of the multiplexer 90 is connected to the output of the former 61 of the time interval for occupying the frequency channels BSVI 40, the clock input with a shaper 63 clock pulses, and the signal output with the second input of the first 82 element OR frequency distributor 43.

The subscriber time code synchronizer (CS) 48 includes a register 91, a comparator 92, a static code switch 93, an AND element 94, a two divider 95, a switch 96 and a counter 97 of half the duration of the clock interval, while the enable input of the register 91 is connected to the shaper 56 of the base the interval of the ASVI sync group 46, and the signal input of the register 91, the first input of the AND element 94, as well as the control input of the switch 96 are connected to the output of the receiver 12, the bit outputs of the register 91 are connected to the first bit inputs of the comparator 92. the second the bit inputs of which are connected to the corresponding outputs of the static code switch 93, the output А В of the comparator 92 is connected to the second input of the element AND 94 and with the enable input of the counter 97, the output of the element And 94 is connected to the enable input of the divider into two 95, the signal input of which is connected to ACG 15, and the output is connected to the first input of the switch 96, the second input of which is also connected to the ACG 15, and the output is connected to the signal input of the counter 97 half the duration of the clock interval, the output of which is connected to the reset input twenty Idvukh-bit counter 55ACI46,

The Shaper-decoder address signals (FDA) 52 contains the first 99 and second 103 counters of address units (SAE), the first 100 and second 104 counters of address ten (SAD), the first 101, second 125, third 114, fourth 123, fifth 129 and sixth 126 keys, first 102-, first 102, second 110, third 130 and fourth 131 D-flip-flops, address unit comparator 105, address tens comparator 106. first 109, second 115, third 117, fourth 122, fifth 121 and the sixth 127 AND elements, the first 111, the second 128, the third 116, the fourth 123 and the fifth 124 OR elements, random access memory 112, first first 119, second 120, third 133 and fourth 113 elements 3 OR. switch 107 for entering the subscriber number of address units, switch 108 for entering the subscriber number of address tens and a divider counter into four 132, with the clock input of the third D-flip-flop 130, the counting input of the divider counter into four 132, the first input of the fourth OR element 118, the first input of the fourth element 3 OR 113, the clock input of the first D-trigger 102, the second input of the fifth element And 121, the clock input of the second D-trigger 110 and the enable input of the second CAE 103 are connected to the output of the base interval driver of the ASVI address group 46 counting D-inputs The first CAE 99 and the second CAE 103 are connected to the output of the first element 3 OR 119, the first input of which through the fifth AND 121 element is connected to the output of the ASVI clock (TA) pulse shaper 46, to which the second stroke of the sixth AND 127 element is also connected, whose first input is connected to the output of the button 35 Read memory, and the output connected to the second input of the second element 3 OR 119, the third input of which is connected to the output of the third element And 1T7, the first input of which is connected to the output of the button 32 Set of address units ALU 16, and the second - with the exit of frequent you are 1 Hz ASVI 46, which is also connected to the first input of the second element And 115, the second input of which is connected to the output of button 33, a set of address dozens of ALU 16, and the output through the second input of the third element OR 116 is connected to the counting input of the GARDEN 100, the first input of the third OR element 116 is connected to the output of CAE 99; enable inputs CAE 99 and CAD 100 are connected to the output of the fourth element 3 OR 113, the second input of which is connected to the output of the third key 114, the signal input of which is connected to the output of the Set button 31, and the control input is the output of the button 30, speech ALU 16; the third input of the fourth element 3 OR 13 and the first input of the fourth element And 122 are connected to the output of the button 35 ALU state of emergency 16, while the output of the fourth element And 122 is connected to the first input of the fifth element OR 124, and the second input to the signal output of RAM 112; the input of the received signal receivers 12 is connected to the signal input of the first key 101, the output of which through the fifth element OR 124 is connected to the signal input of the first D-flip-flop 102, the output of which is connected to the input C Stop CAE 99 and to the control input of the fifth key 129, the signal input of which is connected to the output A B of the comparator 105 and 106, also connected to the second input of the first element And 109, to the second input of which the output of the signals received by the receiver 12 is connected, while the control input of the first key 101 is connected to the output of the second. element 3 OR, the first input is connected to the output of the third D-trigger 130, and the third is connected to the input of the third key 114; the output of the first element And 109 is connected to the signal input of the second 0-trigger 110, the output of which is connected to the second input

the fourth element OR 118, and also with the first input of the first element OR 111 connected to the input W Write to RAM 112, while the output of the fourth element AND 118 is connected to the input R Reset CAE 99 and GARDEN 100, in addition, the output of the second D -trigger 110 is connected to the signal input of the second key 125, the output of which is connected to the ARCH 49 and FZS 54 ALU 16, while the control input of the second key 125 is connected to the button 39 AR ALU 16, which is also connected to the third input of the third element 3 OR 113 ; the bit outputs of the static commutators for entering the subscriber number of the address units 107 and address dozens 108 are connected to the inputs B of the comparator 105 and 106, the inputs of which are connected to the bit outputs of the second CAE 105 and the second CAD 104, and the bit outputs of the first CAE 99 are connected to the input X of the address of the lines of RAM 112, and to the decoder of the bit category of the digital indicator 26, the bit outputs of the first CAD 100 are connected to the input Y of the address of the columns of the RAM 112 and to the decoder of the bit rank of the digital indicator 26; the signal output of the RAM 112 is connected to the first input of the second OR element 128, the output of which is through the fourth key 123, the control input of which is connected to the button 30. The speech is connected to the input of the ALU gate gate generator 46-1, besides, the output of the fourth key 123 is connected with the signal inputs of the third D-flip-flop 130 and the fourth D-flip-flop 131, the clock input of which is connected to the output of the divider counter by four 132, and the output is connected to the first input of the third OR element 3, the output of which is connected to the input S Read disable RAM 112 and with management the input of the sixth key 126, the output of which is connected to the second input of the second element OR 128, while the second input of the third element 3 OR 133 is connected to the output of ARCHK 49 ALU 16, and the input memory reset RAM 112 is connected to the button 36 SP ALU 16.

A subscriber frequency channel allocator (ARCH) 49 (Fig. 15) contains an n-bit register 134, a p-channel multiplexer 135, a programmable counter 136, first 137, second 144, third 146 and fourth 149 elements And, the first 138 and second 148 elements OR element ZI 139, first 140 and second 143 inverters, first 141 and second 150 RS-flip-flops, static switch of the frequency code VK 145, two-channel key 147, while the first input of the first element And 137 is connected to the output of the receiver 12, the second its input is connected to

the output of the ZI element 139, the first input of which is connected to the output of the noise control decoder 50. the second to the output of the FDA 52, and the third to the output of the FDK 53. the output of the first element And 137 is connected to the input of the serial data input of register 134, its bits the outputs are connected to the corresponding inputs of the multiplexer 135, and the clock and enable inputs are connected to the clock and RFC outputs of the ASVI 46 through a two-channel key 147. the control input of which is connected to the output of the second RS-flip-flop 150, which is also connected to the radiation blocking input of the address and FDA pulses 52, the signal output of the multiplexer 135 through the inverter 143 is connected to the first RS-flip-flop 141, the fourth element And 149, as well as the third element And 146, and the control inputs are connected to the code outputs of the counter 136, the input of which the Inhibit account is connected to the output of the first RS-flip-flop 141, input Reset through the first element OR 138 is connected to the AVK ASVI 46 output and button 37 General call ALU 16, and the initial installation inputs are connected to the static code of the frequency code В К 145, the enable input is connected to the output of the ASVI 46 CHCH with which also connect the resolution path of the multiplexer 135, the R-input of the first RS-flip-flop 141 and the second input of the second AND element 144. the code outputs of the counter 136 are also connected to the control inputs of the frequency synthesizer 14, the input of the first AND element 137 through the first inverter 140 is connected with the first input of the fourth AND element 149, the output of which through the second OR element 148 is connected to the R-input of the second RS-trigger 150, while the second input of the second OR element 148 is connected to the button 30 Speech ALU 16, the second input of the third element And 146 is connected to button 31 Set ALU 16, and the output of the third ment 146 and connected to the ALU 16 46-1 FCS.

The synchronizer for receiving VIM speech signals (CPC) 47 (Fig. 17) contains a p-bit register 151, an n-channel Multiplexer 152, the first 153 and second 154 shaper of the guard interval, the first 155 and second 157 RS-flip-flops, asynchronous reversible counter 156, element I 158, first 159 and second 160, while the bit outputs of the p-bit register 151 are connected to the corresponding ones taking into account the bias at p / 2 inputs of the p-channel multiplexer 152, the first shaper of the guard interval 153 connected to the n / 2-bit output of the n-bit register 151, and the second form the guard interval switch is connected to the output of the p-channel multiplexer 152, while the bit outputs of the synchronizer of the reverse counter 156 are connected to the control inputs of the multiplexer 152, the input for increasing the number occupied by the counter by +1 is connected to the output of the first RS-trigger 155, and the input reducing the number occupied in the counter is connected to the output of the second RS-trigger 157, while the output of the second shaper of the guard interval 154 is connected to the first input of AND element 158, the input R of the first RS-trigger 155 and through the inverter 159 with input S to orogo RS-flip-flop 157; the second input of the And element 158, the input R of the second RS flip-flop 157, and through the second inverter 160, the input-5 of the first RS flip-flop 155 is connected to the output of the receiver 12, and the output of the And element 158 is connected to the enable input of the counter 156.

The local radiotelephone communication system of mobile subscribers operates as follows.

In the initial state, in the absence of negotiations mode, BA 1 (Fig. 7) AA 2 (Fig. 9) do not emit and do not receive radio signals, the power supply of radio-frequency devices is turned off, while BCG 8 and BLU 9 are continuously operating in BA 1, and in AA 2 operates ACG 15 and ALU 16. After the time interval set according to the method for turning on K, ALU 16 of all AA 2 form a power-on signal of radio-frequency devices, which is fed to the control input of power switch 24. After that, BA 1 and AA 2 emit and receive service signals e in BA 1 in the mode of radiation extending from the transmitter 5 via the isolator element 4 in the antenna 3, and in the reception mode of the antenna 3 receives the receiver 6 and further into BLUE 9, wherein the frequency synthesizer 7 generates a frequency fn °. installed for the operation of the VC dyna LRTS. In an example implementation, the transmitter 5 and receiver 6 are made according to the direct conversion scheme (see, for example, U.S. Pat. NKI 455/205 (MKI N 04B 1/10) No. 4776039). which makes it possible to use a small-sized frequency synthesizer, made, for example, according to A.S. USSR No. 1506552, class NOZ / L 7/18.

The BLU 9 generates at the input 2 of the transmitter 5 pulse triggering signals shown in Fig. 86: code synchro group (SG), noise control (CP) and base frequency distribution (RFC) signals.

In the presence of negotiations in the individual communication mode (Fig. 8c) from the output of receiver 6 to the input of the BLU 9 in the address group

two address pulses are received, in the group of the called subscriber's readiness receipt group, one pulse and a certain number of pulses corresponding to the frequency channels occupied by the negotiations in the frequency response group; in group communication mode (Fig. 8d), the number of pulses coming from the output of receiver 6 in the address group corresponds to the composition of the group, and in the case of a general call in the address group, one pulse comes from the output of receiver b (Fig. 8d). Processing received and generating the emitted signals in the BLU 9 is performed by a synchro group generator 41, an interference analyzer 42, a base frequency distributor 43 connected to the base time slot synthesizer 40, while the interference analyzer 42 generates a signal No interference only in the individual communication mode with the number of address pulses A 2, the base distributor of the frequency channels 43 generates a signal. The frequency channel fi is free, receives a signal. I occupy the frequency channel fi, add this signal to the short-term memory, then analyze the presence of free frequency channels and in the next VK turn-on frame generate a signal The frequency channel m is free, received by the next group of subscribers when they are requested for a radio connection.

8, the BLU 9 includes a static switch of the frequency channels 44 affected by interference, by means of which the frequency channel fe simulates (Frequency synthesizer 7). The frequency synthesizer 7 operates at the frequency assigned to the time channel, the code that is set in the synthesizer 7 for a specific LRTS complex.

The subscriber unit 2 (Fig. 9) works as follows.

In the talk-free mode 8, the ACG 15 generates the reference frequency clocks, which are input to the ALU 1.6 of the reference frequency deviation corrector 45 of the ALU 16, while in the 8K switching frame (FIG. 10) service signals received by the subscriber antenna 10 through the Call 13 arrives at the receiver 12 and from its output to the signal input of the ALU 16, which after receiving the code synchronization signal signals emitted by BA 1 (Fig. 106) and the absence of the address call signal of the subscriber number AA generates a signal that is OK, which is displayed on the health indicator 2 7, and turns off the power supply circuits between the VK switching frames.

In the incoming call receiving mode, the address signals are fed to the input of the FDA 52 ALU 1-6, which generates a caller's number code on the address indicator bus, which is highlighted by address indicator 26, and also generates a signal at the output of the sound signal activation, which activates the piezoceramic call - Sky 25, at the output of the FDKG 51 forms a signal-receipt of readiness for negotiations, and also at the output of the ARCHK49 signal I occupy the frequency channel fi, which through the switch 19 are fed to the start input of the transmitter 11 and emit through the isolation element 13 subscriber antenna 10. after which the ALU 16 generates a constant-on signal of the power switch 24, as well as the frequency setting code fi on the ARCHK bus output 49, which is fed to the control input of the frequency synthesizer 14, in addition, the CPC 47 generates pulses arriving at the AM clock input -VIM converter 18. and clock pulses supplied to the input of the VIM-AM converter 21. In this case, after turning on the toggle switch SPEECH 30, the signal flows from the Micro-Background 17. to the input of the AM-VIM converter 18, made, for example, by a.s . USSR No. 871327, class N 03 K7 / 06, from the output of which the signals are transmitted through switch 19 to transmitter 11 and then through electronic isolation element 13 to subscriber antenna 10, made in the form of a flexible wire of length A / 4 hidden in the clothes of a subscriber ( Fig. 26),

The received signals pass through the isolation element 13 to the receiver 12, made according to the aforementioned direct conversion circuit and then from its output through the VIM-AM 21 converter, made, for example, according to A.S. USSR No. 1129739, class Н 03 К 9/09, through the audio frequency amplifier 22, they are sent to the earphone 23. In the speech reception-transmission mode, the transmission of transmitted signals from the output of the AM-VIM converter 18 is blocked by the received VIM signals, which are transmitted to the input from the PWM output of the VIM-AM converter ban Tr, which eliminates the mode of interruption of voice messages and the imposition of several speech signals in group mode. After turning off the toggle switch, Speech 30 ALU 16 generates a signal to turn off the power supply at the output of the switch 24 and turn off the signal. I take the frequency channel fi.

In the dialing mode of the called party, the toggle switch Set 31 prohibits the passage of the received address signals (similar to the handset lifted in

the wired telephone, by turning on the buttons 32 and 33, the desired address is set, the entered address is entered into the ALU 16 using the button 34, and the SPEED 30 toggle switch on and off the service information, while the called subscriber’s readiness indicator 28 receives the called-up readiness signals and in the presence of a signal G - (ready), the frequency channel occupation mode and speech-signal reception-transmission mode are activated.

In the Auto Registration mode, the ALU 16 writes to the memory the numbers of subscribers who turned during the long busy period of the subscriber, which, when the HGG button 35 is pressed, are displayed on the indicator 26 and are deleted from the memory when the OP button 36 is pressed,

In the group call mode, the dialed address numbers are sequentially entered into the ALU 16 memory by pressing the VP 33 button, after which the radio connection signals are turned on by turning on the SPEED 30 toggle switch, and the address number 26 of all subscribers in the group displays the number of the oldest subscriber in the group.

In the incoming call mode during negotiations, the ALU 16 generates a piezoceramic 25 call on signal and displays the number of the subscriber who made the incoming call on the address indicator 26, however, the radio channel for connecting this subscriber is not provided, the calls of the called subscriber are not heard .

In the general call mode, the ALU 16, after receiving the 0V signal, turns on the piezo-ceramic 25 call, while the address indicator 26 lights up the number of the subscriber (Fig. 8) of the emitted general call signal, the frequency code fn ° of the channel is generated on the bus output of the ALU 16 frequency setting code, previously started conversations of subscribers in the frequency channels are not interrupted, voice reception and transmission are carried out in conference mode, everyone hears everyone, taking into account the blocking of all AAs in reception mode when one AA is in L RTS in transmission mode.

The basic logical device 9 (Fig, 11) works as follows.

In the initial state B, KG 8 generates a stable clock signal of the reference frequency (Fig. 12a), which is fed to the counting input of the 22-bit counter 55 BSVI 40, while the counter during operation reaches the 22nd bit, the output signal of which arrives at the input of the base interval driver B K 62, made on the basis of an IK trigger, while

the output of the base interval shaper VK 62 sets a high voltage level (Fig. 126), which is applied to the resolving inputs of the shaper 5661 and is reset by the decay of the output signal of the shaper of the base interval for occupying the frequency channels 61. Having received a resolution signal, the base interval shaper SG based on a two-bit the counter, the clock input of which is connected to the output 1 of the TSI 63 shaper, generates an output signal, the duration of which corresponds to four clock intervals of the sync group (fi .

5-12c), the decline of this signal allows the base interval of the BC of the shaper 57 to work, similarly based on a two-bit counter and generating a similar output signal (Fig. 12d), decline

0 output pulse BC allows the operation of the base interval generator AG 58, made on the basis of a seven-bit programmable counter, the clock input of which is connected to the output 1 of form 5 TSI 63, and the end signal is generated after the counter dials the number of subscriber numbers set in the LRTS (for example, N - 99), and allows the operation of the generator of the basic interval of interference monitoring59, which is also based on a two-bit counter, and a four-cycle interval is formed in which for interference roll used the first two cycles, and

5, the third and fourth clocks are used to form a delay for the time of receiving and transmitting ready signals of subscriber units not analyzed by the base station.

0

A drop in the output signal of the base interval driver of the interference control interval 59 permits the operation of the driver of the base interval for the allocation of frequency channels (RFCs) 60, made similarly on the basis of a four-bit counter, and a time interval containing 8 clock pulses is generated (Fig. 12g). Similarly, the drop in the output signal of the base interval driver RFC 60 permits the operation of the base interval driver RFC 61. The output signal of which also contains eight clock intervals, while the drop in the output pulse

5 of the base interval driver of the BCH 61, reset the output signal of the base interval driver of the VK 62 to zero and the operation of the formers 56-62 is stopped until the 22-bit counter 55 is filled again.

Shaper 63 clock and strobe pulses STSI). made on the basis of logical matching schemes according to the output signals of the fourth (Fig. 12h), fifth (Fig. 12k) and sixth (Fig. 12f) bits of the 22-bit counter 55 generates clock (Fig. 12m) and gates (Fig. 12h) pulses of fixed activity Tstrob located in the center of clock interval 14. In an example implementation, pulses having a duration of Tstrob - 32 μs are used to transmit position-per-pulse information in a radio link.

The signal from the second output of the base interval shaper SG 56 is fed to the enable input of the multiplexer 65 of the shaper of the sync group 41. Moreover, in accordance with the clock signals from the output T4 of the shaper TSI 63, which are fed to the clock input of the multiplexer 65, the output of which is by connecting the channels to the outputs of the static of the switch 64, serial information is generated that repeats the sync group structure defined by the static switch 64. This information is fed to the first input of the second element 3 OR 86 of the interference analyzer 42 and then through the fifth element And 66 passes to the start input of the transmitter 5.

After the sync group is emitted from the output of the receiver 6, the signals of the communication type are received at the input of the register 67 of the interference analyzer 42, in the implementation example: 0000 — individual call, 0100 — general call, 0010 — group call, etc. At the same time, the pulse of the base interval B C is received at the enable input of the register 67 from the output of the shaper 57, as a result of which the received code type of communication is entered into the register 67 and stored in it until a reset pulse comes from the shaper of the base interval of the RFC 60. After that, the base interval shaper AG 58 generates a pulse arriving at the resolution input of counter 71, as a result of which information in the number of pulses arriving in the AG interval from the output of receiver 6 is stored by counter 71 and is also stored in it for a while of the output, a reset pulse from the former of the base interval of the RFC 60. The comparator 72, using this information, outputs the signal / i А 2 to the second input of the third element And 77 and to the second input of the second element And 76, and in the case of A 2 the information goes to the second input of the fourth element AND 78.

In the individual call mode in the absence of interference at the outputs of the 2nd and 3rd

bit register 67 sets the level of log.O, and at the outputs of the first inverter 68 and second inverter 73 connected to them, log.G, as a result, the level of log.1 is set at the output of the first element And 75 connected to them, and then on the first the entrance of the fourth element And 78; when the number of address pulses 2 at the output of the comparator 72, level

Log.G goes to the second input of the fourth. th element AND 78, as a result of which the level of log G. is established at its output. which through element 3 OR 80 is fed to the input of the second bit of the second register 81, which is set to parallel reception of pulse information of the shaper of the base interval AG 58, and in the first bit of this register in the absence of interference in the BC group, i.e. the levels of the logical G. in the 1st and 4th bits of the first register 67, the level of the logical O. remains. transmitted by the first element OR 74 and the second element OR 79, upon receipt of the second input

register 81 of the pulse from the output of the shaper of the base interval KP 59, the register 81 switches to the sequential reading mode, as a result of which the output

code 01 - there is no interference coming into the path of element 3 OR 86 and then through element AND 66 to the start input of transmitter 5.

The presence of interference on the base integral of the type of communication creates a logic level G. at the outputs of the 1st and 4th bits of the first register 67, which passes through the first element 74 and the second element OR 79 into the first bit of the second register 81 and on the serial The code 11 is generated at the output of this register - there is interference. Similarly, with the number of pulses A 2 in the AG, the level of the logic G. from the output A 2 of the comparator 72 goes to the first input of the third element And 77 and from its output to the second input of the first element OR 79 and then from its output

in the first bit of the second register 81, as a result of which code 10 is generated - There is interference.

In group call mode (0010) when

the absence of interference in group B C at the output of the 3rd bit of the first register 67, the level of logic G is set, which arrives at the first input of the second element And 76, when

this is not the second input of this element the level log comes. D from exit 2 of the complarator; 72, as a result of this, the level of logic G. is set at the output of the second element 1/5 76 and through the element 3 OR.80 fits into the 2nd bit of the second register 81,

as a result, code 01 is generated - No interference.

In General call (0100) mode, level 1 from the 2nd bit of the first register 67 goes to the third input of element 3 OR 80 and then to the 2nd bit of the second register 81, which ensures the formation of code 01 - No interference.

In the frequency channel distributor (RFC) 43, information is received from the output of receiver 6, as well as from the output of the blocking switch of the channel 44 affected by interference in the form of pulses at clock intervals, the number of which corresponds to the number occupied by AA or withdrawn from use by the switch 44 under the conditions of channel interference in the base interval of the channel occupation (BCH), it passes through the first element OR 82 to the information input of the 8-bit register 83, to the allowing input of which a pulse is supplied from the former of the base interval of the BCH 61, as a result p dnyh outputs 8-discharge register 83, corresponding to the numbers of frequency channels occupied by the logic 1 levels are set, and the outputs corresponding to the numbers are not occupied by the channels are set levels log.O. This information (Fig. 15c) is stored in the register 83 for the time between VC turn-on frames until the next operation of the base interval driver of the BCH 61, during operation of which the consequence of its successive movement under the influence of clock pulses is pushed out and replaced by new information - signals The frequency channel fi is occupied emitted by AA 2 and coming from switch 44 in this VK enable frame.

The multiplexer 84, while operating on the resolving stroke of the pulse of the base interval of the RFC 60 and the clock pulses at the synchronization input, sequentially connects the bit outputs of the register 83 to the information output in the form of log.1 or log.O at the corresponding numbers of the clock intervals frequency channel occupation, which is supplied to the first input of the second OR element 85 and from its output to the first input of the And element 87, and. in addition, through the inverter 70 to the input S of the installation of the RS-trigger 88.

When the multiplexer 84 is connected to the next bit of the register 83 having the log level O. (channel is not busy), this signal is fed to the input of the AND element 87, and is converted by an inverter 70 log 1 and. sets the log level. Г at the output of the RS-flip-flop 88, which is fed to the second input of the second OR element 85, which is stored until the base interval of the noise control is turned on in the next VK switching frame. As a result of this, the passage of element And 87, to the second input of which the clock signals from the transformer TSI 63 go, to the third input of the second element 3 OR 86 and then to the start input of the transmitter 5 in the base interval of the distribution of frequency signals, a pulse sequence is received (Fig. 8a, b, c), containing a log. About only one clock interval corresponding to the number of the frequency channel, which

5 can be occupied by subscribers in a given frame for switching on a temporary channel, which is accomplished by them by emitting a pulse on a clock interval with a matching sequence number on the base

0 interval for occupying frequency channels (Figs. 8a, b, c).

Switch 44 blocking the affected interference channels forms a level log. 1 at clock intervals, the number of which is set by switching on the toggle switch with the corresponding number in the static control switch 89, while the multiplexer 90 alternately connects the outputs of the switch 89 to the first element

0 OR 82 distributor of frequency channels 43, as a result of which a signal is generated. Frequency channel fe is occupied, which allows to exclude this channel from circulation in the case of, for example, a high level of mutual

5 interference with the same type of equipment (close proximity of two LRTS or in the presence of a spectrally combined external radio system in one of the frequency channels of narrowband signals).

0 ALU 16 works as follows.

ASVI46 (Fig. 11 a) forms time intervals according to the diagram of FIG. 12.

Shaper-decoder control

5 interference 50 and FDKG 53, made on the basis of a two-bit parallel-serial register, receive and store information on the presence of interference and

0 the called state of the called party. This information is fed to the inputs of ARCHK 49, which, if there is no Noise, the called subscriber is ready to negotiate, and if there is an incoming address call, it generates a signal. I take the frequency channel fi. FDVS 51, made on the basis of a four-bit register of parallel-serial operation, receives and stores information of the type of communication received in the incoming call mode from the output of the receiver 12, and in the set mode from the buttons 37 0V or 38 TV, while in the mode an outgoing call, information from the register is output to serial data output and arrives through the FSI 46-1, made on the basis of a multi-input OR element, combining the signals of ARCHK 49, FDVS 51, FDA 52, FDKG 53 and element I. generating gated pulses, to the second input com utatora 19 and further to the trigger input 11 of the transmitter.

The reference frequency deviation corrector 45 is based on a key, to the control input of which a programmable counter with a static control is connected, which allows forming a variable interval of prohibition of the passage of the reference clock pulses. According to the certification of a specific ACT 15, the individual size of the DTcorr prohibition interval is established. which is entered into the programmable counter, as a result of which, after reaching the correction time for AA (for example, every 1.6 ms), the correction command arrives from the output of the Tcorr ASVI to the counter enable input, which interrupts the impulses from the AKT 15 output to the set time A Tcorr with the key 8 ASVI, thereby delaying the filling of its 22-bit counter 55 for the time A Torr, thereby eliminating the discrepancy in the operation of ASVI 46 caused by the deviation of the frequency of ACT 15 from the BCG 8.

The audio signal generator (FZS) 54 is a generator of periodic signals with durations of 0.2 s - 1 s. including the passage of the frequency of 1 kHz and other tonal frequencies taken from the 22-bit counter of the ASVI 46, with the switching intervals characteristic of the wired telephone in the modes you are called, Busy, Wait for the connection in accordance with the commands received from the FDA 52.

In addition, the FZS 54 generates a malfunction signal in case of non-reception of the SG signals in the switching frame B K.

Code synchronizer (KS) 48 subscriber time (Fig. 13) works as follows.

The code pulse sequence of the sync group is received from the output of the receiver 12 to the information input of the register 91 and, if there is a pulse of the base interval of the sync group at its resolving input, it sets the code sequence of the log levels. D and log. O at its discharge outputs. When coincident

the received code sequence with the code installed on the reference bit inputs of the comparator 92 by the code comparator 93, at the output AB of the comparator 92 at the 5th edge of the last pulse of the code synchronization group, the log level is set. 1, which arrives at the second stroke of the And 94 element, while the information pulse passes through the first input of the And 94 element to the enable input of the divider into two 95, as well as to the control input of the switch 96, the pulse train with half the pulse rate passes through the first input reader 96 to the information input of the counter 97, as a result of which, at the end of the received SG pulse, a number corresponding to half the duration of this pulse is set in the counter, while

With the recession of the information pulse, the output of the RS flip-flop 98 is set to the position of log 1, which switches the switch 96. And the clock pulse of the ACG 15 frequency is input to the input of the counter 107.

5 Upon reaching the number recorded in counter 97, equal to Eo T4 / 2, at the output of counter 97, the log level is set. 1, the determining moment TO В К, the front of which arrives at the input of the reset to zero of twenty

0 two-bit counter 55 ASVI 46, after which ASVI 46 starts synchronous relative to the center of the last pulse received from the synchronous group BA cycle shaper time intervals time channel.

FDA 52 (Fig. 14) operates as follows.

In the standby mode of an incoming address call when you turn on the frame VK to

0 enable (EU) inputs of the first CAE 99 and the first CAD 100 through the first input of the fourth element 3 OR 123 from the AG output of the ASVI 46, a pulse of the base interval of the address group is supplied, and to the counting (D) inputs through

5, the first input of the fifth element And 21, if there is an AG pulse at its second input. and through the first input of the first element OR 119 pulses from the clock output of the ASVI 46 are received. The address pulse received from the output of receiver 12 goes to the input of the first key 101 and then passes through the fifth element of OR 124 to the D-input of the first O-flip-flop 102, output which is transferred to the state by an incoming pulse

5 log. 1, the presence of which at the input of the account prohibition (C) stops the operation of the first CAE 99 and the first CAD 100, while the digital code of the address number of the received pulse is recorded on their bit outputs. The second SAE 103 and the second GARDEN 104 lead

an independent account of 46 address clock pulses received from the ASVI, as a result of which for the period of the clock interval corresponding to the address number of this AA, a digital code is set on the bit outputs of CAE 103 and CAD 104 that corresponds to the address units 107 and address tens 108 installed on the static input switches, as a result, at the common output А В of the comparators 105, 106, the log level 1 appears at the time of the clock interval corresponding to the subscriber number of this AA, which is fed to the first input of the second ment 3 OR 120, and from its output to the control input of the first key 101, which excludes the passage of its own address pulse. to the stop input CAE 99. In the case of receiving the address pulse corresponding to the address of this AA, from the output of receiver 12 it is through the first element And 109 passes to the D-stroke of the second D-flip-flop 110 and sets its output signal log. 1, which through the first input of the first element OR 111 is fed to the input W of the write enable in RAM 112, and also through the sixth element OR 118 to the input of the CAE reset lock 99 and SAD 100 and, in addition, cher When the normally-closed second key 125 is output to the FZS 54 to generate an audio signal, you are called up by the ARCH 49 to enter the frequency channel number presented by the BA for negotiations. In this mode, code information from the bit outputs CAE 99 and CAD 100 is received decoders address indicator 26, which displays the number of the caller.

At the beginning of the next VK turn-on frame, the output of the second D-flip-flop 110 by the edge of the AG pulse changes to the log state. О, which causes the CAE 99 and CAD 100 to be reset to zero and sets the digital indicator 26 to zero. During LRTS operation, in each VK turn-on frame CAE 99 and GAD 100 record information about the reception of address pulses of other subscribers, however, this information, if there is no reception of its address pulse, is reset by the fall of the AG pulse received through the second input of the sixth OR element 118 and does not flash on the digital indicator 26 aets. When you receive your address pulse in the negotiation mode, the number of the new subscriber of the incoming call is displayed in the same way, while the connection of the new subscriber to the occupied frequency channel is blocked in his

AA receiving the signal, the called party is busy being generated by FDKG 53 when the 30 Speech and 31 Dial buttons are turned on.

In the auto-registration mode, reception, indication and recording in RAM 112 of the incoming address pulses occurs similarly to the waiting mode of an incoming call, while the key 125 is sent to the control input

of the AR button 39, an OG signal is supplied, as a result of which the signal flow is blocked on FZS 54 and ARCHK 49, which excludes the formation of an audio signal;

5 busy channel signals.

In Auto Registration Number

the number of incoming call users is highlighted with on the digital indicator 26 in the interval

4 s time between VK enable frames,

0 for the caller’s visual information about incoming calls.

In the Dialing mode, the signal is log.1 from the button 31 Dialing through the third key 114 and the third input of the second element 3

5 OR 120, is fed to the control input of the first key .101. which blocks the passage of address pulses from the output of the receiver 12. At the same time, the signal log.1 passes through the aforementioned key

0 114 and the fourth element 3 OR 113 to the enabling inputs of CAE 99 and CAD 100. When you turn on the button 33 Set of address tens, while holding it to the counting input CAD 100 through the second element And 115 and

5, the third element OR 116 receives 1 Hz frequency pulses, and a sequential change of the code at the bit outputs of the CAD 100 is displayed on the digital indicator 26 in the form of a sequential change of digits. For

0 sets the desired number of units, similar to turning on the button 32, the set of address units sends an illog signal, 1 to the second input of the third element And 117, while the frequency pulses of 1 Hz pass through the element

5 3 OR 119 to the counting input CAE 99. The dialed number is recorded in RAM 112 by turning on the 34 VP button, and the signal log 1 passes through the first element OR 111 into the RAM cell with the address corresponding to the code generated on the CAE 99 bit outputs and GARDEN 100. Mistakenly dialed address number is erased on Q3Y 112 cells by button 36 SP, Similarly, in the group call mode in

5, random numbers are dialed and recorded in the RAM; 112, all numbers; called for communication of subscribers.

The composition of the dialed addresses is controlled by pressing the button 35 memory reading, while the signal log.1 comes

to the first input of the sixth element And 127, from the input of which the ASVI clock pulses 46 pass to element 3 OR 119 and then to the counting input of CAE 99. Decade pulses from the output of CAE 99 through the element OR 116 are fed to the counting input of CAD 100. At the same time, the log signal .1 from the output of the button 35 is fed through the element 3 OR 113 to the enable inputs CAE 99 and CAD 100 and, in addition, to the first input of the fourth element And 122, the second input of which is connected to the output of RAM 112. In the process of counting clock pulses when occurring at the output of RAM 112 signal log. 1. recorded in some address cell of RAM, this signal through the fourth element And 122 is fed to the second input of the OR element 124, and from its output to the input of the first D-flip-flop 102, which generates a signal log.1, stopping the operation of CAE 99 and CAD 100 in position with the address of the cell, the number of which corresponds to the address number recorded in RAM 112, thereby providing a visual reading of the number until the moment of the reset pulse of the first D-flip-flop 102 from ASVI 46 or the pulse replacing it.

The next time the button is pressed, the reading of the CAE 99 and CAD 100 memory continues the order count until the next cell is dialed with the recorded log.1, which causes the CAE 99 and CAD 100 to stop again and the next recorded address will be highlighted on the indicator. Erroneously dialed address number can be corrected by pressing button 36 Reset memory, changing the level of log.1 to log.O in the dialed cell of the address number.

In the outgoing call mode, the Speech button 30 is turned on, while the log.1 signal is fed to the control input of the third key 114, as a result of which the dialing mode log.1 signal at the enabling inputs of CAE 99 and GAD 100 is turned off, and the blocking of received address pulses by the first key 101 and, in addition, the signal log. 1 from the button 30, the Speech enters the control input of the fourth key 123, and puts it in the open state, and in the subsequent block of inclusion VK to enable inputs CAE 99 or CAD 100 through the fourth element 3 OR 113 with AG you ode ASVI enable pulse 46 enters the base slot address group; clock pulses (T4) from the output of ASI 46 through the fifth element AND 121 and the first input of the second element OR 119 are fed to the counting inputs of CAE 99 and GAD 100, as well as to the counting inputs of the second CAE 103 and GAD 104, while reading occurs The information recorded in RAM 112 and at its output are addressed by time-spaced address pulses according to the produced set, which pass through the 5th element OR 128 and the public key 128 to the FCS 46-1 and then to the input of the switch 19.

Upon reaching the number of the clock interval corresponding to the subscriber

0 to the number of this unit, the signal is log.1 from the output A of the comparators 105, 106 through the fifth key 129 to the second input of the OR element 128, and is emitted in the group of address pulses as the address of the calling subscriber.

In the mode of an outgoing call, received call addressing pulses having a temporary priority with respect to

0 to your own address or dialed addresses. Such pulses pass through the open first key 101 to the input of the first D-flip-flop 102, which stops the operation of the first CAE 99 and CAD 100, which ensures blocking the radiation of pulses typed in RAM 112 in the absence of their service priority, while simultaneously the key 129 blocks the radiation of its own address pulse generated at the output of comparators 105 and 106 in the cycle of generating the address group of pulses.

In the absence of reception of pulses with temporary priorities CAE 99 and CAD

5 100, all cells of RAM 112 are connected in turn, while the first address pulse from the output of RAM 112 is fed to the input of the D-flip-flop 130 and sets the output level 1, which through the 3rd input

0 element OR 120 is fed to the control input of key 101 and received in the outgoing call mode are not priority address pulses to the input. A ban of account CAE 99 does not pass, which allows emitting

5 dialed address code without receiving interference in the address group. In L; taking into account the temporary coincidence of the outgoing and incoming calls, blocking the key 101 eliminates the possibility of a mixed connection of the subscriber

0 when it is called by several subscribers simultaneously.

After the radiation of the address group of pulses in the case of establishing communication on the second input of the third, element 3 OR 133 and

5 next, the potential to receive the RAM 112 from the ARCH 49 is received at the input: Frequency channel fi: occupy, as a result of which during the VC operation, the address pulses recorded in the RAM 112 are not emitted, while the radiation of the own address pulse is blocked by the sixth key 126 connected at the control input with the output of the third element 3 OR 133. In the negotiating mode, the PDA in the power-on frames, the VK provides the reception of address calls in the previously described mode, while the indicator 26 displays the number of the caller for info mation about call presence and deciding on the transition to negotiate with another party,

If communication is not established due to the unavailability of the called subscriber (no radio line, busy talking, auto-registration), a Read Disable RAM 112 signal is generated for four VK enable frames. To do this, the address pulses from the output of RAM 112 are fed to the D-input of D-flip-flop 131 and set its output to level log.1, which is transmitted to the first input of element 3 OR 133 and then to the prohibition of reading RAM 112. Resetting the level of log.1 D -trigger 131 that removes the reading ban is provided by the signal of the divider counter to four 132 connected to the output of the AG ASVI 46. This eliminates the possibility of long-term blocking of the VC by calling the priority subscriber during its long busy period.

AWP K 49 (Fig. 15} works as follows,

In the initial state, the signal Channel fi is free (Fig. 166) comes from the output of receiver 12 to the first input of the first element And 137. If there are potentials log.1 at the outputs of the decoder 50 interference control (No interference), FDKG 53 (Ready for negotiations) and FDA 52 (there is an address call) there is a logical summation of these signals at the output of the GI element 139, while the resulting signal log.1 passes to the second input of the And element 137 and allows the passage of channel allocation signals (RFCs) received from the BA to the input of the serial register data 134, in the res In addition, if there is a pulse at its resolving input of the base interval of the channel frequency distribution (RFC) coming through a two-channel key 147 and clock pulses at the synchronization input, the received channel distribution signal (Fig. 166) is entered as a linear signal O into the corresponding bit d register 134. The information received in the register 134 is blocked by the interval pulse 34K, which is received from the ASVI 46 and the second input of the And 144 element, at the first input of which there is a signal log, G from the output of the first ZI 39 element, as a result which the signal e

arrives at the S-input of the RS-flip-flop 150 and sets the level of log.1 on its output, as a result of which the double key 147 disables the passage of clock and enable pulses to the corresponding inputs of the register 134 during the negotiations, signal Log. 1 from the output of the second RS-flip-flop 150 also acts on the PDA 52 to block the radiation of the address pulses during operation in the occupied frequency channel.

Information (FIG. 156) recorded in register 134 is read sequentially by multiplexer 135 in each frame BK.

5 switched by clock pulses, in the base interval of the frequency channel occupation (BCH), and after passing through the second inverter 143, a single pulse is generated at its output

0 position corresponding to the number of the occupied channel. This pulse is fed to the S input of the RS-flip-flop 141, the output signal of which stops the counter 136 triggered in the interval of the CHP. his exit

5, the code of the frequency channel arriving at the frequency synthesizer 14 is fixed, made, for example, by a.s. USSR No. 1506552, class N 03 L 7/18. setting the frequency of the radio channel for negotiations of this group

0 subscribers. When the next VC frame of the AVK signal is turned on through the OR element 138, it is fed to the reset input of the counter 136. at its output, the frequency code fn ° of the temporary channel is generated by the static switch 145 for this LRTS. The same channel is set in the general call mode for operation of the entire LRTS in the Everyone mode. In the AA of the subscriber of the outgoing call, the pulse from the output

0 of the second inverter 143 is fed to the first input of the third element And 146. At the same time, the second input of the third element And 146 receives the signal log. 1 of button 31 Set, as a result of this, the AA of the outgoing call 5 generates a frequency channel fi occupy, the radiation of which is removed by turning off the buttons 30 Speech and 31 Set.

0 Received in the incoming call mode at the time interval of the frequency response signal logL The frequency channel ft occupies through the second inverter 140 in the form of a log signal. O to the input of the fourth element And

5 149, to the second input of which the logic G receives from the inverter 143, while in the presence of a received information pulse, the frequency channel ft occupies the signal at the output of the fourth element And 149 is absent and the second O-trigger is blocked

150 saved. In the absence of signal reception, the frequency channel fi occupy the output of element And 149, a pulsed signal log.1 appears, which arrives at the R-stroke of the second RS-flip-flop 150. The decay of which is established at its output is the level of log.O, as a result of which there is a two-channel the key 147 is returned to its original position and the information is output from the register 134 in the RFC interval by incoming clock pulses, while the signal emission of the frequency channel fi is stopped. Similarly, a signal mute The frequency channel fi occupy occurs when the button 30 is turned off. The ALU 16 speech is on the calling or called party.

The synchronizer for receiving speech signals (CPC) 47 operates as follows (Fig. 16, 17).

In the initial state, register input

151 clock signals of the ASVI 46 receive clock pulses of the period Tr, while synchronously with the clock pulses of the ACG frequency 15 supplied to the clock input of the register 151, the clock pulse Tr moves sequentially in time from the first output bit to the final n-bit. At the moment of the pulse

Tr at the output of the middle discharge (n / 2), the first and second shapers of the protective time interval t3M made on the basis of the waiting multivibrator are started (Fig. 176). The value of the guard interval tan is set to be the same for all AA LRTS, while the time tan must be greater than the total value of the synchronization error (D sync) and the spatial delay of signal propagation between subscribers

TALK (D tnpocrp)

1i Atcnuxp + Atnpocrp.

(6)

The time interval Three Tr - g3i (Fig. 17a). in which emitted pulses of speech signals may be located is constant fixed for a given LRTS. In the reception mode, the second guard interval shaper 154 initially forms guard intervals synchronous with the first shaper of the occupied FZI 153 interval (Fig. 186, g). If the interval Tr of the received signals is delayed relative to the interval Tr formed by the register 151, the multiplexer 152 and the shaper 154 there are temporary coincidences of the pulse front of the guard interval and the front of the speech VIM pulses of the corresponding

the maximum amplitude of the speech signal (Fig. 18g, e). At the same time, at the output of element And 158, a log.1 pulse appears, allowing the operation of an asynchronous reversible counter 156, and at the output of the first RS-trigger 155, a log.1 signal appears, set by the front of the protective pulse and reset by the front of the received pulse received a single pulse is summed with the code provided by the asynchronous reversible counter 156, as a result of which the multiplexer 152 switches the input channel number one step upward and the GaI guard interval pulse receives a time shift Дc corresponding to the time duration of the clock pulses at the clock input of the register 151. If the voice pulse is repeated over the guard interval of the next interval Tp, the code of the reverse asynchronous counter 156 is again increased by one, which causes a second channel switching of the multiplexer 152 and, accordingly, an increase in the delay of the hei by two intervals Ati etc.

The described process is repeated until the coincidence of the speech pulses with the Hsi pulse, after which the reversible asynchronous counter 156 stores the steady-state output code, since pulses from the output of the And element 158 are not received at its resolving input. A similar shift of T. ei in the direction of decreasing the delay occurs with the coincidence of speech impulses with the fall of the guard interval. In this case, the pulse from the output of the receiver 12 sets the log.1 at the output of the second RS-flip-flop 157, and the decay of the pulse T3i after passing through the inverter 159 sets the signal log.O. at the output of the RS-flip-flop 157. This causes the unit to be subtracted from the number recorded in the asynchronous reversible counter 156 and the corresponding switching of the multiplexer 152. providing the required. Shift of the guard interval. The process of synchronizing the reception of speech signals occurs over several periods Tp, which is much less than the time of the Tel of auditory perception. This allows for group negotiations of subscribers with different distances from BA-1, while in the implementation example, the maximum estimated range of voice synchronization reaches

D 2R C

Tr - Hzn

 S.64 μs -20 km,

where C is the speed of light: R is the radius of the LRTS.

The described method and system for local radiotelephone communication of mobile subscribers increase the efficiency of information exchange in the process of functioning of industrial enterprises, institutions and medical complexes.

Due to the small dimensions of the base unit, and also due to its operation without maintenance personnel, the local radiotelephone communication system can be used in mobile groups of rescuers and medical workers in areas of catastrophes and natural disasters, as well as in mobile groups of motorists, law enforcement groups, etc. item, which increases the efficiency of the work.

Claims (5)

SUMMARY OF THE INVENTION 1. A method for local radiotelephone communication with broadband, code-separated signals, in which information signals are transmitted in non-overlapping frequency ranges, while a signal is generated at a base station located near the geometric center of the served territory, and the frequency channel fi is free, and on mobile subscriber upon reaching the communication, the devices receive a control broadband signal. The frequency channel fl is free, through which a free frequency channel is fixed, after A common broadband signal is transmitted to the free free frequency channel, which is common for all subscriber units, The frequency channel fi is busy, characterized in that, in order to reduce the power consumption of subscriber units and increase the number of functional modes, a single intra-system time is introduced on the served territory, and based on it in addition to the frequency channels, at least one broadband time channel common to the local radiotelephone system is introduced, for the operation of which one of the frequencies is used channels, while the time channel is used for receiving and transmitting overhead information, the duration of the inclusion frame of the time channel is set much shorter than the auditory perception of the presence of interruptions in the voice message, and the period between the frames of the inclusion of the time channel is set several times longer than the duration of the inclusion frame of the temporary channel, in this case, in each switching frame of the temporary channel at the base station, a code synchronization group of zero-moment signals is generated and emitted intra-system time, in the subscriber units, after receiving the code synchronization group, the hardware deviations of the phase of the clock intervals from the intra-system time are eliminated, after which, in the outgoing call mode, information pulses of communication signals of the form of the communication type General call, Group call are generated Individual call, and after communication mode signals, pulse address signals in which the number of the called subscriber corresponds to the number similar to those associated with the clocks of the system time 5 clock intervals, while the base station controls the absence of interference in the address group of pulsed signals, and then emit similarly interconnected clock cycles 0 information pulse signals with or without interference, in subscriber units that received an incoming call positional address pulse signal from the calling subscriber and a signal of the absence of interference from the base station, form a response pulse signal-receipt of the fact of the establishment of a radio connection to the subscriber-subscriber in the form of position-impulse signals correlated with ticks, which simultaneously transmit information about the readiness of the called subscriber for negotiations (Ready, Busy, Auto-registration), and then at the base station ntsii form position-pulse sig5 cash Single frequency channel fi, UEs incoming and outgoing calls are recorded in the memory number of the free channel frequency and emit a position-pulse signal frequency channel 0 fl occupy, which the base station receives, writes it to the memory and, upon analysis of the occupied frequency channels recorded in the memory, generates a signal of the next free channel number, 5 of the temporal channel inclusion proposed in the next frame for the radio connection of the next communicating subscribers, while the subscriber units that have not entered the radio connection according to the results 0 receiving and transmitting service signals in a temporary channel, turn off the power supply circuits of receivers and transmitters until the next frame for turning on a temporary channel, and subscriber units that have learned the radio connection based on the results of receiving and transmitting service signals, switch the frequency synthesizers to the frequencies of the provided channel and negotiate in it at the same time, for transmitting and receiving voice information, subscriber units form synchronous clock intervals interfaced with intra-system time, the duration of which I set t corresponding to the doubled upper frequency of the spectrum of the transmitted speech signals, during transmission, the amplitude of the analog speech signal is sampled at the initial moments of the clock intervals and discrete pulses are generated that are transmitted in real time with a time position modulated relative to the beginning of the mentioned clock intervals in proportion to the said sample, and upon reception, the inverse conversion of the real-time received discrete time - pulse (BUM) signal to a pulse-width one and yes in its original amplitude-modulated but generated proportionally countdown provisions VIM informtsionnyh clock pulses relative moments vutrisi- stemnogo single time. 2. The method according to p. 1, characterized in that, in order to ensure priority connection of senior subscribers of the position, as well as to eliminate failures while simultaneously addressing several groups of subscribers to establish address communications, the subscriber numbers of the devices are allocated in accordance with the service priority subscribers, and in each frame for switching on a temporary channel, a radio connection provides only a priority group of subscribers, established on the basis of the time priority of the generated address pulses, while subscriber units analyze the presence of address pulses in priority relative to the declared address clock intervals, devices that receive address pulses in the clock intervals with previous numbers in relation to the declared or intrinsic ones block the radiation of their transmitters in this time channel enable frame , not to prevent the radio connection of priority subscribers, and the subscriber units that have established the radio connection block in the next frame of the inclusion of the temporary channel the radiation of the address other overhead information except for the signal frequency channel fj clamp, also not preventing the priority radio connections with a lower priority subscribers. 3. The method according to p. 1, characterized in that the address connection of an arbitrary composition of a group of subscribers is made by a set of position-address pulse signals simultaneously on all numbers of the address clock intervals of the time channel in accordance with the addresses of the called subscriber and the subsequent emission of the dialed packet of 5 address pulses in the time channel, while at the base station the jamming control is disabled by the signal of the communication type Group call, and if there are applications from several groups of subscribers to establish group radio communication, the sequence of radio connection of groups is provided based on the time priority of the address clock interval corresponding to the senior number in the dialed Rupp abonen5 that. 4. A local radiotelephone communication system (L RTS) for receiving and transmitting by broadband signals, comprising a base unit and subscriber units, 0 and the basic unit contains an antenna and a transmitter and a receiver connected to it through an isolation element, connected to a frequency synthesizer and a logic device, subscriber units contain an antenna and a transmitter and a receiver connected to it through an isolation element, connected via a channel switching input to a synthesizer frequencies, while the information input of the receiver is connected to the earphone via a demodulator; in this case, the signal path of the transmitter, the input of the frequency setting code of the frequency synthesizer, and the output are ebnyh signal receiver connected to the subscriber logiche5 skim device, characterized in that, in order to increase efficiency of radio connections of subscribers by increasing the volume and rate intra-address information, Efficiency of using the frequency resource due to the dynamic selection of channels during spectral and territorial alignment with external RF systems, a base quartz 5th generator of the reference frequency of the intra-system time is introduced into the base apparatus, and a base time slot synthesizer is installed as part of the basic logic device (BLU) (BSVI ), synchro group shaper 0 (FSH), an interference analyzer, a basic frequency channel distributor (BRCH) and a switch blocking the frequency channels affected by interference, the output of the BCG of the keys to the BSVI signal input, the information output of the time interval of the clock group of which is connected to the FSH resolution path. information outputs of time intervals of the type of communication, address group and interference control are connected with the corresponding enable inputs of the interference analyzer, the information outputs of the time intervals of the distribution of frequency channels and occupation of the frequency channels are connected to the corresponding enable inputs of the BRCH, the information output of the time interval of the occupation of the frequency channels is connected to the enable input of the switch blocking the channels affected by interference, the output of which is connected to the second signal input BRCHK, while the output of the receiver is connected to the signal input of the interference analyzer, as well as to the first signal input of the BCCH, information outputs f The SG and BRCHK are connected to the corresponding information inputs of the interference analyzer, the output of which is connected to the start input of the transmitter, the subscriber unit includes a subscriber crystal oscillator of the internal frequency reference frequency and a power switch, while a deviation corrector is installed in the subscriber logic device (ALU) reference frequency, a subscriber synthesizer of time intervals (ACBI / I), a driver of gating pulses, a synchronizer for receiving speech signals (CPC), code synchronization subscriber time onizer (CS), frequency channel subscriber allocator (ARCHK), interference control signal decoder, communication type signal shaper-decoder (FDS), signal shaper-decoder (FDA), called subscriber readiness shader-decoder (FDKG), a piezoceramic call, a digital address indicator, a digital health indicator, a digital indicator of the called subscriber's readiness, a shaper of sound signals, and also a control switch, which includes buttons B turning on the microphone, activating the dialing mode, dialing the address units, dialing the address ten, entering the memory, reading the memory, resetting the memory, synchronization, general call, group call, auto registration, while the output of the KGK is connected to the signal input of the reference deviation corrector frequency, the output of which is connected to the signal input of ASVI. the information output of the time interval of the sync group is connected to the enable input of the code synchronizer of the subscriber time, the information output of the time interval of the type of communication is connected to the enable input of the FDVS, the information output of the time interval of the address group is connected to the enable input of the FDA, the information output of the time interval of the interference control is connected to the enable input decoder interference control, information output of the time interval of the receipt of readiness of the called subscriber it is connected with the FDKG enable input, the bus information output of the time intervals for allocating frequency channels and occupying the frequency channels is connected to the ARCHK bus enable input, the clock output is connected to the KS, ARCHK clock inputs, interference control decoder, FDVS, FDA, FDKG, information output period 5 adjustments of the reference frequency Tcorr is connected to the enable input of the reference frequency deviation corrector, the bus output of the audio frequencies is connected to the bus input of the frequency generator of the audio signals, the information output of the time interval of the asynchronous switching on of mode B K is connected to the input of the asynchronous switching on of the power switch and to the switching input of the base frequency channel ARCHK, the information output of the time interval of the synchronous operation mode of the VC is connected to the control input of the input signal switch eredatchika, output bus clock 0 intrasystem time and speech clock frequency are connected to the counting and clock inputs of the SRS, while the signal inputs of the KS, ARCHK, the noise control decoder, FDVS, FDA, FDKG, SRS are connected 5 to the output of the receiver, the control inputs of the FDVS of the communication type signals are connected to the buttons General call, Microphone on, Set of address units, Set of address tens, Enter into memory, 0 Read memory, Reset memory, General call, Group call, Auto registration, FDKG control input connected to buttons; Dialing; Microphone; Auto registration; button 5 The synchronization is connected to the manual input of the power switch, the bus input of the ARCH control is connected to the information outputs of the FDVS, FDA, and the noise control decoder 0 and FDKG, the information output of the CS is connected to the start input of the ASVI, the bus information output of the ASVI is connected to the bus signal input of the driver of the audio signals, bus digital 5, the FDAS information output is connected to the signal input of the digital address indicator, the bus information output of the interference control signal decoder is connected to the bus input of the digital health indicator, the FDKG bus information output is connected to the bus input of the digital readiness indicator, the signal outputs FDSV, FDAS, FDKG and ARCHK connected via the gate pulse generator to the input of the service signals of the switch of the input signals of the transmitter, the signal bus output of the ARCH frequency setting code is connected to the bus by the signal input of the subscriber frequency synthesizer frequency setup code, the frequency registration output of the ARCH frequency channel is connected to the input blocking radiation of the address signals of the PDAS, the fi-xed clock output of the transmitted CPC speech signals is connected to the clock input of the amplitude modulation converter during the time-pulse module (AM-VIM), the tunable clock output of the received CPC speech signals is connected to the clock input of the time converter pulse to amplitude modulation (VIM-AM), pulse-width the output signal of the received signals is connected to the input blocking of the output signal of the AM-VIM converter, while the current input of the radio path power switch is connected to the power source, and the output of the switch is connected to the power inputs of the frequency synthesizer, AM-VIM converter, transmitter input switch, transmitter, receiver, VIM-AM converter and audio frequency amplifier. 5. The system of claim 4, wherein that the base time slot synthesizer (BSVI) contains a twenty-two-bit counter and sequentially connected to the information outputs and the corresponding information inputs the base interval generator of the sync group, the base interval generator of the communication type, the base interval generator of the address group, the base interval generator of the interference control, the base generator the frequency channel allocation interval, the base channel interval time generator, connected to the outputs of the fourth , the fifth and sixth bits of the said counter, a clock and clock pulse generator, the clock output of which is connected to the clock inputs of the said time interval shapers, the output of the twenty second bit of the counter is connected to the resolving input of the former of the base interval of the time channel, the output of which is connected to the enable input of the driver of the time interval of the sync group, and the signal outputs of the said drivers are connected respectively to the FSH, the interference analyzer, BRCH and ommutatoru lock frequency channels affected by interference. 56. The system of claim 4, wherein the fact that the generator of the sync group (FSH) contains a multiplexer and a static generator of the code of the sync group connected to its signal inputs, when 0, the enable input of the multiplexer is connected to the signal output of the driver of the base interval of the sync group, the clock input is connected to the clock output of the driver of the clock and gate 5 pulses BSVI, and the signal output of the muliplexer is connected to the information input of the interference analyzer. 7. The system of claim 4, wherein the interference analyzer comprises a first 0 and second registers, first and second inverters, counter, comparator, first and second elements OR; the first, second, third, fourth and fifth elements AND, the first and second elements 3 OR, while the signal 5, the input of the first register is connected to the output of the receiver, and its enable input is connected to the shaper of the basic interval of the ASVI communication type, the first and fourth bit outputs of the first register are connected to the first and second inputs of the first OR element, the second bit output of the first register is connected to the second inverter, as well as with the input of the first element 3 OR, the third bit output of the first register 5 is connected to the first inverter, as well as the input of the second element And, the second input of which is connected to the output A 2 of the comparator, while the output of the first OR element is connected to the course of the second OR element, the outputs of the first inverter and the second inverter are connected respectively to the inputs of the first AND element, the output of which is connected to the input of the third and fourth AND elements, while to the second 5 to the input of the third element And the output A 2 of the comparator is connected, BXL d of which is connected to the output of the counter, the enable input of which is connected to the base interval shaper of the BSVI address group, and 0 signal input - with the output of the receiver, while the output of the third AND element is connected to the second input of the OR element, the output of the first OR element is connected to the first input of the second OR element, output 5 of which is connected to the input of the 1st bit of the second register, output A 2 of the comparator is connected to the second input of the fourth element I. the output of which is connected to the first input of the first element 3 OR. wherein the output of the first element 3 OR is connected to the input of the first bit of the second register, the control input of the parallel data loading of which is connected to the output of the base interval shaper of the BSVI address group, the control input of the serial output of the second register data is connected to the output of the base interval shaper of the BSVI, and the output of the second register is connected to the second input of the second element 3 OR, while the clock inputs of the first and second registers and counter are connected to the generator of clock intervals BSVI, inputs of the reset information of the first p an register, a counter and a second register are connected to the output of the driver of the base interval of the allocation of frequency channels of the ASVI, the output of the second element 3 OR is connected to the fifth element And, the second input of which is connected to the output of the gate pulses of the driver of the clock and gate pulses of the ASVI, and the output connected to the trigger input of the transmitter. 8. Pop system. 4, characterized in that the basic frequency channel distributor (BRCH) contains the first and second OR elements, a register, a multiplexer, an AND element, an inverter and an RS trigger, wherein one input of the OR element is connected to the output of the receiver, and the other stroke of this element connected to the output of the switch blocking affected by interference and frequency channels, the output of the first OR element is connected to the information input of the register, the permitting input of which is connected to the shaper of the time interval for occupying the frequency channels BSVI, and the clock input is connected n with the output of the clock pulse generator, the bit outputs of the register are connected to the corresponding inputs of the multiplexer, the resolving course of which is connected to the former of the base interval of the frequency channel allocation BSVI, and the output is connected to the first input of the second OR element, the output of which is connected to the first input of the first AND element, the second input of which is connected to the BSVI clock shaper, the output through the inverter is connected to the S-input of the RS-trigger, the R-input of which is connected to the base interval shaper to ntrol BSVI interference, signal output upm - of said latch is connected to another input of the second OR gate, the output of the first AND element is connected to a third input of the second element 3 OR interference analyzer, the output of which is connected to the trigger input of the transmitter. 9. The system according to claim 4, wherein the switch lock affected the channel interference contains a multiplexer and a statically controlled switch, the terminals of which are connected to the multiple inputs of the multiplexer, while the enable input of the multiplexer is connected to the output of the driver of the time interval for occupying the frequency channels of the BSVI, the clock input is with the driver of clock pulses, and the signal output is connected to the second 0 input of the first element OR frequency channel allocator. 10. Pop system, 4, characterized in that the subscriber time code synchronizer (CS) comprises a register, 5 comparator, static code switch, element And, voltage divider by two, a switch and a counter of half the duration of the clock interval, while enable register input connected to 0 to the generator of the basic interval of the ASVI sync group, the signal input of the register, the first input of the AND element, and the control input of the switch are connected to the output of the receiver, the bit outputs of the register are connected to the first bit inputs of the comparator, the other bit inputs of which are connected to the corresponding outputs of the static code switch , output A B of the comparator is connected to another 0 by the input of the And element and with the permitting input of the counter, the output of the And element is connected to the enable input of the voltage divider by two, the signal input of which is connected to the ACG, and the output is connected to the first 5 to the input of the switch, the other input of which is also connected to the ACG, and the output is connected to the signal input of the counter of half the duration of the clock interval, the output of which is connected to the reset input of the twenty-two double-digit counter of the ASVI. 11. The system according to claim 4, characterized in that the shaper-decoder of the address signals (FDA) contains the first and second counters of address units (CAE), 5 first and second address ten counters (SAD), first, second, third, fourth, fifth and sixth keys, first, second, third and fourth D-triggers, address unit comparator, address dea comparator, first, second , third, fourth, fifth and sixth elements I. first, second, third and fourth elements OR. RAM, first, second, third and fourth elements 3 OR, switch for entering the subscriber number of address units, switch for entering the subscriber number of address tens and a divider for four, while the clock input of the third D-trigger, counting input four divider, first input of the fourth OR element, the first input of the fourth element 3 OR, the clock input of the first D-flip-flop, the second input of the fifth element AND, the clock input of the second D-flip-flop and the enable input of the second SAE are connected to the output of the base interval driver of the ASVI address group, countable D - the inputs of the first SAE and the second SAE are connected to the output of the first element 3 OR, the first input of which through the fifth element And is connected to the output of the clock generator (PM) of the ASVI pulses, to which the second input of the sixth element And, the first input of which is connected with the output of the Read memory button, and the output is connected to the second input of the second 3 OR element, the third input of which is connected to the output of the third AND element, the first input of which is connected to the output of the Set of address units of ALU button and the second with the 1 Hz ASVI frequency output, which is connected to the first input of the second AND element, the second input of which is connected to the output of the Set of address ALU dozens button, and the output through the second input of the third OR element is connected to the counting input of the CAD, while the first input of the third OR element is connected to the output of the CAE, the input inputs CAE and CAD are connected to the output of the fourth element 3 OR, the second input of which is the sub-keys to the output of the third key, the signal input of which is connected to the output of the button; and the first input of the fourth AND element is connected to the output of the Read ALU memory button, while the output of the fourth And element is connected to the first input of the fifth OR element, and the second input is with the signal output of RAM, the input of the signals received by the receiver is connected to the signal the first input of the first key, the output of which through the fifth OR element is connected to the signal input of the first D-flip-flop, the output of which is connected to the C-path Stop CAE and to the control input of the fifth key, the signal input of which is connected to the output A of the comparators connected also with the second input of the first AND element, to the second input of which the output of the received signal receivers is connected, while the control input of the first key is connected to the output of the second OR element 3, the first input of which is connected to the output of the third 0-trigger, and the th is connected to the input of the third key, the output of the first element And is connected to the signal input of the second D-trigger. the output of which is connected to the second input of the fourth OR element, and also to the first the input of the first OR element connected to the Write to RAM input, while the output of the fourth AND element is connected to the R-input Reset CAE and CAD, in addition, the output of the second D-trigger is connected to the signal input of the second key, the output of which is connected to the ARCH and FZS ALU, while the control input of the second key is connected to the ALU Auto-registration button, which is also connected to the third input of the third element 3 OR, the bit outputs of the static switches for entering the subscriber number of address units and address dozens are connected to inputs B to mparators whose inputs A are connected to the bit outputs of the second SAE and the second CAD, respectively, and the bit outputs of the first SAE are connected to the X-input of the address of the RAM lines and to the bit decryptor of the digital indicator units, the bit outputs of the first CAD are connected to the Y-input addresses of RAM columns and to the decryptor of the digit of a dozen digital indicators, the signal output of the RAM is connected to the first input of the second OR element, the output of which is connected to the input of the generator through the fourth key, the control input of which is connected to the Speech button ALU pulses, in addition, the fourth key output is connected to the signal input of the third D-trigger and fourth D-trigger, the clock input of which is connected to the output of the divider counter by four, and the output is connected to the first input of the third OR element 3, the output of which is connected with S-input Disables reading RAM and with the control input of the sixth key, the output of which is connected to the second input of the second OR element, while the second input of the third OR element 3 is connected to the ARCHA ALU output, the RAM memory reset input is connected to the SP ALU button. 12. The system of claim 4, wherein that the subscriber frequency channel allocator (ARCHK) contains a n-bit register, an n-channel / .. ny multiplexer, a programmable counter, the first, second, third and fourth elements of And, the first and. the second OR element, the ZI element, the first and second inverters, the first and second RS flip-flops, a static switch of the VK frequency code, a two-channel key, while the first input of the first And element is connected to the output of the receiver, its second input is connected to the output of the ZI element, the first the input of which is connected to the output of the decoder of the noise control, the second to the output of the FDA, and the third to the output of the FDKG. the output of the first AND element is connected to the input of the serial input of the register data, its bit outputs are connected to the corresponding inputs of the multiplexer, the clock and enable inputs are connected to the ASVI clock and RF outputs via a two-channel key, the control input of which is connected to the output of the second RS trigger which is also connected to the input blocking the radiation of the addressable pulses of the PDA, the signal output of the multiplexer through the inverter is connected to the first RS-trigger, the fourth element And, as well as the third element And, and the inputs of the control The circuits are connected to the code outputs of the counter, whose account prohibition input is connected to the output of the first RS-trigger, the Reset input through the first element OR is connected to the AVC ASVI output and the ALU button 0V, the initial setup inputs are connected to a static frequency code switch VC, the enable input is connected to the output of the ASVI CCA, to which the resolution input of the multiplexer, the R-input of the first RS-trigger and the second input of the second element And are connected, the code outputs of the counter are connected to the control inputs of the frequency synthesizer, the input of the first element And The first inverter is connected to the first input of the fourth AND element, whose output through the second OR element is connected to the R-input of the second RS-trigger, while the second input of the second OR element is connected to the Speech ALU button, the second input of the third AND element is connected to the ALU dial button , and the output of the third element And is connected to the FCS ALU, 13. The system of claim 4, with the fact that the synchronizer for receiving speech time of pulsed (VIM) signals (SRS) contains an rt-bit register, a p-channel multiplexer, the first and second shapers guard interval, the first and second RS-flip-flops, asynchronous reversible counter, element And, the first and second inverters, while the bit outputs of the n-bit register are connected to the corresponding, taking into account the bias on l / 2 inputs of the p-channel multiplexer, the first shaper of the guard interval is connected to n / 2 times the output of the n-bit register, and the second shaper of the guard interval is connected to the output of the p-channel multiplexers, the bit outputs of the synchronous reversible counter are connected to the bit inputs of the multiplexer control, the summing input of which is connected to the output of the first RS-trigger, the subtraction path is connected with you; the second RS-trigger, the output of the second protective inverter former is connected to the first input of the And element, the R-input of the first RS-trigger and through the inverter with the S-input of the second RS-trigger, the second input of the And element, R-input the second RS-flip-flop and through the second inverter the S-input of the first RS-flip-flop is connected to the output of the receiver, the output of the element And is connected to the enable input of the reverse counter. 1831767 10.17, I 28 FIG. 2a ClaZia / ur lock Ј $$$, L. -; U / YU fRue. 2sG Fie. ) / l Si ./a ./5 lA Mtf il. I Ј Fie.Z SO R | A .. ) tg (1 uJb .... illl- .. i fs 4ft Fiz.Z VI FIG. 6 L. Fig. 7 UB / U / L W J rCO r4- "O (V) m FIG. thirteen