RU1820343C - Variable magnetic field representing unit - Google Patents

Abstract

The invention relates to magnetic measurements and can be used to create sources of varying magnetic fields. The device consists of a comparator 1, a single pulse generator 2, a counter 3, a memory 4, a register 5, a DAC in, an amplifier 7, a first inductor 8, a resistor 9, and also a reference voltage source 10, a summing amplifier 11, a second an inductance coil 12, a rectifier 13, a voltage slew rate limiting circuit 14. 3 ill.

Description

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The invention relates to magnetic measurements and can be used to create sources of varying magnetic fields.

An object of the invention is to expand functionality by providing a quasistatic magnetization reversal mode by maintaining a constant rate of change of induction in the magnetization reversible sample.

In FIG. 1 is a diagram of a device for reproducing a varying magnetic field; figure 2 - timing diagrams of the operation of the device; Fig. 3 is an example of a specific implementation of a voltage slew rate limiting circuit.

The device for reproducing a changing magnetic field (Fig. 1) contains a comparator 1, a single pulse generator 2, a counter 3, a memory 4, a register 5, a DAC 6 and an amplifier 7, a first inductor 8, a resistor 9, and a source 10 a reference voltage connected to a second input of the DAC. In addition, the device comprises a summing amplifier 11, a second inductor 12, a rectifier 13, and a voltage slew rate limiting circuit 14. Moreover, the second inductor 12 covers the neutral cross section of the magnetizable sample 15 and is connected to the input of the rectifier 13 by the output. The output of the latter is connected to the first input of the simulating amplifier 11, the output of which is connected to the first input of the voltage slew rate limiting circuit 14. The second input of the slew rate limiting circuit 14 is connected to the output of the DAC 6 and to the first input of the comparator 1, the output of the slew rate limiting circuit 14 is connected to the second input of the comparator 1 and the first input of the amplifier 7, the second input of which is connected to the connection point of the first coil 8 inductance and resistor 9. The second input of the summing amplifier 11 is connected to the output of the reference voltage source 10.

The device operates as follows.

From the generator 2 of single pulses, the signal U2 enters the input of the counter 3. From the output of the counter 3, the signal enters the memory 4. In the memory 4, a memory cell is read corresponding to the output code of the counter 3. The specified code combination of the signal is input to the register 5. The code signal is fed to the first input of the DAC b. DAC output

an analog signal Ue appears. The amplitude of the signal Ue depends on the output voltage of the reference voltage source 10. The output signal from the DAC 6 is fed to the input of the slew rate limiting circuit 14 and the first input of the comparator 1. The rate of change of the output voltage Ui4 of the slew rate limiting circuit 14 is determined by the expression

dUl4 C Vmax

dt ROT-C

where Npt - channel resistance of the field-effect transistor 16 (Fig.Z);

C is the capacitance of the feedback capacitor 17;

and 18max is the output voltage of the operational amplifier 18, which is usually ± 10 V. The channel resistance of the field-effect transistor 16 is determined by the output voltage Un of the summing amplifier 11, which, in turn, is determined by the sum of the voltage of the reference voltage source 10 and the voltage proportional to the rate of change of induction in the sample 15, taken from the output of the second inductor 12 and rectified by the rectifier 13. As a result, the value of dUn / dt

changes automatically so that the speed

changes in induction in the sample are constant.

As soon as the output voltage Ui4

slew rate limiting circuits 14

voltage is compared with the input Ue,

comparator 1 is triggered, which leads to

generation of the next impulse. To the entrances

amplifier 7 receives output voltage

slew rate limiting circuits 14

voltage and voltage from the resistor 9, which is proportional to the current generated in the first inductor 8 by the output voltage of the amplifier 7. Such an inclusion of the amplifier 7 is necessary to create a current value in the first inductor equal to that recorded in the memory 4.

An experimental study of the claimed device as part of an automatic device for recording the magnetic characteristics of ferromagnetic materials showed that it provides a quasistatic in comparison with a device of a similar purpose (prototype)

the magnetization reversal mode by ensuring a constant rate of change in the induction in the sample, thereby increasing the accuracy of registration of these characteristics, and in addition, by optimizing the magnetization reversal process, energy consumption is reduced.

Claims (1)

SUMMARY OF THE INVENTION A magnetic field reproducing device comprising a comparator, a single pulse generator, a counter, a memory device, a register, a digital-to-analog converter (DAC) and an amplifier, a first inductor, a resistor, and a reference voltage source, connected to the second input of the DAC, characterized in that, in order to expand the functionality by providing a quasistatic magnetization reversal mode, it is equipped with an additional sum by a amplifying amplifier, a second inductor inductively coupled to the first. fft ig P l 0 5 0 a rectifier and a slew rate limiting circuit, the second inductor connected to the rectifier input, the output of the latter connected to the first input of a summing amplifier, the output of which is connected to the first input of the slew rate limiting circuit, the second input of the slew rate limiting circuit -. nor connected to the output of the DAC and to the first input of the comparator, the output of the voltage slew rate limiting circuit is connected to the second input of the comparator and the first input of the amplifier, the second input of which is connected to the connection point of the first inductor and resistor, the second input of the summing amplifier is connected to the output reference voltage source. 1 vg figz L-er tfBx.1