RU1814873C - Device for analyzing heart beat rate - Google Patents

Abstract

The invention relates to medical equipment and can be used to monitor and diagnose a person’s condition for medical and sports purposes. The purpose of the invention is to enhance functionality by evaluating cardiac arrhythmias. The device for evaluating cardiac arrhythmias comprises a pulse generator 1, a constant potential source 2, a threshold adjuster 3, a threshold element 4, three formers 5, 7, 8 pulses, two delay elements 11, 12, two pulse counters 13, 14, and a comparison element 15 , three elements AND 9,10,22, five groups 16.17,18, 19,21 elements AND, shift register 6, arithmetic unit 20 and evaluation result registration unit 23. The device provides operational measurement of the arrhythmia coefficient of cardiac function in a wide range of its amplitude and time changes with the output of the evaluation result in digital form. 2 ill.

Description

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The invention relates to medical equipment and can be used in medicine, sports and everyday life for monitoring and diagnosing the state of the human body.

An object of the invention is to enhance functionality by evaluating cardiac arrhythmias.

In FIG. 1 shows a diagram of a device for evaluating cardiac arrhythmias; Fig. 2 is a timing chart illustrating the operation of the device.

The device comprises a clock pulse generator 1, a constant potential source 2, a threshold threshold 3, a threshold element 4 connected by a threshold value input via a threshold threshold 3 to an output of a constant potential source 2, and an information input with a device input, the first pulse shaper 5, connected by the input to the output of the threshold element 4, the shift register 6 (ring), connected by the shift input to the output of the shaper 5, the second pulse shaper 7, connected by the input to the fourth output of register 6, the third pulse shaper 8, connected by the input to the fourth output of register 6, the first element And 9, connected by the first input to the output of the generator 1, and the second input - with the first output of the register 6, the second element And 10, connected by the first input to the output of the generator 1, and the second input with the second output of the register 6, the first delay element 11 connected by the input to the output of the driver 8, the first pulse counter 13 connected by the counting input to the output of the And 9 element, and the zeroing input to the output of the delay element 12 second th pulse counter 14, counting input connected to the output of the AND 10, and the reset input - with the output of the delay element 12, a comparison element 15 connected bitwise with the inputs of the first counter outputs. 13, and the second - with the outputs of the counter 14, the first group of AND elements 16 connected by the second inputs bitwise with the outputs of the counter 13, and the first - with the first output of the comparison element 15, the second group of elements AND 17 connected by the first inputs with the first output of the comparison element 15, and the second inputs are bitwise outputs of the counter 14, the third group of elements And 18 connected by the first inputs to the third output of the comparison element 15. and the second inputs are bit by bit with the outputs of the counter 13. the fourth group of elements And 19 connected by the first inputs to the third the output of the comparison element 15, and the second inputs are bitwise with the outputs of the counter 14, the arithmetic unit 20 connected by the control input to the output of the delay element 11, the first information inputs are bitwise with the outputs of the groups of elements And 17 and 18, and the second information inputs are bit with the outputs of the groups of elements And 16 and 19, the fifth group of elements And 21 connected by the first inputs to the output

0 shaper 8, and the second inputs - bit with the outputs of the arithmetic unit 20, the third element And 22, connected by the first input to the output of the shaper 8, and the second input - with the second output of the comparison element 15, and the registration unit 23, connected by the input zero with the output of the shaper 7, the first information inputs - bitwise with the outputs of the group of elements And 21, and

0 second information input - with the output of the element And 22.

A device for evaluating cardiac arrhythmias works as follows.

In the initial state, generator 1 produces high potential pulses with a constant frequency f, at the output of potential source 2, a high constant potential Uo, at the output of threshold element 4, formers 5, 7 and 8, elements I 9 and

0 y, delay elements 11 and 12, counters 13 and 14, at the first and third outputs of the comparison element 15, at the outputs of the groups of elements And 16, 17, 18, 19 and 21, at the outputs of the arithmetic unit 20 and at the output of element And 22 low, zero potentials (the circuits for setting the device to its initial state are not shown in the drawing). Sensor 3 sets the threshold value Un U0, external sensor

A cardiac rhythm, such as a piezoelectric, is connected to the input of the device and fixed externally at a point on the surface of the patient with a sensed heart pulse. The first pulse from the output of the sensor at a time when the signal U (t) exceeds the preset threshold value Un, set by the sensor 3 and fed to the input of the threshold value of the threshold element 4. At its output, a high

0 potential. On the leading edge of the high potential from the output of the threshold element 4 at the output of the driver 5, a short pulse of high potential is generated, which changes the state of register 6

5

to the next one, i.e. a unit from the zero bit of register 6 is transferred to its first bit, at the first output of register 6, a high potential is established. In the presence of high potential at the first input of the element And 9, which comes from the first

register 6. element And 9 is open and the pulses from the output of the generator 1 are fed to the counting input of the counter 13. The second pulse of the heart rate through the threshold element 4 and the former 5, the first output of the register 6 is reset, and at its second output, a high potential is established, which opens element 10 and pulses from the output of the generator 1 go to the counting input of the counter 14. In the counter 13 a number is proportional to the duration of the high potential pulse at the first output of the register 6, and in the counter 14 is a number proportional to the duration the pulse of the high potential at the second output of the register 6. The contents of the counters 13 and 14 of N2 T2f are compared by the comparison element 15, and at the first output of the comparison element 15 is set to, a high potential at, and the remaining outputs are zeroed, at the second output - at and zeroed the remaining outputs appear, and at the third output of the comparison element 15, a high potential is established at zero potentials at its first and second outputs. With a high potential from the first output of the comparison element 15, groups of elements And 16 and 17 open, with a high potential from the second output of the element And 22 opens, and with a high potential from the third output of the element of comparison And groups 18 And 19 open. Control of the opening in pairs of groups of And 16 elements and 17 or 18 and 19 provides input to the first information inputs of the arithmetic block 20 of the number NI at and the number N2 at the outputs of counters 13 and 14, and to its second inputs the numbers N 2 and NI, respectively. The third pulse of the heart rate at the third output of the register 6 sets a high potential, and the second output is reset. The leading edge of the high potential at the third output of the register b at the output of the shaper 7 generates a short pulse of high potential, which arrives without delay at the input of zeroing of the result recording unit 23, and with a time delay through the delay element 11 to the control input of the arithmetic unit 20. By pulse the arithmetic control unit 20 determines the quotient N of dividing the divisible Ni (N2J by the divisor Na (Ni), i.e., N Mi / Na for or N N2 / Ni for, and since and, then N Ni / N23 Tif / T2f Ti / T2, but then at the outputs of the arithmetic block 20 the result The fourth pulse of the heart rhythm at the fourth output of register b establishes a high potential, and its third output is zeroed. The leading edge of the high potential from the fourth output of register 6 of the fermenter 8 generates a short pulse of high potential, which opens without delay in time And the group 21 or the element And 22, and with a time delay through the delay element 21, the counters 13 and 14 are reset, while in the block 23 of recording the result, either the contents of the outputs of the block 20 or the signal from ode comparing element 15 of the absence of heart arrhythmia. When on

5 the first and third outputs of the comparison element 15 are low, zero potentials, the groups of elements And 16, 17, 18 and 19 are closed, at the outputs of the arithmetic block 20 are zero potentials, and at the second output of the comparison element 15 is high potential, therefore, the output pulse shaper 8 through the element And 22 enters the second information input of the flea 23 registering the result, which absolutely meets the condition f 0, i.e. the presence of a high potential at the output of the And 22 element is a clear sign of the absence of cardiac arrhythmias. In the block 23 for recording the result of the assessment of cardiac arrhythmias for each group of four pulses of heart contractions, the relative rhythm coefficient of the heart is recorded and the lower it is, the higher the arrhythmias of the heart, the more dangerous the patient’s or sports state, whose heart rhythm is assessed. In the future, the device continues to work in a closed four-cycle cycle unlimited in time.

0 Increased operating speed is achieved due to automatic processing of information during synchronization by input signals, quantitative estimation of time intervals between clock cycles

5, heart rate, numerical values of the rhythm of the heart are presented by the result registration unit. The dynamics of the rhythm of heart activity is highly representative.

0 parameter of the state of the body and allows the doctor to assess the patient's condition to take qualified operational measures to normalize his condition.

The proposed device is realizable

5 on stand-alone power, in a limited overall weight and energy range, can be performed in an acceptable design with the desired design, portable, portable and even pocket-sized.

Claims (1)

The claims A device for analyzing a heart rhythm comprising a clock generator, a constant potential source, a threshold element connected by an information input to the device input, a first pulse generator, a first delay element, first and second AND elements connected by first inputs to the outputs of a pulse generator, a first pulse counter connected by a counting input to the output of the first And element, a second pulse counter connected by a counting input to the output of the second And element, an arithmetic block and a registration block The result is that, in order to expand the functionality by evaluating cardiac arrhythmias, a threshold threshold generator connected to the input to the output of the constant potential source and an output to the input of the threshold input of the threshold element, the output of which is connected to the input of the first pulse shaper, the ring-shift register connected to the shift input with the output of the first pulse shaper, the first output with the second input of the first AND element, and the second output with the second WTO input of the second element And, the second pulse former connected to the input of the third output of the circular shift register, and the output to the zeroing input of the result recording unit and through the first delay element to the control input of the arithmetic unit, the third pulse former connected to the fourth output of the circular shift register by the second delay element connected by an input to the output of the third driver pulses, and the output with the inputs of zeroing the first and second pulse counters, the comparison element connected bitwise with the first inputs to the outputs of the first pulse counter, and the second inputs with the outputs of the second pulse counter, the first group of AND elements connected by the first inputs with the first output of the comparison element, and second entrances - bit bottom with the outputs of the first pulse counter, the second group of AND elements connected by the first inputs to the first output of the comparison element, and the second inputs are bitwise with the outputs of the second pulse counter, the third group of elements And. connected by the first inputs to the third output of the comparison element, and the second inputs - bitwise with the outputs of the first pulse counter, the fourth group of elements And, connected by the first inputs to the third output of the comparison element, and the second inputs - bitwise with the outputs of the second pulse counter, and the outputs of the first and fourth groups of elements And bit connected to the second information inputs of the arithmetic block, and the outputs of the second and third groups of elements AND bitwise connected to the first information inputs of the arithmetic block, the fifth group of AND elements connected by the first inputs to the output of the second pulse shaper, the second inputs - bit by bit with the outputs of the arithmetic block, and the outputs - bit by bit with the first information inputs of the result recording unit, and the third element And, connected by the first input to the output of the second pulse shaper, and the output to the second information input registration block. 1814873 lfl-AAA- -AA-AA-l