RU1811007C - Device for statistical detection of discrete signals in communication channels with intersymbolic interference - Google Patents

Abstract

The invention relates to a device for the statistical detection of discrete signals in communication channels with intersymbol, interference, relates to telecommunication technology and can be used in transmission systems for monitoring and control, and is an improvement of the device according to the author. St. N 985958. The purpose of the invention is to increase the noise immunity of the device under the influence of non-stationary interference. The goal is achieved by introducing into the device an interference analyzer and corresponding connections, which allows taking into account the intensity and nature of non-stationary interference when adjusting the width of the erasure zone of the quality detector and the threshold level of the decision unit. 1 s P. f-ly, 2 ill.

Description

The invention relates to telecommunication technology and can be used in data transmission systems, monitoring and control, being an improvement of the known device according to the author. St. No. 985958.

The purpose of the invention is to increase the noise immunity of the device under the action of non-stationary interference.

In FIG. 1 shows a diagram of the proposed device; in FIG. 2 is a diagram of an interference analyzer.

A device for the statistical detection of discrete signals in communication channels with intersymbol interference comprises a continuous signal receiver 1, an adder 2, a decision unit 3, a signal regenerator 4, a hypothetical signal generator 5, an adder 6 modulo m, a multiplier 7 by noise residual coefficients, a summing unit 8, a delay unit 9, a quality detector 10, an erasure sequence generator 11, a match unit 12, a drive 13, a controllable clock 14, a write and read unit 15, an interference analyzer 16.

The output of the continuous signal receiver 1 is connected through a quality detector 10 to the second input of the eraser sequence generator 11 and through the m signal generator 4 with the first input of the hypothetical signal generator 5, the outputs of which are connected to the inputs of the adder 6 modulo m, the outputs of which through the multiplier 7 by noise factors residues are connected to the inputs of the summing unit 8, the output of which is connected to the second input of the adder 2, the first input of which through the delay unit 9 is connected to the output of the receiver 1 continuous with persecuted. The output of the decision block 3 is connected to the input of the write and read block 15, the first output of which is so00

ABOUT

about

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h

Yu

dinen with the second input of the shaper 5 hypothetical signals. The output of the controlled clock 14 is connected to the second input of the deciding unit 3, combined with the first input of the eraser sequence generator 11, the corresponding output of which is connected to the first input of the matching unit 12, the second input of which is connected to the second output of the write and read unit 15. The output of the coincidence unit 12 is connected to the first input of the drive 13, the second input of which is connected to the output of the quality detector and to the second input of the eraser sequence generator 11, the outputs of which are connected to the corresponding inputs of the adder 6 modulo m. The input of the interference analyzer 16 is connected to the output of the delay unit 9 and the output of the interference analyzer 16 is connected to the control input of the quality detector 10 and the decision block 3, the first input of which is connected to the output of the adder 8. The output of the drive 13 is connected to the input of the controlled clock gene S14. The input of the continuous signal receiver 1 is the input of the device, and the output of the decision block 3 is the output of the device.

The interference analyzer 16 includes a variable gain amplifier 17, a constant gain amplifier 18, a comparator 19, a key 20, an adder 21, a comparison unit 22.

The input of the variable gain amplifier 17 is connected to the input of the amplifier 18c by a constant gain and is the input of the interference analyzer 16. The output of the amplifier 17c with an adjustable gain is connected to the second inputs of the adder 21 and the comparison unit 22 and the input of the comparator 19, the output of which is connected to the second control input of the key 20.

The output of the amplifier 18 with a constant gain is connected to the first input of the key 20, the output of which is connected to the first input of the adder 21, the output of which is connected to the first input of the comparison unit 2, the output of which is connected to the second control input of the amplifier 17 with an adjustable gain and output of the interference analyzer 16.

The essence of the operation of the elements contained in the interference analyzer 16 is as follows.

The introduced elements implement the training procedure with aligned errors, which is described by the following mathematical expression:

V (n + 1) V (n) + / JnQ (n),

0

5

0

5

0

5

0

5

0

5

Y (n), VT (n) Y (n) P

where Q (n) {

-Y (n), VT (n) Y (n) n

and the convergence of which to a minimum the probability of error is proved.

The specified mathematical expression is implemented by the following technical devices:

Y (n + 1), V (n) - gain of the amplifier 17 with an adjustable gain, made according to the standard scheme:

RP - characterizes the step with which the given procedure is minimized to the probability of error and is realized, for example, by the gain of the amplifier 18 with a constant gain set manually or automatically depending on the nature of the non-stationary interference in the communication channel, and, for greater accuracy of the RP device “V (n);

Y (n) - samples of channel signals in, distorted by interference and received at the output of the receiver 1;

P is the threshold value of the comparator 19.

According to this algorithm, depending on the level of interference in the communication channel, a signal is generated at the output of the interference analyzer 16, the level of which is proportional to the current noise in the communication channel. This signal regulates the threshold of the decision block 3 and the quality detector 10, which increases the likelihood of these blocks making the right decision. Therefore, since the instantaneous interference is taken into account when making the decision, by character-by-character reception this increased the likelihood of making the right decision about the received character and its quality, thereby increasing the noise immunity of the whole device.

The comparator 19 is made according to the standard scheme and compares the information signal with a reference signal, the magnitude of which is selected once, for example, by supplying a reference information signal that is not distorted by interference. In this case, the reference signal is selected so that the control actions from the output of the comparison unit 22 are minimal.

The key 20 passes the signal from the output of the amplifier 18 with a constant gain either inverted or non-inverse, depending on the control action from the output of the comparator 19. Moreover, if the signal at the output of the comparator 19 is more than the reference, then the signal from the output of the amplifier 18c with a constant coefficient amplification through the key 20 passes inverted and vice versa. The technical implementation of key 20 is known. It can be made in the form of two combined keys on transistors with different types of conductivity. In this control action, one key is closed, the other is open, respectively, the keys transmit a signal with a different sign. The comparison unit 22 compares the signal V Y from the output of the variable gain amplifier 17 with the signal V Y ± p Y from the output of the adder 21 and generates a control signal proportional to the difference of the compared signals when the signals are not equal.

The device operates as follows.

The received oscillations from the output of the receiver 1 of continuous signals are supplied to the inputs of the quality detector 10 and the m-signal signal regenerator 4. From the output of the quality detector 10, the signals are recorded in the drive 13 and the shaper 11 of the erasure sequence, and from the output of the regenerator 4 m-ary signals in the shaper of the hypothetical signals 5. The write speed to the shapers 5 and 11, based on the shift registers of lengths n and bit, respectively dov is equal to speed

manipulation V.

From the output of the shaper 5 hypothetical signals, the signals are fed to the first group of L inputs of the adder 6 by

module m to another group from the input

of which the signals from the outputs of the shaper 11 of the erasure signals are received, the rate of change of states at the outputs of the shaper 5 is always equal, while the rate of change of states at the outputs of the shaper 11 depends on the number © of erasure signals recorded in the shaper 11 of the erasure drive 13. The signals from the output of drive 13 are control for a controlled clock 14, which changes the speed of states at the outputs of the former 11 of the erase sequence

the law Vm, that during the reception of one symbol at the output of the adder 6 modulo m allows you to get a set of combinations of characters taking into account possible errors in the channel memory interval, each of the adders received at the output of block 6

G

modulo m, the combination from the set of m possible passes through the multiplier 7 by

noise residual coefficients previously determined for a given channel. The multiplication result for each combination from the output of the multiplier 7 by the noise residual coefficients is added to the summing block 8, and then it is fed to the second (subtracting) input of the adder 2, the first (summing) input of which through the delay block 9 from the output

the receiver 1 of continuous signals receives the signal of the processed symbol. The same signal is fed to the input of interference analyzer 16, where it is fed to the inputs of multipliers 17, 18. From the output of amplifier 17 with adjustable gain, the V-amplified analog signal is fed to comparator 19, where the obtained product V (n) Y is compared ( o) with a threshold P whose level is set

when adjusting the device by supplying known signals to the device input without interference and adjusting the threshold П to the maximum probability of correct decision making by decision block 3. According to the results

of comparison, the comparator 19 controls the key 20, allowing the passage of the signal ± pn Y (p) from the output of the amplifier 18 with a constant gain / proportional to the gain of this

amplifier in the previous step. This

signal and signal from the output of the adder V (n)

Y (n) ± pn Y (n) arrive respectively

to the first and second inputs of the comparison unit 22, at the output of which a signal is generated with an increment proportional to the value ± pn Y (n), i.e. proportional to the change in the noise at the input of the device. The signal from the output of the comparison unit 22 controls the gain of the amplifier 17 with an adjustable gain. It adjusts the width of the erasure zone of the quality detector 10 and the threshold of the decision unit 3 at the control input. A set of symbol combinations, taking into account the possibility of errors in the channel memory interval at the input of decision block 3, causes the number of processed signal estimates to appear equal to m for each receiving symbol. In this case, the estimates are formed as follows:

Each of the combinations obtained at the output of the adder 6 modulo m from the set 0

m possible passes through the multiplier 7 by the coefficients of noise residues determined previously for this channel. The multiplication result for each combination from the output of adder b modulo m is added to the summing unit 8, and then it is fed to the subtracting input of the adder 2, to the summing input of which the signal of the processed symbol is received from the output of the continuous signal receiver 1 ..,.

The decision block 3 each time, based on a set of m estimates, receives information about the symbol, which is written using the write and read block 15 to the hypothetical signal generator 5 and is sent to one of the outputs of the match block 12 as a read signal, if any

the erase symbol in -FJ- bit of the eraser sequence generator 11. In this case, at the output of the matching unit 12, a signal appears which is fed to the subtracting input of the drive 13, which, in the absence of a signal by the summing input, will lead to a decrease in the content by one and, as a result, reduces the calculation speed, and if the signal is present, it will remain the same.

Thus, the proposed device improves noise immunity by increasing the likelihood of making the right decision by the decision unit 3 when the signal is subjected to unsteady interference, which is achieved by automatically adjusting the threshold of the decision unit 3 according to the above algorithm. By adjusting the width of the erasure zone in the quality detector 10, it is possible to increase the noise immunity under the influence of an interference complex, since due to the optimization of the width of the erasure zone of the quality detector 10, it is possible to form an erasure sequence that more accurately reflects real errors in the channel memory interval. This allows for more accurate estimates of the effect of interference on the symbol being processed and, ultimately, increases the likelihood of correct reception, since the estimates are taken into account by the decision unit when deciding on the received signal symbol.

Technical and economic efficiency from the implementation of the proposed device is to increase the noise immunity when acting in the communication channel along with intersymbol other interference, which is unsteady in nature by increasing the likelihood of making the right decision by the decision unit and the quality detector. By optimizing the width of the erasure zone of the latter, we achieve an increase in the probability of correct erasure and a decrease in the probability of undetected

errors, which increases the likelihood of the correct reception of information in general. By adjusting the threshold block threshold value depending on the intensity and nature of not only intersymbol, but also other non-stationary interference, it is also possible to increase the likelihood of making the right decision by the decision unit, and therefore the noise immunity of the device as a whole.

Claims (2)

1. Device for the statistical detection of discrete signals in communication channels with intersymbol interference in author St. No. 985958, with the exception of the fact that. in order to increase the noise immunity under the action of non-stationary interference, an interference analyzer is introduced, the output of which is connected to the control inputs of the decision unit and the quality detector, and the input of the interference analyzer is connected to the output of the delay unit. 2. The device according to p. 1, with the exception that the interference analyzer is made in in the form of an amplifier with an adjustable gain, gain, an amplifier with a constant gain, an adder, a comparator, a key and a comparison unit, the output of which is the output of an interference analyzer and connected to the first input of an amplifier with an adjustable gain, the second input of which is an input of an interference analyzer and combined with a constant gain amplifier input amplification, the output of which is connected to the first input of the switch, the output of which is connected to the first input of the adder, the output of which is connected to the first input of the comparison unit, the second input is connected to the output an amplifier with adjustable gain and combined with the second input of the comparison unit and through a comparator with the second input of the key. Fig.Z