RU1797116C - Modulo 3 arithmetic device - Google Patents

Abstract

The invention relates to computer technology and can be used in devices operating in a system of residual classes, as well as for the implementation of hardware control. The purpose of the invention is to expand the functionality of an arithmetic device modulo three by additionally implementing subtraction and multiplication modulo three operations. The arithmetic unit modulo three contains four elements NOT 1, 2, 3, 4, two elements EXCLUSIVE OR 5, 6, nine elements AND NOT 7 ... 15, two elements 16, 17, four elements of equivalence 18,19.20 , 21, interconnected functionally. The arithmetic device modulo three works as follows. Two-bit codes of the first X and second Y operands are supplied to the inputs of the device. At the outputs of the device, two-bit codes of the results of the operations of multiplication modulo three A (X Y) mod3, addition modulo three B (X + Y) mod3, subtraction modulo three C (X-Y) mod3 are simultaneously realized at the device outputs. 1 ill., 1 tab. 26 27 - “m J9 J 30 mn J / O VI O VI o

Description

The invention relates to computer technology and microelectronics and can be used in devices operating in a system of residual classes, as well as for the implementation of hardware control.

Known adder-multiplier modulo three, containing 30 elements AND, 2 elements OR, 2 elements ILL-NOT and 2 elements disambiguation.

A disadvantage of the device is its high structural complexity.

The closest technical solution in terms of functionality and design is an adder modulo three, containing 2 AND-NOT elements, 5 AND elements, 4 OR elements, 2 UNIVERSALITY elements and 2 UNAIGNIFICANCE elements.

A disadvantage of the device is limited functionality.

The purpose of the invention is to expand the functionality by implementing subtraction and multiplication modulo three.

The drawing shows a functional diagram of an arithmetic device modulo three.

The device contains four elements NOT 1 ... 4. two elements DISPARABILITY 5 and 6, nine elements AND-NOT 7 ... 15, two elements 16 and 17, four elements UNIVERSAL 18 ... 21, four inputs 22 .., 25 and six outputs 26 ... 31 .

The arithmetic device modulo three works as follows. The inputs xi and xa of the first operand X 2 - xi + xa, respectively, enter the inputs 22 and 23, and the yi and уа bits of the second operand Y 2 Y1 + Y2, respectively, enter the inputs 24 and 25. At the outputs 26 and 27, bits ai and 32 of the result of the operation of multiplication modulo three are formed respectively:

A 2 31 + 32 (X Y) mod3;

at outputs 28 and 29, respectively, bits bi and D2 of the result of the addition operation modulo three:

In 2 bi + D2 (X + Y) mod3;

at outputs 30 and 31, respectively, bits C1 and the result of the subtraction operation modulo three:

C 2 ci + C2 (X-Y) mod3. .

The operation of the device is explained in the table below.

Thus, the arithmetic device simultaneously performs the addition, subtraction and multiplication modulo three over two-bit binary operands.

Formula of the Invention Arithmetic unit modulo three. containing the first and second elements AND, the first and second elements AND NOT, the first

and the second element is UNIVERSALITY, the first element is UNIVERSALITY, from the first to the fourth inputs of the device, the first input of the first element И-Н Е connected to the first input of the device, the third input of which is connected to the first input of the second element AND-NOT, characterized in that , in order to expand functionality by implementing subtraction and multiplication operations

5 modulo three, the first to fourth elements of NOT are introduced into it, the third to ninth elements of NAND and the second, third and fourth elements of UNIVERSITY, the first input of the device being connected to

0 by the first input of the first element UNIVERSALITY and with the input of the first element NOT, the second input - with the second input of the first element UNIVERSAL, with the first input of the fourth element AND NOT

5 and with the input of the third element NOT, the third input - with the first input of the second element DISEQUALITY and the input of the second element NOT. the fourth input - with the second input of the second element UNIVERSALITY KNOW, the first input of the third element AND NOT and the input of the fourth element NOT. the output of which is connected to the second input of the first element AND NOT, the outputs of the first, second and third elements are NOT connected

5, respectively, with the second inputs of the fourth, third, and second AND-NOT elements, the outputs of the first and second elements, DISABILITY are connected to the first and second inputs of the fifth AND-NOT element, the output of which is connected to the first inputs of the first, second, third, and fourth elements , the output of the fourth AND-NOT element is connected to the first inputs of the sixth and nineth AND 5 NOT elements, the output of the third AND-NOT element is connected to the second input of the sixth AND-NOT element and the first input of the eighth element. AND NOT, the second input of which is connected first input and a seventh output of the second

0 AND-NOT elements, the output of the first AND-NOT element is connected to the second inputs of the seventh and ninth AND-NOT elements, the outputs of the sixth, seventh, eighth and ninth AND-NOT elements are connected respectively

5 with the second inputs of the first, second, third and fourth elements of UNIVERSALITY, the outputs of the sixth and seventh elements AND are NOT connected to the first and second inputs of the first element AND, the output of which is the first output p; see "house of a product modulo three devices, outputs the eighth and ninth AND elements are NOT connected to the first and second inputs of the second AND element, the output of which is the second output bit. modulo three devices, outputs of the first and second elements of the UNIVERSITY are respectively the second and first output bits of the sum modulo three devices, and the outputs of the third and fourth elements of the UNIVERSITY are respectively the first and second output bits of the difference modulo three devices.

The truth table of Boolean functions implemented by an arithmetic device modulo three