RU1772886C - Output voltage frequency stabilizer for generator - Google Patents

Abstract

Usage: in autonomous power supply systems, such as small hydroelectric power stations, wind farms. SUMMARY OF THE INVENTION: a device for stabilizing the frequency of the output voltage of a generator is equipped with null organs, a direct counter, an RS flip-flop, a counter for counting down, control channels, each ballast node, a clock, an AND gate, a logic gate more or less, by a logical element OR, NOT, frequency adjuster, maximum phase current adjuster, ballast load nodes in the form of controlled keys and resistive elements. 1 ill.

Description

The invention relates to the field of electrical engineering and can be applied in autonomous power supply systems using energy from renewable sources, such as small hydroelectric power stations, wind power plants operating under varying load conditions.

Known are devices for stabilizing the frequency of the output voltage of the generator, in which the total current of the useful and ballast loads is automatically stabilized using phase-corrected thyristor elements. But phase-controlled devices have such drawbacks as distortion of the current shape in the windings of the machine, as well as a significant level of harmonics of the output voltage.

To eliminate such distortions in the technique1, current-free switching of semiconductor switches is used, and the conductivity of the ballast load

controlled by parallel connection of the required number of resistive elements 1.

The closest to the proposed technical solution is the output voltage frequency stabilization device {2, in which the ballast load is divided into discrete resistive elements, the conductivity of each subsequent element is 2 times greater than the previous one, each resistive element is connected to one of the generator phases through a controlled key .

The prototype device contains zero organs that fix the moments of the transition of the output voltage of the generator through a zero value, a clock pulse generator (GTI), an RS-trigger, a countdown counter (SOS) that determine the relative frequency mismatch between the reference (determined GTI) and the output on (L

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voltage, as a result of which a certain number appears in the SOS proportional to the mismatch and the required conductivity of the ballast load. A digital correction link containing a reversible counter, a logic comparison circuit of more or less and two logical elements NAND, transfers the contents of the COC to the storage devices. The generated key control signals are fed to the key inputs, providing the required value of the conductivity of the ballast load, so that the frequency of the output voltage is stabilized near the reference frequency with a high degree of accuracy.

With a symmetrical distribution of the main (useful) load in phases, the generator almost always works in nominal mode. At the same time, for autonomous systems of power generation of small power (1-50 kW), the asymmetry mode of the payload connected to the phases of the generator created by separate single-phase consumers is very characteristic.

A disadvantage of the known device is the impossibility of providing a symmetrical loading of the generator, which leads to an increase in losses about the machine, overheating of its windings and asymmetry of the phase voltage amplitudes of the output voltages.

The purpose of the invention is to improve the quality of electricity, increase reliability and efficiency.

This goal is achieved in that in the device for stabilizing the output voltage of the generator, containing nodes of the ballast load of each phase of the generator, made in parallel-connected circuits of series-connected resistive element and a controlled key, zero-organs in an amount equal to the number of phases of the generator, stable frequency clock generator connected to the counting input of the direct counting counter and to the first input of the NAND gate, the second input connected to the direct output of RS-tr a gamma whose inverse input is connected to the first input of the logical element И И И Н, the S-input is connected to the output of the direct count counter, and the R-input is connected to the output of the first zero organ, with the R-input of the direct count counter and to the input records of the countdown counter, the output of the AND gate is connected to the subtracting input of the countdown counter, the preset inputs of which are connected to the plus bus of the power supply, and the reset input is connected to

the output of the logic element OR-N Е, the outputs of the bits of the countdown counter are connected to the first group of inputs of the logic element of comparison at a larger one, and the output of the loan is connected to the second input of the logic element OR NAND, control channels for each node of the ballast load, the outputs of which are connected to control circuits of controlled keys of its ballast load unit, additionally introduced current sensors for each phase of the generator, a maximum phase current master, a frequency master, the outputs of which are connected to the second input group s logical

5 comparison elements are more or less, the control channels of all nodes of the ballast infusion are identical, containing an integrator, a comparator, a reversible counter, two logical elements And, two

0 logic elements NOT, logical element OR, moreover, in each control channel the integrator input is connected to the analog input of the control channel by the ballast node, the output is connected

5 by the first input of the comparator, the second input of which is connected to the master of the maximum phase current, and the output is with the input of the first logic element NOT and the first input of the OR logic element, the second input of which is connected to the output, the number of second inputs is greater than the number of the first inputs of the logical comparison seed is larger or smaller, the output number at the first inputs is greater than the number at the second inputs of which

5 is connected to the input of the second logical element NOT and to the first input of the first logical element AND, connected by the second input to the output of the first logical element NOT, the third input with the first input of the second logical element I. the reset input of the integrator and the clock channel input of the control channel, and the output connected to the summing input

5 of a reverse counter, the subtracting input of which is connected to the output of the second logical element AND, and the outputs of the bits are connected to the outputs of the control channel of the ballast load node, the second input of the second logical element AND is connected to the output of the second logical element NOT, and the third input is connected to the output of the logical OR element, the analog inputs and the synchronization inputs of the control channels of each phase of the generator 5 are connected to the corresponding current sensor and a zero element.

The drawing shows a schematic diagram of a device.

A device for stabilizing the frequency of the output voltage of the generator 1 contains zero organs 2, p equal to the number of phases of the generator, a forward counter 3, RS-trigger 4, a counter counter 5, control channels 6, 7, 8 by each ballast load node , a clock generator 9, an AND-NOT logic 10, a more or less comparison logic 11, an OR-NOT 12 logic, a frequency knob 13, a phase 14 maximum current pickup, a control channel for each ballast load node are made identically in the form of two logical elements 15, 16, two logical elements AND 17,18, logical element OR 19, integrator 20, comparator 21, reverse counter 22.

A device for stabilizing the frequency of the output voltage of the generator also contains nodes of the ballast load of each phase of the generator, made in the form of parallel-connected circuits from a series-connected and controlled key 23,24,25 and a resistive element 26, 27, 28. The clock generator 9 is a stable frequency is connected to the counting input of the counter of direct counting 3 and to the first input of the NAND gate 10, the second input connected to the direct output of the RS-flip-flop 4, the inverse output of which is connected to the first input of the logic of the second element OR NOT 12, the S-input is connected to the output of the direct counting counter, and the R-input is connected to the output of the first zero-organ with the R-input of the direct counting counter and the recording input of the counting down counter 5, the output of the logic element AND-NOT 10 is connected to the subtracting input of the countdown counter 5, the preset inputs of which are connected to the plus bus of the power supply, and the reset input is connected to the output of the OR-NOT 12 element, the outputs of the bits of the countdown counter are connected to the first group of inputs of the logic element 11 comparisons more-less, and you One loan - to the second input of the logic element OR NOT 12. The control channels for each ballast load node 6, 7, 8 outputs are connected to the control circuits of the controlled keys of their ballast load node, the frequency control unit 13 outputs are connected to the second group of inputs of the logic element 11 more-less comparisons. In each control channel, the input of the integrator 20 is connected to the analog bypass of the control channel by the ballast node, the output is connected to the first input of the comparator 21, the second input of which is connected to the maximum current regulator of phase 14, and the output is connected to the input of the first logic element NOT 15 and the first the input of the logical element. OR 19, the second input of which is connected to the output; the number at the second inputs is greater than the number at the first inputs of the logic element 11 5 comparison is more or less; connected to the input of the second logical element NOT 16 and the first input of the first logical element AND 17, connected by the second input to the output, the first logical element NOT, the third input - to the first input of the second logical element AND 18, the reset input of the integrator 20 and the synchronizing input 5 control channel node ballast load, and the output connected to the summing input of the reverse counter 22, the subtractive input of which is connected to the output of the second logical element And 18,

0 and the outputs of the bits are to the outputs of the control channel of the ballast load node, the second input of the second logic element AND 18 is connected to the output of the second logic element NOT 16, and the third input to the output

5 of the OR 19 logic element, the analog inputs and the synchronization inputs of the control channels of the ballast load nodes of each phase of the generator are connected to the corresponding current sensor and zero voltage.

The device operates as follows.

The ballast load nodes of each phase of the generator have the same principle

5 act. The integrator 20 generates a signal proportional to the phase current of the generator. If this signal is less than the value specified by the maximum current setter 14, then the output voltage

0 of the comparator 21 does not affect the operation of the ballast load assembly. In this case, the state of the reverse counter 22 with the arrival of a pulse on the synchronized (the input of the control channel decreases by one, if the logic element of comparison by more or less 11 generates a signal, the number at the second inputs is greater than the number at the first inputs, or increases by one if a signal is generated number on

0 first inputs more than the number of second inputs, thereby changing the value of the ballast load. If the output signal of the integrator 20 exceeds the value specified by the setpoint maximum current 14, then

5, the comparator 21 generates a signal that, through the logical elements NOT 16 and AND 17, prohibits the operation of the reverse counter 22 at its summing input, i.e. increase in ballast load of this phase, further increase in ballast load can

occur only in those phases in which the current does not exceed the maximum current set by the master of the maximum value 14. In this case, there will come a moment when the frequency of the output voltage of the generator decreases to a value lower than the frequency set by the master 13 and the logic element of comparison 11 generates a signal, the number on the second inputs is greater than the number on the first inputs, which will allow the reverse counter 22 of the overloaded phase control channel to work on its subtractive input and with the arrival of a pulse at the clock input of this control channel, the state of the reverse counter 22 decreases by one, decreasing the ballast load of this phase.

Claims (1)

SUMMARY OF THE INVENTION A device for stabilizing the frequency of an output voltage of a generator, comprising nodes of the ballast load of each phase of the generator, made in the form of parallel-connected circuits of series-connected resistive element and a controlled key, zero-organs in an amount equal to the number of phases of the generator, i clock stable frequency connected to the counting input of the counter direct counting and to the first input of the logical element AND-NOT, the second input connected to the direct output of the RS-trigger, in the versioned output of which is connected to the first input of the OR-NOT logic element, the S-input is connected to the output of the forward counter, and the R-input is connected to the outputs of the first zero-organ, with the R-input of the forward counter and the write input of the reverse counter counting, the output of the AND gate is connected to the subtracting input of the countdown counter, the preset inputs of which are connected to the positive bus of the power supply, and the reset input is connected to the output of the OR gate, the outputs of the bits of the countdown counter are connected to the first group of inputs logical there is more or less comparison element, and the loan output is to the second input of the OR-NOT logic element, control channels for each ballast load node, the outputs of which are connected to circuits control keys of its ballast load node, characterized in that, in order to improve the quality of electric power, increase reliability and efficiency, current sensors of each phase of the generator, a setpoint generator and maximum phase current, a frequency setter, the outputs of which are connected to the second group of inputs of the logic element, are introduced more or less comparisons, the control channels of all nodes of the ballast-load are identical, containing an integrator, a comparator, a reversible counter, two logical elements I. two logical elements E, OR gate, moreover, in each control channel, the integrator input is connected to the analogous input of the control channel by the ballast node, the output is connected to the first input of the comparator, the vure input of which is connected to the maximum phase current master, and the output to the input of the first logical element NOT and the first the input of the logical element OR, the second input of which is connected to the output The number at the second inputs is greater than the number at the first inputs of the comparison logic element by more or less, the output The number at the first inputs is greater than the number at the second inputs of which is connected to the input of the second logic element NOT and the first input of the first logical element AND, connected by the second input to the output of the first logical element NOT. the third input - with the first input of the second logical element And, the reset input of the integrator and the synchronizing input of the control channel by ballast load miracle, and the output of the reversible counter connected to the summing input, the subtracting input of which is connected to the output of the second logical element And, and the outputs of the bits - to the outputs the control channel of the non-plastic load node, the second input of the second logical element AND is connected to the output of the second logical element NOT, and the third input is connected to the output of the OR logical element, analog the inputs and inputs of the synchronization channels for controlling the ballast load nodes of each phase of the generator are connected to the corresponding current sensor and null-element.