RU168373U1 - DEVICE FOR MEASURING FREQUENCY OF THREE-PHASE SINUSOIDAL VOLTAGE - Google Patents

Abstract

The utility model relates to the field of measuring electric energy parameters and can be used in devices for measuring the frequency of a three-phase alternating voltage or current, as well as in automation and relay protection devices. The device contains three differentiators, three quadrators, an adder, a square root extractor, a division unit, and a peak detector, and the phase inputs of the device through series-connected differentiators and quadrators are connected respectively to the inputs of the adder, the output of which is connected to the second input of the division unit through a square root extractor, the output of which is the output of the device, and the first input of the division unit is connected to the output of the peak detector, the input of which is connected to the first phase input of the device state. The technical result of the claimed utility model is to increase the accuracy of frequency measurement. 1 ill.

Description

The utility model relates to the field of measuring electric energy parameters and can be used in devices for measuring the frequency of a three-phase alternating voltage or current, as well as in automation and relay protection devices.

A known frequency meter [USSR Author's Certificate No. 458774 IPC ⁸ G01R 23/00, publ. 01/30/1975], containing a series-connected amplifier-limiter, a metering capacitor and a diode splitter formed by two diodes, a differential DC amplifier with a parallel RC circuit in the feedback circuit and an indicator.

The disadvantage of this device is that the time constant of the RC circuit of the low-pass filter is selected large enough based on the specified value of the ripple of the output voltage at the lowest operating frequency. Therefore, in a wide range of changes in the frequency of the input signal, the device has low speed.

The closest analogue to the proposed utility model is a device for measuring the frequency of a three-phase sinusoidal voltage [USSR Author's Certificate No. 577469 IPC ⁸ G01R 23/02, publ. 10.25.1977], containing a three-input comparator, a decoder, a key block, a peak detector, a module isolation unit, a differentiator and a dividing device connected in series, the comparator inputs being connected to the inputs of the three-phase voltage phases and three controlled inputs of the key block, and the comparator outputs through a decoder connected to the control input of the key block, the combined output of which is connected to the input of the differentiator, while the input of the peak detector is connected to the first input of the three-input comparator, and the output d peak detector is connected to the first input of the dividing device, the output of which is connected to the input of the module selection unit.

This technical solution is selected as a prototype.

The disadvantage of this device is the low accuracy of the frequency measurement due to significant ripple of the output voltage due to the nonlinearity of the processed sections of the three-phase voltage sinusoids.

The technical result of the claimed utility model is to increase the accuracy of frequency measurement.

The specified technical result is achieved by the fact that in the known device for measuring the frequency of a three-phase sinusoidal voltage containing a differentiator, a peak detector and a division unit, the first input of which is connected to the output of the peak detector, the input of which is connected to the first phase input of the device, two differentiators are additionally introduced, three a quadrator, an adder and a square root extraction unit, the first, second and third phase inputs of the device through series-connected differentiators and quadra Orae connected respectively to the first, second and third inputs of the adder, the output of which via the unit square root extraction connected to a second input of divider whose output is an output device.

Significant differences of the proposed device is the introduction of an additional two differentiators, three quadrators, an adder, a square root extraction unit and the organization of new connections between the elements of the device. The combination of elements and the relationships between them ensures the achievement of a positive effect - improving the accuracy of frequency measurement.

The essence of the utility model is illustrated in the figure (Fig.), Which shows the functional diagram of the Converter.

The device (Fig.) Contains three differentiators 1, 2, 3, three quadrants 4, 5, 6, an adder 7, a square root extraction unit 8, a division unit 9 and a peak detector 10, the first A, second B and third C phase inputs devices through series-connected differentiators 1, 2, 3 and squares 4, 5, 6 are connected respectively to the first, second and third inputs of the adder 7, the output of which through the square root extraction unit 8 is connected to the second input of the division unit 9, the output of which is the output of the device , and the first input of the division unit 9 connected to the output of the peak detector 10, the input of which is connected to the first A phase input of the device.

The converter operates as follows. The inputs of the differentiators 1, 2, 3 respectively receive voltages u _A , u _B , u _C , proportional to the phase voltage of the network:

u _A = U _fm sinωt; u _B = U _fm sin (ωt-120 °); u _C = U _фm sin (ωt + 120 °),

where U _fm is the amplitude of the measured phase voltage.

The inputs of the quadrators 4, 5, 6 respectively receive the voltage u ₁ , u ₂ , u ₃ obtained after differentiation by differentiators 1, 2, 3:

;

;

;

,

;

,

wherein _Rin U _m - amplitude of the measured input voltage;

ω is the circular frequency of the input voltage;

R is the resistance of the differentiator resistor;

C is the capacitance of the differentiator capacitor.

At the outputs of the quadrants 4, 5, 6, the voltages u ₄ , u ₅ , u _{6 are formed} , obtained after squaring the voltages u ₁ , u ₂ , u ₃ :

After summing the voltages u ₄ , u ₅ , u ₆ in the adder 7 and the transformations, we have the voltage u ₇ :

After the operation of extracting the square root in the unit for extracting the square root 8, a voltage u ₈ is generated at its output:

.

.

The peak detector 10 extracts the amplitude U _{fm of the} phase voltage u _A and supplies the first input of the division unit 9, the second input of which supplies voltage from the output of the square root extraction unit 8.

As a result, at the output of the division unit 9 and the entire device, a voltage U _{o is formed} , proportional to the frequency of the three-phase sinusoidal voltage:

,

,

- коэффициент пропорциональности.Where

- coefficient of proportionality.

In the practical implementation of the proposed device, the differentiators 1, 2, 3 can be performed according to the well-known scheme on an operational amplifier (op amp) with a timing RC circuit. As quadrants 4, 5, 6, you can use the signal multipliers on the K525PSZ chip, combining its information inputs x and y. The adder 7 is a conventional adder on an operational amplifier. As a block extracting the square root of 8, you can use the op amp circuit by including the quad in its negative feedback circuit. The division unit 9 can be performed on the OS, by including a voltage multiplier in the circuit of its negative feedback. Peak detector 10 can be performed according to one of the known schemes (A. J. Peyton, V. Walsh. Analog electronics on operational amplifiers. - M.: BINOM, 1994, p. 292, fig. 11.17; p. 304, fig. 11.29 )

Claims (1)

A device for measuring the frequency of a three-phase sinusoidal voltage containing a differentiator, a peak detector and a division unit, the first input of which is connected to the output of the peak detector, the input of which is connected to the first phase input of the device, characterized in that it is additionally introduced two differentiators, three quadrators, an adder and a square root extraction unit, the first, second and third phase inputs of the device through series-connected differentiators and quadrants connected respectively to the first the second, second and third inputs of the adder, the output of which through the square root extraction unit is connected to the second input of the division unit, the output of which is the output of the device.

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