RU1412461C - Digital-raster indicator - Google Patents

Abstract

The invention relates to radio technology. The purpose of the invention is to increase performance. contains a matrix memory block 3, a DAC 5, a video control unit 6, a sweep generator 9, an address switch 10, and a coordinate converter 11. An input buffer memory block 1, a read-only memory block 2, an output register 4, a feedback register 7, and a pulse distributor 8 are introduced. The device’s operation is based on the functioning of two independent operating cycles: recording the information received from the radar in block 3 and the continuous output of its contents to the screen of block 6. The movement of the radar antenna from the azimuth angle + 90 ° through 0 ° to - -270 and vice versa, Depending on which floor the antenna scans, the radar produces a sign, which arrives at the 1st control input of block 2. It can equal, for example, to the left half frame logical. Oh, for the right one - 1. Clock signal ;, taken out by P. flC, goes to the sync moves. distributor 8 and converter 11. Distributor 8 generates pulse sequences ,, These nals control the reception of information in block 1, register 4 and register 7 and sequential access to block 3 of each .functional cycle through switch 10. l - The th access is intended to display the contents of 3 on the screen of block 6 through regis; tp 4 and DAC 5, for writing 1 information to block 3. The cycle of entering information from block 3 to the screen of block 6 is carried out, in rows or columns, the address of the first is generated by the generator 9 synchronously with the clock cycles I of access. 3 ill. SL

Description

The invention relates to radio engineering and can be used in the design of information display devices, for example, aircraft display devices MeTeo and o63Oj Hbcs radar stations,

An object of the invention is to improve performance.

Figure 1 presents a structural 10 electrical circuit of the device; figure 2 - voltage diagrams at the outputs of the pulse distributor} on - state table of the memory block. 5

The digital raster indicator contains (see Fig. 1) an input buffer memory unit 1, a read-only memory unit 2, a matrix memory unit 3, output register A, a digital-to-analog converter (DAC) 5, a video monitoring unit 6, a register feedback 7 distributor 8 pulses generator 9 switch W dresa and converter II coordinates,

The operation of the device is based on the operation of two independent working CYCLES of recording (updating) information received from the radar in the matrix. memory block 3 and non-repetitive 30 output of its contents to the screen. cathode ray tube (CRT) of the video control unit 6, Further. The principle of operation of the indicator is explained to move the radar antenna 35 from the azimuth angle +90 through -270 and vice versa, i.e. the course of the antenna from right to left and from left to right. Thus, each 1 scan frame consists of two half-frames - the left 40 and the right, respectively. Depending on the MOQTH of the channel in which half-frame the antenna scans. The radar produces a sign that arrives at the first control input of the block of memory constant 45 2. It can be equal, for example, to logical O for the left half-frame, 1 for the right half-frame,

The clock signals generated by the radar during the scanning of distance vectors to separate sections, the number of which during the scanning of each vector is equal to the number of sections into which its length is divided, which is determined by the required accuracy jt of the radar and its range, are fed to the sync inputs 8 pulse distributor and I1 coordinate converter. The distributor 8 generates at its outputs a sequence of pulses according to the timing diagram shown in FIG. 2. These signals control the reception of information in the input buffer memory unit, the output register 4, and the feedback register 7 and arrange access to the matrix memory unit 3 of each functional cycle in turn through the address switch 10. The first access is intended for output of the contents of the matrix memory block 3 to the screen of the video control unit 6 through the output register 4 and DAC 5, the second access is for recording information in the matrix memory block 3 of the read-only memory block 2. The cycle of writing information to the matrix block memory 3 is implemented as follows.

Codes B1 of the signals of individual sections of the distance vectors are received in the radar in the input buffer memory unit 1. At the same time, at the output of the coordinate converter 11, the addresses of these sections are formed in rectangular coordinates along the X and Y axes, which are calculated by the converter 11 for each section by the time they are received, according to the azimuth angle codes received from the radar at its information input at the beginning range vector sweeps. During the course of the sweep of the next section of the range vector according to Fig. 2, the pulse distributor 8 generates control signals, under the influence of which processing is performed. record S is a matrix block of memory 3 of the information received and recorded in the input buffer block of memory 1 at the end of the sweep of the preceding section of the vector. For this, first from the cell of the matrix block of memory 3 at the address coming from the output of the converter П coordinates and calculated by him during the sweep of the previous part of the range vector, information is read into the feedback register 7, which was entered in the given cell earlier at a different azimuth value. This information, in addition to the video signal code, contains a code for the sign of the course of the antenna, at which it was formed in the radar and recorded. memory module 3. The read-only memory unit 2 forms at its output from two available on its

the inputs of the video signal codes received q of the input buffer memory unit 1 and feedback register 7, as well as the current sign of the direction of movement of the radar antenna information) according to the following algorithm: if there are signs of the course of the antenna, current and read from the matrix memory block 3 in the feedback register 7 are the same, i.e. both units or both are zero, then of the two video signal codes selects a higher priority one, for example, having the maximum value. Otherwise, the value of the video signal code from the input buffer memory block I is sent to the output of the read-only memory block 2, i.e. . newly arrived (see Fig. 3, an example of the algorithm for extracting a maximum: sideide signal with two gradation levels - O and 1. In the real case, there can be four or more video gradation levels).

When the next second access is presented, the information from the output of the read-only memory block is loaded into the selected cell of the matrix memory block 3. Together with the video signal code 8, the cell of the matrix memory block 3 also contains the current sign of the radar antenna course. the recording code of the video signal of the range vector portion ends and the pulse distributor 8 stops issuing signals to the input buffer memory unit I, output register A and feedback register 7 and waits for a pulse to start a new ka. With its arrival, the described process is repeated. Thus, during the course of the half-frame, the information of all the vectors of the scanning ranges of the radar antenna in transformable rectangular coordinates will be entered into the matrix memory block 3. Moreover, when recording in the same cell of the matrix block of memory 3 information of groups of sections of video signals from one or several neighboring range vectors arising from the transformation of coordinate systems, a higher priority signal from this group will be selected and written to this cell. During the next half-frame, the information in the cells of the matrix memory block 3 is replaced.

10

5 J5 20 25

J246i

The cycle of inputting information from the matrix memory block 3 to the screen of the video control unit 6 is carried out in rows or columns, the address of which is generated by the scanning generator 9 in synchronization with the first access presentation clocks according to Fig. 2, generated continuously by the pulse distributor 8. In order to continuously supply a video signal to the DAC 5, read from the matrix memory block 3, it is pre-recorded in the output register 4 by the signals from the output of the pulse distributor 8. The output of the DAC 5 controls the rocket channel of the video control unit 6, and the analog output of the generator sweep signal. 9 - CRT beam deflection.

Thus, an image similar to the image on the indicator screen, a circular view within the azimuthal angle of +90 - 0 ° - + 270 °, is formed on the rectangular CRT raster of the video control unit 6.

Thus, in the proposed indicator, the reception of information from the radar is carried out continuously, as the antenna is scanned, with its direct recording in the matrix memory block 3, regardless of the operation of the scan generator 9.

thirty

5

0

5

0

5

Claims (1)

The claims A digital raster indicator containing a matrix memory unit, an address switch, a coordinate converter, a video control unit, a scan generator and a digital-to-analog converter, the output of which is connected to the information input as a control unit, the input of the deflecting system of which is connected to the analog output of the scan signal of the scan generator, the information the input of the coordinate converter is the input of the indicator azimuth code, and the output is connected to the first information input of the address switch, the second info whose ramp input is connected to the digital address output of the sweep generator, and the output to the address input of the matrix memory block, characterized in that, in order to improve performance, an input buffer memory block, a constant memory block, an output register, a reverse register are introduced communication and a pulse distributor, the sync input of which is connected to the sync input of the coordinate transducer and is the input of the indicator clock signal, the output of the control signal for reading the information of the pulse distributor is connected to the input of the memory buffer unit, the read signal output is from the sync input to the output register, signal output is fixed ripu-. the codes are connected to the sync input of the feedback register, the output of the write control signal to the corresponding input of the memory matrix block, and the output of the address control signal to the control input of the address switch and to the sync input of the generator 1A12A6I6 scan, the first control input of the constant block is the input of the signal of the direction of movement of the indicator antenna, the second control input : combined with the output of the input buffer memory block, the third control input is connected to the output of the feedback register, and the output is connected to the information input of the matrix memory block, the output of which is connected to the I1 pho lation inputs of the register. zi and output register; the output of which is swan. With the input of the digital-to-analog converter, the informational input of the input buffer memory unit is the input of the indicator video signal code L. Fat