PL78415B2 - - Google Patents

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Publication number
PL78415B2
PL78415B2 PL15783672A PL15783672A PL78415B2 PL 78415 B2 PL78415 B2 PL 78415B2 PL 15783672 A PL15783672 A PL 15783672A PL 15783672 A PL15783672 A PL 15783672A PL 78415 B2 PL78415 B2 PL 78415B2
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PL
Poland
Prior art keywords
power supply
thyristor
overvoltage
relay
receiver
Prior art date
Application number
PL15783672A
Other languages
Polish (pl)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to PL15783672A priority Critical patent/PL78415B2/pl
Publication of PL78415B2 publication Critical patent/PL78415B2/pl

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  • Protection Of Static Devices (AREA)
  • Emergency Protection Circuit Devices (AREA)

Description

Pierwszenstwo: Zgloszenie ogloszono: 01.06.1973 Opis patentowy opublikowano: 10.06.1975 78415 KI. 21a\76 MKP H02N9/04 ~\ \ Twórcywynalazku: Wieslaw Balicki, Andrzej Habrat, Andrzej Mencel, Kazimierz Sicinski Uprawniony z patentu tymczasowego: Glówny Instytut Górnictwa, Katowice (Polska) Uklad zabezpieczajacy elementy scalone przed uszkodzeniem wskutek przepiec pochodzacych z zasilacza Przedmiotem wynalazku jest uklad zabezpieczajacy elementy scalone odbiorników przed uszkodzeniem wskutek przepiec pochodzacych z zasilacza.Istniejace metody zabezpieczenia elementów scalonych polegaja na odlaczeniu napiecia stabilizowanego od ukladu, lub na odlaczeniu zasilacza od sieci. Oba te sposoby powoduja przepiecie na glównej szynie zasilajacej uklad, które niszczy elementy scalone.Powyzsza wade usuwa uklad bedacy przedmiotem wynalazku.Istota wynalazku polega na tym, ze pomiedzy zasilaczem a odbiornikiem jest zalaczony tyrystor z polaczo¬ nym do niego równolegle przekaznikiem, przy czym dodatni zacisk tyrystora jest zalaczony do dodatniego bieguna zasilacza a jego drugi ujemny zacisk jest uziemiony.Na rysunku jest przedstawiony schemat blokowy ukladu, który ilustruje zasadnicza istote zabezpieczenia wedlug wynalazku.Pomiedzy zasilaczem 1 a odbiornikiem 2 jest zalaczony tyrystor T z polaczonym do niego równolegle przekaznikiem P. Dodatni zacisk tyrystora T jest zalaczony do dodatniego bieguna zasilacza 1 a jego drugi ujemny zacisk jest uziemiony. Do zasilajacego przewodu 3 i tranzystora T jest zalaczony inicjujacy element 4 Przy zasilaniu elementów scalonych, napiecie w przewodzie 3 powinno wynosic +5 V (± 20 mV).W warunkach awaryjnych na przyklad w przypadku spalenia sie tranzystorów mcy w stabilizatorze, lub wskutek przepiecia, napiecie w przewodzie 3 moze przekroczyc poziom 7,5 V dopuszczalny dla elementów scalonych. Wówczas dziala element inicjujacy 4, który powoduje zaplon tyrystora T i natychmiastowe uziemie¬ nie glównego przewodu.3. Po zaplonie tyrystora T napiecie na wyjsciu zasilacza zmniejsza sie do poziomu okolo 0,5 V. W tych warunkach przekaznik P powoduje odlaczenie zasilacza 1 od strony sieci stykami P, które mogq byc umieszczone badz po pierwotnej badz po wtórnej stronie transformatora Tr.Zaleta takiego rozwiazania jest to, ze w wypadku awarii lub przepiecia glówny przewód 3 zasilajacy czesto kilkaset elementów scalonych jest natychmiast uziemiony, a dopiero pózniej nastepuje odlaczenie ukladu od sieci.2 78 415 Zwarcie przewodu 1 do masy nastepuje po czasie okolo 30 mikrosekund od zaistnienia awarii, gdyz taka jest szybkosc tyrystora T. Przekaznik 2 odlacza natomiast uklad juz z opóznieniem rzedu milisekund. W ukla¬ dzie takim zasilacz 1 musi miec zabezpieczenie przetezeniowe. PL PLPriority: Application announced: June 1, 1973 Patent description was published: June 10, 1975 78415 KI. 21a \ 76 MKP H02N9 / 04 ~ \ \ Creators of the invention: Wieslaw Balicki, Andrzej Habrat, Andrzej Mencel, Kazimierz Sicinski Authorized by the provisional patent: Central Mining Institute, Katowice (Poland) System protecting integrated elements against damage due to overflows from the power supply The subject of the invention is a system protecting the integrated elements of the receivers against damage due to overvoltage coming from the power supply. The existing methods of protecting the integrated elements consist in disconnecting the stabilized voltage from the system or disconnecting the power supply from the mains. Both of these methods cause an overvoltage on the main bus supplying the system, which destroys the integrated elements. The above drawback is eliminated by the circuit being the subject of the invention. The essence of the invention consists in the fact that between the power supply and the receiver there is a thyristor connected with a relay connected in parallel, the positive The thyristor terminal is connected to the positive pole of the power supply and its other negative terminal is grounded. The block diagram of the circuit, which illustrates the essential essence of the protection according to the invention, is shown in the figure. Between the power supply 1 and the receiver 2 there is a thyristor T with a relay P connected in parallel to it. The positive terminal of thyristor T is connected to the positive pole of the power supply 1 and its other negative terminal is grounded. The initiating element 4 is attached to the supply line 3 and the transistor T. When supplying the integrated components, the voltage in the conductor 3 should be +5 V (± 20 mV). In emergency conditions, for example, in the event of burning of the transistors in the stabilizer, or due to overvoltage, the voltage in wire 3 may exceed the level of 7.5 V permitted for integrated components. The initiating element 4 then operates, igniting the thyristor T and immediately grounding the main conductor.3. After ignition of thyristor T, the voltage at the output of the power supply decreases to the level of about 0.5 V. Under these conditions, the P relay disconnects the power supply 1 from the mains with P contacts, which can be located either on the primary or secondary side of the transformer Tr. The advantage of this solution it is that in the event of a failure or overvoltage, the main power supply cable 3, often several hundred integrated elements, is immediately grounded, and only then the system is disconnected from the network.2 78 415 The cable 1 is shorted to ground after about 30 microseconds from the failure occurrence, as such is the speed of thyristor T. Relay 2 disconnects the circuit with a delay of the order of milliseconds. In such a system, the power supply 1 must have an overload protection. PL PL

Claims (1)

1. Zastrzezen i e patentowe Uklad zabezpieczajacy elementy scalone odbiornika przed uszkodzeniem wskutek przepiec pochodzacych z zasilacza, znamienny tym, ze pomiedzy zasilaczem (1) a odbiornikiem (2) jest zalaczony tyrystor (T) z pola¬ czonym równolegle do niego przekaznikiem (P) przy czym dodatni zacisk tyrystora (T) jest zalaczory 66 dodatniego bieguna zasilacza (1) a jego drugi, ujemny zacisk jest uziemiony. Prac. Poligraf. UP PRL. zam. 2454/75 naklad 120+18 Cena 10zl PL PL1. Patent claim A system protecting the integrated elements of the receiver against damage due to overvoltage from the power supply, characterized in that between the power supply (1) and the receiver (2) there is a thyristor (T) with a relay (P) connected in parallel to it. the positive terminal of the thyristor (T) is the attachment 66 of the positive pole of the power supply (1) and its other, negative terminal is grounded. Wash. Typographer. UP PRL. residing 2454/75 edition 120 + 18 Price 10 PLN PL PL
PL15783672A 1972-09-20 1972-09-20 PL78415B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PL15783672A PL78415B2 (en) 1972-09-20 1972-09-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PL15783672A PL78415B2 (en) 1972-09-20 1972-09-20

Publications (1)

Publication Number Publication Date
PL78415B2 true PL78415B2 (en) 1975-06-30

Family

ID=19959998

Family Applications (1)

Application Number Title Priority Date Filing Date
PL15783672A PL78415B2 (en) 1972-09-20 1972-09-20

Country Status (1)

Country Link
PL (1) PL78415B2 (en)

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