PL3757769T3 - Systemy i sposoby pomijania nieistotnych operacji macierzowych - Google Patents
Systemy i sposoby pomijania nieistotnych operacji macierzowychInfo
- Publication number
- PL3757769T3 PL3757769T3 PL20164786.4T PL20164786T PL3757769T3 PL 3757769 T3 PL3757769 T3 PL 3757769T3 PL 20164786 T PL20164786 T PL 20164786T PL 3757769 T3 PL3757769 T3 PL 3757769T3
- Authority
- PL
- Poland
- Prior art keywords
- inconsequential
- skip
- systems
- methods
- matrix operations
- Prior art date
Links
- 239000011159 matrix material Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30069—Instruction skipping instructions, e.g. SKIP
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30083—Power or thermal control instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/453,724 US11403097B2 (en) | 2019-06-26 | 2019-06-26 | Systems and methods to skip inconsequential matrix operations |
Publications (1)
Publication Number | Publication Date |
---|---|
PL3757769T3 true PL3757769T3 (pl) | 2023-01-23 |
Family
ID=69953820
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PL20164786.4T PL3757769T3 (pl) | 2019-06-26 | 2020-03-23 | Systemy i sposoby pomijania nieistotnych operacji macierzowych |
Country Status (5)
Country | Link |
---|---|
US (2) | US11403097B2 (pl) |
EP (2) | EP3757769B1 (pl) |
CN (1) | CN112148251A (pl) |
ES (1) | ES2934513T3 (pl) |
PL (1) | PL3757769T3 (pl) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11481223B2 (en) * | 2019-08-08 | 2022-10-25 | Blaize, Inc. | Reducing operations of sum-of-multiply-accumulate (SOMAC) instructions |
US11288076B2 (en) * | 2019-09-13 | 2022-03-29 | Flex Logix Technologies, Inc. | IC including logic tile, having reconfigurable MAC pipeline, and reconfigurable memory |
US11307860B1 (en) | 2019-11-22 | 2022-04-19 | Blaize, Inc. | Iterating group sum of multiple accumulate operations |
KR102477533B1 (ko) * | 2020-08-06 | 2022-12-15 | 한국과학기술원 | 희소성 데이터를 이용하는 연산 장치 및 그것의 동작 방법 |
TWI847030B (zh) | 2021-05-05 | 2024-07-01 | 創鑫智慧股份有限公司 | 矩陣乘法器及其操作方法 |
CN113591031A (zh) * | 2021-09-30 | 2021-11-02 | 沐曦科技(北京)有限公司 | 低功耗矩阵运算方法及装置 |
CN116048456A (zh) * | 2023-04-03 | 2023-05-02 | 摩尔线程智能科技(北京)有限责任公司 | 矩阵乘法器、矩阵相乘的方法以及计算设备 |
Family Cites Families (53)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5247632A (en) | 1989-01-23 | 1993-09-21 | Eastman Kodak Company | Virtual memory management arrangement for addressing multi-dimensional arrays in a digital data processing system |
US5475822A (en) | 1993-11-15 | 1995-12-12 | Motorola, Inc. | Data processing system for resuming instruction execution after an interrupt and method therefor |
US7301541B2 (en) | 1995-08-16 | 2007-11-27 | Microunity Systems Engineering, Inc. | Programmable processor and method with wide operations |
US5892962A (en) | 1996-11-12 | 1999-04-06 | Lucent Technologies Inc. | FPGA-based processor |
US6161219A (en) | 1997-07-03 | 2000-12-12 | The University Of Iowa Research Foundation | System and method for providing checkpointing with precompile directives and supporting software to produce checkpoints, independent of environment constraints |
US6282634B1 (en) | 1998-05-27 | 2001-08-28 | Arm Limited | Apparatus and method for processing data having a mixed vector/scalar register file |
FR2787233B1 (fr) | 1998-12-11 | 2001-02-16 | St Microelectronics Sa | Procede pour verifier l'integrite des circuits de decodage d'une memoire |
US6901422B1 (en) | 2001-03-21 | 2005-05-31 | Apple Computer, Inc. | Matrix multiplication in a vector processing system |
US7725521B2 (en) | 2001-10-29 | 2010-05-25 | Intel Corporation | Method and apparatus for computing matrix transformations |
US6877020B1 (en) | 2001-12-31 | 2005-04-05 | Apple Computer, Inc. | Method and apparatus for matrix transposition |
US7003542B2 (en) | 2002-01-02 | 2006-02-21 | Intel Corporation | Apparatus and method for inverting a 4×4 matrix |
US7209939B2 (en) | 2002-07-11 | 2007-04-24 | Sun Microsystems, Inc. | Precision improvement method for the Strassen/Winograd matrix multiplication method |
US6944747B2 (en) | 2002-12-09 | 2005-09-13 | Gemtech Systems, Llc | Apparatus and method for matrix data processing |
US7873812B1 (en) | 2004-04-05 | 2011-01-18 | Tibet MIMAR | Method and system for efficient matrix multiplication in a SIMD processor architecture |
US20060190517A1 (en) | 2005-02-02 | 2006-08-24 | Guerrero Miguel A | Techniques for transposition of a matrix arranged in a memory as multiple items per word |
US20070186210A1 (en) | 2006-02-06 | 2007-08-09 | Via Technologies, Inc. | Instruction set encoding in a dual-mode computer processing environment |
US7792895B1 (en) | 2006-06-16 | 2010-09-07 | Nvidia Corporation | Efficient matrix multiplication on a parallel processing device |
US7912889B1 (en) | 2006-06-16 | 2011-03-22 | Nvidia Corporation | Mapping the threads of a CTA to the elements of a tile for efficient matrix multiplication |
US20080071851A1 (en) | 2006-09-20 | 2008-03-20 | Ronen Zohar | Instruction and logic for performing a dot-product operation |
US8122078B2 (en) | 2006-10-06 | 2012-02-21 | Calos Fund, LLC | Processor with enhanced combined-arithmetic capability |
US7797362B2 (en) | 2007-02-23 | 2010-09-14 | Texas Instruments Incorporated | Parallel architecture for matrix transposition |
US8392487B1 (en) | 2007-03-29 | 2013-03-05 | Compass Electro-Optical Systems Ltd | Programmable matrix processor |
US8028015B2 (en) | 2007-08-10 | 2011-09-27 | Inside Contactless S.A. | Method and system for large number multiplication |
US8923510B2 (en) | 2007-12-28 | 2014-12-30 | Intel Corporation | Method and apparatus for efficiently implementing the advanced encryption standard |
US8533251B2 (en) | 2008-05-23 | 2013-09-10 | International Business Machines Corporation | Optimized corner turns for local storage and bandwidth reduction |
US8060730B2 (en) | 2008-05-30 | 2011-11-15 | Freescale Semiconductor, Inc. | Selective MISR data accumulation during exception processing |
US8250130B2 (en) | 2008-05-30 | 2012-08-21 | International Business Machines Corporation | Reducing bandwidth requirements for matrix multiplication |
US20100180100A1 (en) | 2009-01-13 | 2010-07-15 | Mavrix Technology, Inc. | Matrix microprocessor and method of operation |
US8539201B2 (en) | 2009-11-04 | 2013-09-17 | International Business Machines Corporation | Transposing array data on SIMD multi-core processor architectures |
US8984043B2 (en) | 2009-12-23 | 2015-03-17 | Intel Corporation | Multiplying and adding matrices |
US8478969B2 (en) | 2010-09-24 | 2013-07-02 | Intel Corporation | Performing a multiply-multiply-accumulate instruction |
US20120113133A1 (en) | 2010-11-04 | 2012-05-10 | Shpigelblat Shai | System, device, and method for multiplying multi-dimensional data arrays |
US9727471B2 (en) | 2010-11-29 | 2017-08-08 | Intel Corporation | Method and apparatus for stream buffer management instructions |
US20120254588A1 (en) | 2011-04-01 | 2012-10-04 | Jesus Corbal San Adrian | Systems, apparatuses, and methods for blending two source operands into a single destination using a writemask |
ES2943248T3 (es) | 2011-04-01 | 2023-06-12 | Intel Corp | Formato de instrucción compatible con vectores y ejecución del mismo |
US9503741B2 (en) | 2011-06-08 | 2016-11-22 | Vixs Systems, Inc. | Video decoder with multi-format vector processor and methods for use therewith |
US20140149480A1 (en) | 2012-11-28 | 2014-05-29 | Nvidia Corporation | System, method, and computer program product for transposing a matrix |
US9442723B2 (en) | 2012-12-28 | 2016-09-13 | Intel Corporation | Method and apparatus for integral image computation instructions |
US9552205B2 (en) * | 2013-09-27 | 2017-01-24 | Intel Corporation | Vector indexed memory access plus arithmetic and/or logical operation processors, methods, systems, and instructions |
US9286216B2 (en) | 2014-01-16 | 2016-03-15 | Carnegie Mellon University | 3DIC memory chips including computational logic-in-memory for performing accelerated data processing |
CN106325811B (zh) | 2014-07-02 | 2020-02-07 | 上海兆芯集成电路有限公司 | 微处理器中的方法 |
US20160179523A1 (en) | 2014-12-23 | 2016-06-23 | Intel Corporation | Apparatus and method for vector broadcast and xorand logical instruction |
US10535114B2 (en) | 2015-08-18 | 2020-01-14 | Nvidia Corporation | Controlling multi-pass rendering sequences in a cache tiling architecture |
US10146535B2 (en) | 2016-10-20 | 2018-12-04 | Intel Corporatoin | Systems, apparatuses, and methods for chained fused multiply add |
CN116009814A (zh) * | 2016-10-20 | 2023-04-25 | 英特尔公司 | 用于经融合的乘加的系统、装置和方法 |
CN112506568A (zh) | 2016-12-31 | 2021-03-16 | 英特尔公司 | 用于异构计算的系统、方法和装置 |
US10795836B2 (en) | 2017-04-17 | 2020-10-06 | Microsoft Technology Licensing, Llc | Data processing performance enhancement for neural networks using a virtualized data iterator |
US11275996B2 (en) * | 2017-06-21 | 2022-03-15 | Arm Ltd. | Systems and devices for formatting neural network parameters |
US10503507B2 (en) | 2017-08-31 | 2019-12-10 | Nvidia Corporation | Inline data inspection for workload simplification |
US20190079903A1 (en) * | 2017-09-14 | 2019-03-14 | Qualcomm Incorporated | Providing matrix multiplication using vector registers in processor-based devices |
US11669326B2 (en) | 2017-12-29 | 2023-06-06 | Intel Corporation | Systems, methods, and apparatuses for dot product operations |
US10572568B2 (en) * | 2018-03-28 | 2020-02-25 | Intel Corporation | Accelerator for sparse-dense matrix multiplication |
US10901492B1 (en) * | 2019-03-29 | 2021-01-26 | Amazon Technologies, Inc. | Power reduction in processor pipeline by detecting zeros |
-
2019
- 2019-06-26 US US16/453,724 patent/US11403097B2/en active Active
-
2020
- 2020-03-23 ES ES20164786T patent/ES2934513T3/es active Active
- 2020-03-23 PL PL20164786.4T patent/PL3757769T3/pl unknown
- 2020-03-23 EP EP20164786.4A patent/EP3757769B1/en active Active
- 2020-03-23 EP EP22189935.4A patent/EP4105778A1/en active Pending
- 2020-03-26 CN CN202010224156.3A patent/CN112148251A/zh active Pending
-
2022
- 2022-08-01 US US17/878,427 patent/US11900114B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11403097B2 (en) | 2022-08-02 |
ES2934513T3 (es) | 2023-02-22 |
EP3757769B1 (en) | 2022-10-05 |
US20230070579A1 (en) | 2023-03-09 |
US11900114B2 (en) | 2024-02-13 |
CN112148251A (zh) | 2020-12-29 |
US20200409705A1 (en) | 2020-12-31 |
EP3757769A1 (en) | 2020-12-30 |
EP4105778A1 (en) | 2022-12-21 |
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