PL362631A1 - Sposób sterowania wyświetlaniem ramek sygnału wideo - Google Patents
Sposób sterowania wyświetlaniem ramek sygnału wideoInfo
- Publication number
- PL362631A1 PL362631A1 PL03362631A PL36263103A PL362631A1 PL 362631 A1 PL362631 A1 PL 362631A1 PL 03362631 A PL03362631 A PL 03362631A PL 36263103 A PL36263103 A PL 36263103A PL 362631 A1 PL362631 A1 PL 362631A1
- Authority
- PL
- Poland
- Prior art keywords
- video display
- display signal
- signal frames
- controlling video
- controlling
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
- Transforming Electric Information Into Light Information (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PL03362631A PL362631A1 (pl) | 2003-10-06 | 2003-10-06 | Sposób sterowania wyświetlaniem ramek sygnału wideo |
US10/711,581 US7310120B2 (en) | 2003-10-06 | 2004-09-27 | Receiver of analogue video signal having means for analogue video signal conversion and method for control of display of video frames |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PL03362631A PL362631A1 (pl) | 2003-10-06 | 2003-10-06 | Sposób sterowania wyświetlaniem ramek sygnału wideo |
Publications (1)
Publication Number | Publication Date |
---|---|
PL362631A1 true PL362631A1 (pl) | 2005-04-18 |
Family
ID=34386887
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PL03362631A PL362631A1 (pl) | 2003-10-06 | 2003-10-06 | Sposób sterowania wyświetlaniem ramek sygnału wideo |
Country Status (2)
Country | Link |
---|---|
US (1) | US7310120B2 (pl) |
PL (1) | PL362631A1 (pl) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4346591B2 (ja) * | 2005-08-25 | 2009-10-21 | 株式会社東芝 | 映像処理装置、映像処理方法およびプログラム |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5321500A (en) * | 1991-08-07 | 1994-06-14 | Sony Electronics Inc. | Non-real-time film scanning system |
US5519449A (en) * | 1991-09-17 | 1996-05-21 | Hitachi, Ltd. | Image composing and displaying method and apparatus for displaying a composite image of video signals and computer graphics |
US5276513A (en) * | 1992-06-10 | 1994-01-04 | Rca Thomson Licensing Corporation | Implementation architecture for performing hierarchical motion analysis of video images in real time |
US5557337A (en) * | 1994-02-18 | 1996-09-17 | Hitachi America, Ltd. | Automatic television signal detector to differentiate NTSC signals from HDJV/AJV signals |
US5446496A (en) | 1994-03-31 | 1995-08-29 | Hewlett-Packard Company | Frame rate conversion with asynchronous pixel clocks |
US6654539B1 (en) * | 1998-10-26 | 2003-11-25 | Sony Corporation | Trick playback of digital video data |
US6470051B1 (en) * | 1999-01-25 | 2002-10-22 | International Business Machines Corporation | MPEG video decoder with integrated scaling and display functions |
US6442206B1 (en) * | 1999-01-25 | 2002-08-27 | International Business Machines Corporation | Anti-flicker logic for MPEG video decoder with integrated scaling and display functions |
US6519283B1 (en) * | 1999-01-25 | 2003-02-11 | International Business Machines Corporation | Integrated video processing system having multiple video sources and implementing picture-in-picture with on-screen display graphics |
US6658056B1 (en) * | 1999-03-30 | 2003-12-02 | Sony Corporation | Digital video decoding, buffering and frame-rate converting method and apparatus |
US6756987B2 (en) * | 2001-04-20 | 2004-06-29 | Hewlett-Packard Development Company, L.P. | Method and apparatus for interleaving read and write accesses to a frame buffer |
-
2003
- 2003-10-06 PL PL03362631A patent/PL362631A1/pl not_active Application Discontinuation
-
2004
- 2004-09-27 US US10/711,581 patent/US7310120B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US7310120B2 (en) | 2007-12-18 |
US20050073611A1 (en) | 2005-04-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
REFS | Decisions on refusal to grant patents (taken after the publication of the particulars of the applications) |