PL284738A1 - Output interface circuit arrangement for an electronic equipment - Google Patents
Output interface circuit arrangement for an electronic equipmentInfo
- Publication number
- PL284738A1 PL284738A1 PL28473890A PL28473890A PL284738A1 PL 284738 A1 PL284738 A1 PL 284738A1 PL 28473890 A PL28473890 A PL 28473890A PL 28473890 A PL28473890 A PL 28473890A PL 284738 A1 PL284738 A1 PL 284738A1
- Authority
- PL
- Poland
- Prior art keywords
- electronic equipment
- output interface
- interface circuit
- circuit arrangement
- arrangement
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/30—Modifications for providing a predetermined threshold before switching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00307—Modifications for increasing the reliability for protection in bipolar transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01825—Coupling arrangements, impedance matching circuits
- H03K19/01831—Coupling arrangements, impedance matching circuits with at least one differential stage
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8910217A FR2650453A1 (en) | 1989-07-28 | 1989-07-28 | Output interface circuit for electronic device |
Publications (1)
Publication Number | Publication Date |
---|---|
PL284738A1 true PL284738A1 (en) | 1991-01-14 |
Family
ID=9384257
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PL28473890A PL284738A1 (en) | 1989-07-28 | 1990-04-11 | Output interface circuit arrangement for an electronic equipment |
Country Status (3)
Country | Link |
---|---|
FR (1) | FR2650453A1 (en) |
PL (1) | PL284738A1 (en) |
YU (1) | YU47513B (en) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT324020B (en) * | 1971-06-22 | 1975-08-11 | Elin Union Ag | CIRCUIT ARRANGEMENT WITH A SIGNALING DEVICE |
DE2363872A1 (en) * | 1973-12-21 | 1975-07-03 | Standard Elektrik Lorenz Ag | Transistor cct. to monitor DC voltages - has sum-and-difference amplifier comparing DC voltage with reference signal |
DE2415629C3 (en) * | 1974-03-30 | 1980-10-09 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Circuit arrangement for the temporary blocking of a current branch depending on the size of the variable operating voltage |
DE2939107A1 (en) * | 1979-09-27 | 1981-04-16 | Robert Bosch Gmbh, 7000 Stuttgart | DEVICE FOR GENERATING A BINARY OUTPUT SIGNAL FROM A HALL GENERATOR |
JPS5894233A (en) * | 1981-11-30 | 1983-06-04 | Fujitsu Ltd | Ttl logical circuit |
-
1989
- 1989-07-28 FR FR8910217A patent/FR2650453A1/en active Granted
-
1990
- 1990-04-11 PL PL28473890A patent/PL284738A1/en unknown
- 1990-04-17 YU YU74990A patent/YU47513B/en unknown
Also Published As
Publication number | Publication date |
---|---|
YU74990A (en) | 1994-01-20 |
YU47513B (en) | 1995-10-03 |
FR2650453B1 (en) | 1994-08-19 |
FR2650453A1 (en) | 1991-02-01 |
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