PL2567319T3 - Sposoby i system weryfikacji integralności urządzenia pamięci - Google Patents

Sposoby i system weryfikacji integralności urządzenia pamięci

Info

Publication number
PL2567319T3
PL2567319T3 PL11810013T PL11810013T PL2567319T3 PL 2567319 T3 PL2567319 T3 PL 2567319T3 PL 11810013 T PL11810013 T PL 11810013T PL 11810013 T PL11810013 T PL 11810013T PL 2567319 T3 PL2567319 T3 PL 2567319T3
Authority
PL
Poland
Prior art keywords
methods
memory device
device integrity
verifying memory
verifying
Prior art date
Application number
PL11810013T
Other languages
English (en)
Inventor
Timothy Stevens Potter
Donald Becker
Bruce Ray Montgomery Jr
Dave Dopson
Original Assignee
Utc Fire & Security Americas
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Utc Fire & Security Americas filed Critical Utc Fire & Security Americas
Publication of PL2567319T3 publication Critical patent/PL2567319T3/pl

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0401—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals in embedded memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409—Online test
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0411—Online error correction

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
PL11810013T 2010-05-06 2011-04-29 Sposoby i system weryfikacji integralności urządzenia pamięci PL2567319T3 (pl)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/775,213 US8335951B2 (en) 2010-05-06 2010-05-06 Methods and system for verifying memory device integrity
EP11810013.0A EP2567319B1 (en) 2010-05-06 2011-04-29 Methods and system for verifying memory device integrity
PCT/US2011/034570 WO2012012007A2 (en) 2010-05-06 2011-04-29 Methods and system for verifying memory device integrity

Publications (1)

Publication Number Publication Date
PL2567319T3 true PL2567319T3 (pl) 2018-01-31

Family

ID=44902771

Family Applications (1)

Application Number Title Priority Date Filing Date
PL11810013T PL2567319T3 (pl) 2010-05-06 2011-04-29 Sposoby i system weryfikacji integralności urządzenia pamięci

Country Status (7)

Country Link
US (1) US8335951B2 (pl)
EP (1) EP2567319B1 (pl)
CN (1) CN103003799B (pl)
CA (1) CA2789169C (pl)
ES (1) ES2641311T3 (pl)
PL (1) PL2567319T3 (pl)
WO (1) WO2012012007A2 (pl)

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US9021333B1 (en) 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for recovering data from failed portions of a flash drive
US9021337B1 (en) 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for adaptively selecting among different error correction coding schemes in a flash drive
US8972824B1 (en) 2012-05-22 2015-03-03 Pmc-Sierra, Inc. Systems and methods for transparently varying error correction code strength in a flash drive
US9021336B1 (en) 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for redundantly storing error correction codes in a flash drive with secondary parity information spread out across each page of a group of pages
US8996957B1 (en) 2012-05-22 2015-03-31 Pmc-Sierra, Inc. Systems and methods for initializing regions of a flash drive having diverse error correction coding (ECC) schemes
US9176812B1 (en) 2012-05-22 2015-11-03 Pmc-Sierra, Inc. Systems and methods for storing data in page stripes of a flash drive
US9047214B1 (en) * 2012-05-22 2015-06-02 Pmc-Sierra, Inc. System and method for tolerating a failed page in a flash device
US8793556B1 (en) 2012-05-22 2014-07-29 Pmc-Sierra, Inc. Systems and methods for reclaiming flash blocks of a flash drive
US9183085B1 (en) 2012-05-22 2015-11-10 Pmc-Sierra, Inc. Systems and methods for adaptively selecting from among a plurality of error correction coding schemes in a flash drive for robustness and low latency
US9117552B2 (en) * 2012-08-28 2015-08-25 Kingtiger Technology(Canada), Inc. Systems and methods for testing memory
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US9009565B1 (en) 2013-03-15 2015-04-14 Pmc-Sierra, Inc. Systems and methods for mapping for solid-state memory
US9208018B1 (en) 2013-03-15 2015-12-08 Pmc-Sierra, Inc. Systems and methods for reclaiming memory for solid-state memory
US9026867B1 (en) 2013-03-15 2015-05-05 Pmc-Sierra, Inc. Systems and methods for adapting to changing characteristics of multi-level cells in solid-state memory
US9081701B1 (en) 2013-03-15 2015-07-14 Pmc-Sierra, Inc. Systems and methods for decoding data for solid-state memory
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Also Published As

Publication number Publication date
EP2567319B1 (en) 2017-09-06
ES2641311T3 (es) 2017-11-08
WO2012012007A2 (en) 2012-01-26
EP2567319A4 (en) 2014-01-01
WO2012012007A3 (en) 2012-04-19
CN103003799A (zh) 2013-03-27
US8335951B2 (en) 2012-12-18
CA2789169A1 (en) 2012-01-26
US20110276844A1 (en) 2011-11-10
CA2789169C (en) 2019-05-21
EP2567319A2 (en) 2013-03-13
CN103003799B (zh) 2016-08-03

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