NZ602888B - Dimmable light emitting diode load driver with bypass current - Google Patents

Abstract

Patent 602888 Disclosed is a bypass current control circuit (30) for controlling a bypass current for a dimmer circuit that controls a load of at least one non-incandescent light. The bypass current control circuit (30) includes a sensor (31) for measuring a parameter of the operation of the dimmer circuit over at least one full cycle of an input signal applied to the dimmer circuit. The control circuit (30) also includes a controller (32) for controlling the bypass current in accordance with the measured parameter. immer circuit over at least one full cycle of an input signal applied to the dimmer circuit. The control circuit (30) also includes a controller (32) for controlling the bypass current in accordance with the measured parameter.

Description

PATENTS FORM NO. 5 Appln Fee: $250 Our Ref: 39029NZ MPIAP PATENTS ACT 1953 COMPLETE SPECIFICATION DIMMABLE LIGHT EMITTING DIODE LOAD DRIVER WITH BYPASS CURRENT We, Schneider Electric South East Asia (HQ) Pte Ltd of 10 Ang Mo Kio Street 65, #02—01/06 Techpoint, 569059, Singapore, do hereby e this invention to be described in the following statement:— LE LIGHT EMITTING DIODE LOAD DRIVER WITH BYPASS CURRENT TECHNICAL FIELD The present application relates to the control of a non-incandescent load such as a Light Emitting Diode (LED) load driven by a load driver such as an LED Driver.

PRIORITY The present application claims ty from Australian Provisional Patent Application No. 4151 entitled “Dimmable Light Emitting Diode Load Driver With Bypass Current”, filed on 7 October 2011.

The entire content of this provisional application is hereby orated by reference.

INCORPORATION BY REFERENCE The following documents are referred to in the present application: 03/OO365 entitled “Improved Dimmer Circuit Arrangement”; PCT/AL 03/00366 ed “Dimmer Circuit with Improved Inductive Load”; PCT/AU03/OO364 entitled “Dimmer Circuit with Improved Ripple Control”; entitled “Current Zero Crossing Detector in A Dimmer Circuit”; entitled “Load Detector For A ”; PCT/AL 2006/001 881 entitled “A Universal Dimmer”; PCT/AL 2008/001398 entitled ved Start-Up Detection in a Dimmer Circuit”; entitled “Dimmer Circuit With Overcuirent Detection”; and ed urrent Protection in a Dimmer Circuit”.

The entire content of each of these documents is hereby incorporated by reference.

BACKGROUND Non-incandescent loads are becoming very popular devices for use as light sources due to their efficiency in being able to generate more light with less power. One example of a non-incandescent load used as a light source is a Light Emitting Diode or LED. Special circuits known as LED Drivers are used to drive a load made up of one or more LEDs.

A consequence of the higher efficiency of non-incandescent loads such as LED loads is that they draw less current than incandescent loads and have a generally different current waveform.

Phase l dimmer circuits (also referred to as dimming circuits or simply dimmers) are used to control the power provided to a load such as a light or electric motor from a power source such as supply or mains power. Such circuits often use a technique referred to as phase control dimming. This allows power provided to the load to be controlled by varying the amount of time that a switch connecting the load to the power source is conducting during a given cycle.

For example, if voltage provided by the power source can be represented by a sine wave, then maximum power is provided to the load if the switch connecting the load to the power source is on at all times. In this way the, the total energy of the power source is transferred to the load. If the switch is turned off for a portion of each cycle (both positive and negative), then a proportional amount of the sine wave is effectively isolated from the load, thus reducing the average energy ed to the load.

For e, if the switch is turned on and off half way through each cycle, then only half of the power will be transferred to the load. The l effect will be, for example in the case of a light, a smooth dimming action resulting in the l of the luminosity of the light.

Figure 1 shows a conventional arrangement for dimming a load 50 such as a light, using a phase control dimmer 10. Figure 1 shows the input alternating (ac) voltage waveform applied to the dimer and the output dimmer current waveform passing through load 50.

When dimming non-incandescent loads such as LED loads, conventional dimming ts are often used. Lower current levels can cause several ms with dimmer circuits that are used to control or dim non—incandescent loads such as LED loads.

For triac—based dimmers, the active switching device (triac) will have a minimum required current to remain conducting in the absence of a signal at its gate. This holding current requirement is typically in the order of 25mA, which allows conduction with an escent load of as low as 20W for most of the mains waveform when mains is 240Vrms. When ed with a more efficient load such as an LED, load ts may be reduced by a factor (for example: 5), resulting in the triac either failing to latch or the triac falling out of conduction earlier in the mains half-cycle.

For transistor based dimmers, including MOSFET, IGBT and other similar technologies, the control circuitry requires some minimum power to allow the dimmer to operate, and the only time the dimmer circuit can harvest this power is during periods when the dimmer switching device is not in a low impedance state. If the LED driver load impedance is too high, it will exhibit a significant voltage drop even when the dimer is not conducting. This may result in insufficient power available for correct dimmer operation.

A number of LED driver control circuits make provision for additional ‘bleed’ or bypass currents to flow into a ive load which bypasses the lamp load, especially when the mains voltage waveform drops to low values near the zero—crossings. Some of these drivers use ors to define the current, and others use simple current regulation circuits in order to achieve better performance with dimmers.

Some use a series connected or and capacitor to ensure that the triac latching t is at least met, but these networks fail to maintain the current during the part of each mains half—cycle when current is approaching zero.

Figure 2 shows a conventional arrangement for dimming a load 50 with a dimmer 10. In this arrangement, an additional, or bypass current is provided through resistive load 20.

Some LED driver circuits in particular, e both a fixed resistive bypass switched on only when the taneous voltage across the driver is below a threshold, and also a different fixed level of additional resistive bypass which is switched in when the voltage across the driver is higher. There may also be some ability to turn off the additional ive bypass load if the total t drawn by the LED driver exceeds a defined threshold.

There are some solutions to this problem which measure the instantaneous current g into the LED driver and switch in onal bypass current in order to maintain a defined total current. This approach makes it possible to optimise operation for dimmers with known holding current requirements, but fails to match the requirements of a wide range of dimmers, and also fails to deal with the possibility of multiple LED drivers connected to a single dimmer.

SUMMARY In one form, there is provided, in a lighting control arrangement comprising a dimer circuit, in use, controlling a load of at least one non-incandescent light, a method of controlling a bypass t, the method comprising; measuring a parameter of the operation of the dimmer circuit over at least one full cycle of an input signal applied to the dimmer circuit; and controlling the bypass t in ance with the measured parameter.

In one form, upon the measured parameter indicating dimmer instability, the step of controlling the bypass current comprises increasing the bypass current.

In another embodiment, upon the measured parameter indicating dimmer stability, the step of controlling the bypass current comprises reducing the bypass current.

In one embodiment, the step of measuring the parameter comprises measuring a conduction period in a previous half cycle of the input signal applied to the dimmer circuit, and the method further comprising comparing the measured conduction period with a reference conduction period and controlling the bypass current in accordance With the result of the ison.

In one form, if the measured conduction period is not substantially equal to the reference conduction period, then determining that the measured parameter indicates dimmer ility, and then increasing the bypass current.

In one form, if the measured conduction period is substantially equal to the reference conduction period, then determining that the measured parameter indicates dimmer stability, and then reducing the bypass current.

In one embodiment, the step of increasing the bypass current comprises g up the bypass current at a first rate.

In a further embodiment, the step of increasing the bypass current comprises ramping up the bypass current at the first rate until the bypass current reaches a m bypass current level.

In one embodiment, the step of reducing the bypass current ses ramping down the bypass current at a second rate.

In one form, if the bypass current is substantially equal to the maximum bypass current level and the measured conduction period is substantially equal to a previous conduction period of at least the previous half cycle, then updating the reference conduction period to equal the measured conduction period and then reducing the bypass current.

In one ment, the input signal is mains power.

In another , there is ed a bypass current control t for controlling a bypass t for a dimmer circuit controlling a load of at least one non—incandescent light, the bypass current control circuit comprising; a sensor for measuring a parameter of the operation of the dimmer circuit over at least one full cycle of an input signal applied to the dimer circuit; and a controller for controlling the bypass current in accordance with the measured parameter.

In one form, upon the ed parameter indicating dimmer instability, the controller increases the bypass current.

In another form, upon the measured parameter indicating dimmer stability, the controller s the bypass current.

In one form, the sensor measures a tion period in the most recent full cycle of the input signal applied to the dimmer circuit, and the bypass current control circuit further comprises a comparator for comparing the measured conduction period with a reference conduction period and the controller controls the bypass current in accordance with the result of the comparison.

In one embodiment, if the ed tion period is not substantially equal to the reference tion period, then the controller determines that the measured parameter indicates dimmer instability, and then the controller increases the bypass current.

In one form, if the measured conduction period is substantially equal to the reference conduction period, then the controller determines that the measured parameter indicates dimmer stability, and then the controller reduces the bypass current.

In one form, the controller increases the bypass current by ramping up the bypass t at a first rate.

In one ment, the controller increases the bypass current by ramping up the bypass t at the first rate until the bypass current reaches a maximum bypass current level.

In one embodiment, the controller reduces the bypass current by ramping down the bypass current at a second rate.

In one embodiment, if the bypass current is substantially equal to the maximum bypass current level and the ed conduction period is substantially equal to a previous conduction period of the previous full cycle, then the ller updates the reference conduction period to equal the ed conduction period and then the controller reduces the bypass current.

In one embodiment, the input signal is mains power.

In another aspect, there is provided a dimer circuit comprising a bypass current control circuit according to one or more aspects described herein.

In another aspect there is provided a load driver comprising a bypass current control circuit ing to one or more aspects described herein.

In one embodiment, the load driver is an LED driver, BRIEF DESCRIPTION OF DRAWINGS The various aspects described herein are described in more detail with reference to the following figures in which: Figure l — shows a conventional arrangement for dimming a load; Figure 2 - shows a conventional arrangement with a bypass current for g a load; Figure 3 — shows a block diagram of one embodiment of a bypass current control circuit in a light dimming arrangement; Figure 4A — shows a t diagram of one embodiment of the bypass current control circuit of Figure 3; Figure 4B — shows a circuit diagram of an alternative embodiment to the arrangement of Figure 4A; Figure 5 — shows a flow chart of one embodiment of a l method of controlling a bypass Figure 6 — shows a flow chart of another embodiment of a method of controlling a bypass Figure 7 - shows a flow chart of another embodiment of a method of controlling a bypass current; Figure 8 — shows an example of one embodiment of the change in bypass current upon determination of dimmer stability/instability over time.

DETAILED DESCRIPTION While the various aspects described herein are described with reference to a Light Emitting Diode (LED) as the non-incandescent load, it will be appreciated that the various aspects are applicable to many other types of candescent loads including but not limited to, Compact Flourescent Lamps (CFLs), plasma lamps and Organic Light Emitting Diodes (OLEDs).

Figure 3 shows one example of a bypass current control circuit 30 comprising a controller 32 and a sensor 31. In this example, the control t 30 is shown in a lighting control arrangement such as a light dimming arrangement (depicted in dotted lines) comprising a dimmer t 10 for controlling a non—incandescent load 50 (for example an LED), and a bypass current path 21 through which a bypass t may flow. Dimmer circuit 10 may be any conventional dimmer circuit including one as described in any of the previously-referred to patent ations whose entire contents are incorporated by reference In use, the sensor 31 of control t 30 measures a parameter of the operation of the dimmer circuit . The parameter of the operation of the dimer circuit can be any suitable parameter that can provide information relating to the stability or the instability of the dimmer circuit 10. In one embodiment, the parameter is a conduction period. In another embodiment, the ter is a direct current averaged over at least one full cycle of mains, which in this example, is applied to the input of the dimmer circuit 10. It will be appreciated that the term “full cycle of mains” does not require that the average be taken over a single full cycle, but may be taken over two half cycles in ent full cycles.

Sensor 31 may be any suitable element and may be different according to the nature of the parameter being measured.

As shown in the example of Figure 3, the measurement from sensor 31 is then applied to controller 32 which controls the bypass current in accordance with the measured parameter as will be described in more detail below.

Figure 4A shows a circuit diagram of one embodiment of the l circuit of Figure 3. In this ment, control circuit 30 comprises a single microcontroller 33 which itself comprises sensor 31 in the form of a voltage sensor measuring the voltage at point A as well as the controller 32 which controls the bypass current flowing through bypass current path 21 via Field Effect Transistor (FET) 22. An example of one suitable PET is an SPP02N60S5 with a ) value of about 4.5V.

In operation, a path for bypass current is provided via high voltage FET 22 operating within the bridge rectifier 23 of an LED driver (not shown) or a standalone circuit. The FET gate voltage is pulled up via a high value resistor 24 to the drain, and clamped with a Zener diode 25 or by other means to a fixed voltage higher than the gate turn-on voltage (Vgs (threshold)) for the PET 22. In one example, Zener diode 25 is a 15V diode. The source of the FET 22 is then connected to the negative rail of the bridge rectifier 23 via a resistor 26. In one example, the value of resistor 26 is about 420 ohm, ponding to a maximum bleed current of about 32mA. The or in series with the source, in conjunction with the gate voltage and gate-source threshold e defines the t that will flow in the FET conduction channel.

In its simplest and tomatic form, the bypass current can be adjusted by simply adjusting the voltage the gate is limited to. In this particular embodiment shown in Figure 4A however, an automatic means to adjust current is provided by microcontroller 33 with ue output, which can pull the FET gate voltage down to reduce the bypass current. At the same time, the microcontroller 33 can e the voltage at the gate of the FET 22 to determine conduction time of the phase control dimmer (not shown) powering the circuit.

In one embodiment, one algorithm that works with such an arrangement starts with the bypass t set to maximum. At this point, the microcontroller 33 measures the conduction time for a full cycle of mains and stores that result. The conduction time for each new mains cycle is compared with the stored value, and if it is found to be substantially equal (that is, equal to or within a predefined margin such as 10%, 9%, 8%, 7%, 6%, 5%, 4%, 3%, 2% or 1%) to the stored value, the bypass current will slowly ramp down. If at any time a new cycle time is found to be not substantially equal to (that is, outside the margin) the bypass t will slowly ramp up.

If the phase control dimmer is provided with sufficient current, the conduction angles will be stable from cycle—to-cycle, but if the dimmer does not have sufficient t, it will cause flicker, which implies ng power red to the load and consequently, changing conduction times.

Note that no means of measuring instantaneous dimmer current is required, and that the operation of this method makes use of a record of dimmer behaviour over more than one half cycle of mains to determine an m point of operation.

A significant advantage of this and other r algorithms is that if two or more LED drivers equipped with such a circuit are connected in parallel with the same dimmer, that the overall bypass current will naturally drop to the lowest le value, thus it is possible to achieve a higher overall efficiency than with LED drivers equipped with fixed bypass current.

Figure 4B shows an alternative arrangement of the circuit of Figure 4A in which the bypass current is provided through a second FET 28 (eg. FDV305N), controlled by an A/D output from the microcontroller 33. In this example, resistor 27 is provided by a 33K resistor, corresponding to a minimum bypass current of 0.5mA.

Figure 5 shows a flowchart of one embodiment of a general method performed by the control circuit as described above. In step 200, the sensor measures a parameter of the dimer ion over at least one full cycle of mains voltage. In step 201, the processor controls the bypass current in accordance with the measured parameter.

Figure 6 shows a flowchart of another embodiment of a method performed by the l circuit. In step 300, the sensor measures a parameter of dimmer circuit operation over at least one full cycle. In step 300, a determination is made as to whether the measured parameter indicates that the dimer is stable. If it is determined that the dimmer is stable, then in step 302, the controller reduces the bypass current. If r, the determination is that it is not stable, i.e. indicates instability, then in step 303, the controller increases the bypass current.

Figure 7 shows a flowchart of yet another possible embodiment of a method of controlling a bypass current to maintain dimmer stability. In one e of this embodiment, the parameter of dimmer operation is conduction time or period. In step 400, the process . In step 401, the full cycle conduction time is measured. In step 402, the measured conduction time is compared to a reference conduction time or period.

If the measured conduction time is ntially equal to the reference conduction time or period (that is, equal to or within a specified ), indicating dimmer stability, then in step 403, the bypass current is ramped down and the process s to step 401 to take another measurement to determine the dimmer stability at this later time.

If the measured conduction time is not substantially equal to the reference conduction time or period (that is, outside of a specified ), then in step 404, a ination is made as to whether the bypass current is equal to a maximum bypass current level. If the bypass current is not at the maximum bypass current level, then the bypass current is ramped up in step 405 and the process returns to step 401 to take another measurement to determine the dimmer stability at this later time.

If the bypass current is at the maximum bypass t level, then at step 406, a comparison of the measured conduction time is made with the measured conduction time in the previous cycle. If, at step 407, the result of this determination is positive, then the reference conduction time is set as the current conduction time in step 408 and the process returns to step 401 to take r measurement to determine the dimer stability at this later time.

If, at step 407, the result of this determination is negative, then the process returns to step 401 to take another measurement to determine the dimmer ity at this later time.

Figure 8 shows an example of how the bypass current is controlled over time as different conditions arise. Figure 8 is a graph of bypass current 113 versus time, with the time scale divided into different time points 1 to 8. These time points correspond to the times at which the parameter is ed and a determination is made as to dimmer stability, which then determines the action on the bypass current.

At point 1, it is determined that there is dimmer instability (as indicated by an “l”), and in accordance with one or more of the methods described above, the bypass current is ramped up at a first rate. By point 2, the bypass current has reached a level that is high enough to provide the dimmer circuit with sufficient operating current to make it stable and at point 2, it is determined that the dimmer is stable.

Bypass current is then ramped down at a second rate. At point 3, it is determined that the dimmer is still stable and the bypass current continues to ramp down at the second rate. At point 4 however, it is ined that there is again dimmer instability as the bypass current has dropped to too low a level and so is then ramped up at the first rate. At point 5, there is dimmer stability and so the bypass current is ramped down at the second rate and continues to do so until point 8 since the dimmer s stable over this time.

In Figure 8, the first rate of ramping up is shown as greater than the second rate of ramping down, however, it will be appreciated that the first rate and the second rate can be equal to each other, or in fact, the first rate can be less than the second rate.

In one example, the resolution of ramp rate is 16 steps for bypass current in the range up to about 32mA — for example about ZmA per step. In another example, the resolution in this range is higher, for example about lmA per step. In another example, the tion is lower, for example about 3mA per step.

In one example, the first rate is about 1 step every 200ms. In another example, the first rate is about 1 step every lSOms. In another example, the first rate is about 1 step every 250ms. In r example, the first rate is about 1 step every 500ms.

In one example, the second rate is about 1 step every second. In another example, the second rate is about 1 step every 1.5 seconds. In another example, the second rate is about 1 step every 0.75 seconds.

As described above, in some embodiments, the first rate and the second rate are equal, for example, both about 1 step every 600ms.

As described above, in one embodiment, the first rate is less than the second rate. In one example, the first rate is 1 step every 700ms and the second rate is 1 step every 500ms.

One example of an algorithm that could be used by microcontroller 33 appears below: /4<*>t<>i<«l<*******$*r§<=k****rl<4<a}:>i<**>i¢=l<95***>l<>5>lv=*41*****k**fink>5=i=>l~rink**$$***$*$***K***$****$* Bypass current adjustment algorithm.

The algorithm as developed below requires one timer capture and one timer output compare peripheral with 16 bit resolution.

Power is delivered to the LED driver via a phase control . The dimmer can be either leading or trailing edge type. The ac supply e is ed in the driver, and the unfiltered rectified voltage is clipped to a level suitable to feed directly into the microcontroller input capture pin (refer to the earlier documentation for a suitable circuit).

The timer capture hardware is configured to latch the count of a 16 bit counter which is clocked at lMHz. Latching occurs at both the rising and falling edges of the input capture waveform.

The rising edge marks the start of dimmer conduction, and the trailing edge marks the end of tion each half-cycle. Note that even with no dimmer, there will always be a rising and falling edge each ycle, but that the time that the input is held low is minimum with no dimmer.

The timer capture interrupt service routine derives a count equal to the total conduction time each half cycle, and this value can be used to establish a target LED current (LED current regulation not included in this code). The times for each half cycle are maintained in a simple first-in, first out buffer for comparison with subsequent half-cycle results.

The algorithm below compares the total conduction time between successive full cycles of mains. If a difference greater than a defined threshold is detected, the bypass current is ramped up at a defined rate, and if the difference is below a lower threshold, the bypass current is ramped down at a ent defined rate.

Bypass current in this embodiment is represented with sixteen possible levels from zero to a maximum determined by hardware to be approximately 30mA.

The bypass current value i_bypass is used to define the duty cycle of a low frequency PWM output, The low ncy PWM is implemented with a second interrupt service routine. #pragma vector = TMERA1_VECTOR winterrupt static void Timer_A1_capture~ISR(void) intl6s i_10ms_difference; /* difference between now and next lOms interval */ intl6u i_delta__count; /* count difference between now and last capture */ static intl 6u _cycle_level_count; /* last ycle count */ static intl6ui prior whole cycle level count; /* full cycle count, 1/2 cycle ago */ static intl6u i_leve1_count; /* counts while phase signal input was high */ static int8u i_falling_edge_count; /* count of falling edge interrupts this cycle */ static boolean b_second_cycle; /* keep track of first or second half cycles */ if (TAIV == 0x02) /* 0x02 = Timer cap/comp 1 OxOA = timer w */ i_delta_count = TACCRl — i_capture; i_capture += i_delta_count; if ((TACCTLl & CCI) == 0) /* level NOW is low = g edge */ i_level_count += i_delta_count; /* only accumulate while high */ i_falling_edge_count++; /* difference between (count since start of this cycle) and known count for 10000 */ i_10ms_difference = (i_capture ~ i_1ast_10ms_count) — 10000; /* if the difference is negative, the recent edge is less than lOms */ if (i_lOms_difference > MS_MARGIN) ) /* delta count is high enough to process */ i_1ast_10ms_count = i_capture; if (i_10ms_difference < TENWMSWMARGIN ) /* time is Within window of lOms cycle */ /* Enable interrupts globally */ i_lastm10ms_difference = i_l Oms_difference; e_interrupt(); /* here we do er we need every lOms */ /* the ing three statements are only used for bypass adjust */ b_second__cycle = !b_second_cycle; i_last_falling_edge_count = i_falling_edge_count; i_falling_edge_count = 0; if (i_last_level_count >= rwwhole_cycle_level_count) i_delta_level_count = (i_last_level_count - i prior whole cycle level count); else indelta_level_count = (i_prior_whole_cycle_level_count - imlast_level_count); /* i_last_level_count is used only to set target level */ if (i_bypass == PWMZMAX) /* only compare new settings to the setting with bypass = MAX.

Note that bypass always becomes MAX when settings are changed*/ i_prior_whole_cycle_level_count = i_last_level_count; if (b_second‘cycle) i_lasthlevel_count = (i_half_cycle_level_count + i_level_count); i_half_cycle_level_count = i_level_count; /* 1/2 cycle count */ l_count = 0; /* reset count for next lOms period */ /* stuff to do every lOrns */ /* any changes in set level will result in maximum bypass current. */ /* bypass current will then slowly be ramped back until instability is ed */ if ((i_lastwfalling_edge_count > 2) H (i_delta_level_count > DELTA_COUNT_UPPER_LIM)) b_increasewbypass__current = true; else if (i_delta_level_count > DELTA_COUNT_LOWER_LIM) /* hold off reduction of bypass current as long as phase angle not changing */ /* bypass current is only reduced when i_bypass_adjust_timer hits riate value */ if ((i_bypass_adjust_timer != 0) && !b_increase_bypass_current) i_bypass_adjust_timer——; _falling_edge_count = O; /* end of stuff to do */ else /* edge detected after end of lOms cycle - result must be tossed */ i_level_count = 0; /* reset count for next 10ms period */ /**************************************************************************** * this interrupt handler adjusts the bypass current level at intervals. ************************************************$******************$***$$**$/ #pragma vector = TIMERAO_VECTOR “interrupt static void Timer_AO_cornpare_ISR(void) shared int8u i_PWMZCount; TACCRO += PWM_MAX; /* reset timer for next interval */ if (i_PWM200unt++ < ss) PIOUT 1: BIT3; /* Toggle P13 ON */ else PlOUT &= ~BIT3; /* Toggle P13 OFF */ if (i_PWMZCount >= PWMZMAX) i_PWM2c:ount = 0; if (!b_increase_bypass_current && (i_bypass_adjust_tirner >= BYPASS_DECREASE_INTERVAL)) i_bypass_adjust_timer = 0; if (i_bypass > 0) i_bypass--; else if (b_increase_bypass_current && (iwbypassmadjustjimer >= BYPASS_INCREASE__INTERVAL)) i_bypass_adjust_timer = 0; b_increase_bypass_current = false; if (i_bypass != PWMZMAX) i__bypass++; else i_bypass_adjust_timer++; /****************$*********$*********************************$*************** * lisation and main loop $************$*****************$******************$*******************$****/ void main(v0id) /* Initialise system services */ WDTCTL = WDTPW + WDTHOLD; /* Stop watchdog timer*/ PlOUT = 0x00; PlDlR = 0x08; P1 SEL = 0x60; /* timer capture on bit 6, output compare on bit 5 */ /* Timer_A use SMCLK, divide by 8, continuous mode, Clear on initialise */ TACTL = TASSEL_2 + ID_3 + MC_2 + TACLR; /* timer compare setup */ TACCRO = TAR; /* set next compare far away */ O = OUTMOD_5 l CCIE; /* timer capture setup */ /* capture both edges, CCIOB input, synchronise, capture mode, interrupt enab1e*/ TACCTLl = CMO i CCISnl 1 CMl | SCS I CAP l CCIE; /* maximum bypass current on power-up */ ss = PWMZMAX; i_lastm10ms_fidifference = 0; DCOCTL = CALDCOWSMHZ; /* fine tuning */ BCSCTLl = CALBClWSMHZ; /* range select DCO frequency */ /* Enable interrupts globally */ 1e_interrupt(); while (true) wlow_power*mode_0(); /***************************$************************************************ * ****************** * ********* Em“) ********* * ****************** ******************************************************$*****$***************/ The above has described various embodiments of control ts and methods for controlling a bypass current to maintain stable dimmer operation.

With such a circuit incorporated in LED drivers, it is possible to simplify installation requirements.

Thus, there is no need to y a minimum number of parallel loads of this type for a given dimmer, which is a common practical on to the problem for normal LED lamps with drivers.

An algorithm can use the tion time measurements and known additional current level to build up a database of samples, which can be updated every mains half-cycle.

When a dimer is performing well with a load, the power delivered to the load as averaged (as a moving e) over one or more half—cycles of mains will be substantially constant with each successive half-cycle. A dimmer that is not operating acceptably will exhibit ions in conduction time between successive half—cycles, due to the triac ng out of conduction early in the half— cycle, or h other faults related to low load current. As a result of the inconsistent conduction time, the light output of the load will also vary, which is seen as flickering of the light.

Based on the conduction time data, another algorithm can be used to evaluate if the dimmer is operating acceptably, and if it is not, the level of additional “bleed” or bypass current can be sed in order that the dimmer performance will improve. If the dimmer is operating acceptably, the level of additional current can be reduced. If the tion of additional t increments and the resolution of measurement of conduction time is fine enough, these adjustments can occur automatically to always keep the dimer and load operating with the minimum of additional current and without any visible flickering. Note that the additional t controlled by the algorithm is in addition to any additional current ed by the LED driver current provided when the voltage across , especially the driver is 50V or less.

It is possible for such a system to operate and adjust bypass current in such a way that there is no flicker apparent to the human eye, and yet at the same time, variations in conduction time in the database of samples are sufficient to make fine adjustments of additional current to optimise the system operation.

It can be seen that the same algorithm implemented in a number of LED drivers all ted to the same dimmer in parallel, can result in a more optimised solution with only the minimum additional current to allow the dimmer to e without any noticeable flicker.

In addition to maintaining optimised conditions for the correct operation of the dimmer when the load is intended to be on, the automatically adjusting bypass current circuit can also improve performance of circuits when a two—wire electronic switch is attempting to maintain an nt lighting load in an OFF state. Typically, efficient lighting loads are capable of producing some light even when the delivered current is limited to well below their typical level if the voltage across the load is sufficiently high. Neon, Fluorescent and other gas-discharge lamps are in particular, noted for their tendency to flash or flicker when wired in series with a two-wire electronic switch in the OFF state. Under these conditions, the circuit and control algorithm described in this invention can automatically provide a means of clamping the voltage across the load if any flickering is detected. Once clamped with sufficient impedance, the conduction time sensing will detect no further pulses of voltage across the load and the additional t can therefore be left at the set level to prevent flickering.

The improvement described is a self—adjusting bypass t circuit, which adjusts the amount of bypass current to be the minimum required to maintain stability with any dimmer. It maintains a high priority on flicker-free dimmer operation, but at the same time maximises efficiency of the overall system in the long term. Dimmer stability can be determined through a number of means, including ring of dc. current averaged over a full cycle of mains, or simply by comparing the conduction time of the dimmer n cycles to detect significant differences.

It will also be appreciated that the various control circuits and methods can be applied to load drivers such as LED drivers such that an LED driver will incorporate a control circuit as shown in any one or more or of the embodiments bed herein. Furthermore, it will also be appreciated that the various l circuits and methods can be applied to dimmer circuits such that a dimmer circuit will orate a control circuit as shown in any one or more or of the embodiments bed herein.

It will also be appreciated that the above has been described with reference to particular illustrative embodiments only, and that many variations and ations may be made to the circuits, devices and methods described.

It will be understood that the term “comprise” and any of its derivatives (e.g. comprises, comprising) as used in this specification is to be taken to be inclusive of features to which it refers, and is not meant to e the presence of any additional es unless otherwise stated or implied.

The reference to any prior art in this specification is not, and should not be taken as, an acknowledgment or any form of suggestion that such prior art forms part of the common general knowledge of the technical field.

Claims (25)

1. In a lighting control arrangement comprising a dimmer circuit, in use, controlling a load of at least one candescent light, a method of controlling a bypass current, the method comprising; measuring a parameter of the operation of the dimmer circuit over at least one full cycle of an input signal applied to the dimmer circuit; and controlling the bypass cun‘ent in accordance with the measured parameter.

2. The method as claimed in claim 1 wherein upon the measured parameter indicating dimmer instability, the step of controlling the bypass current comprises increasing the bypass current.

3. The method as claimed in claim 2 wherein upon the ed parameter indicating dimmer stability, the step of controlling the bypass current comprises reducing the bypass current.

4. A method as claimed in any one of claims 2 or 3 wherein the step of measuring the parameter comprises measuring a conduction period in a previous half cycle of the input signal applied to the dimmer circuit, and the method further comprising comparing the measured conduction period with a reference tion period and controlling the bypass current in accordance with the result of the comparison.

5. A method as claimed in claim 4 wherein if the measured conduction period is not substantially equal to the reference conduction period, then determining that the measured parameter indicates dimmer instability, and then increasing the bypass current.

6. A method as claimed in claim 4 wherein if the measured conduction period is ntially equal to the nce conduction period, then determining that the measured parameter indicates dimmer stability, and then reducing the bypass current.

7. A method as claimed in claim 5 n the step of sing the bypass current comprises ramping up the bypass current at a first rate.

8. A method as claimed in claim 7 wherein the step of increasing the bypass current ses ramping up the bypass current at the first rate until the bypass current s a maximum bypass current level.

9. A method as claimed in claim 6 wherein the step of reducing the bypass current comprises ramping down the bypass current at a second rate.

10. A method as claimed in claim 8 wherein if the bypass current is substantially equal to the maximum bypass t level and the measured conduction period is substantially equal to a us conduction period of at least the previous half cycle, then updating the reference conduction period to equal the measured conduction period and then reducing the bypass current.

11. A method as claimed in any one of claims 1 to 6 wherein the input signal is mains power.

12. A bypass current control circuit for controlling a bypass current for a dimer circuit controlling a load of at least one non—incandescent light, the bypass current control circuit comprising; a sensor for measuring a parameter of the ion of the dimmer circuit over at least one full cycle of an input signal applied to the dimer t; and a controller for controlling the bypass current in accordance with the ed parameter.

13. A bypass t control circuit as claimed in claim 12 wherein upon the measured parameter indicating dimmer instability, the controller increases the bypass current.

14. A bypass current control circuit as claimed in claim 13 wherein upon the measured parameter indicating dimmer stability, the controller reduces the bypass current.

15. A bypass current control circuit as claimed in any one of claims 13 or 14 wherein the sensor measures a conduction period in the most recent full cycle of the input signal applied to the dimmer circuit, and the bypass current control circuit further comprises a comparator for comparing the measured conduction period with a reference conduction period and the controller ls the bypass current in accordance with the result of the comparison.

16. A bypass current control circuit as d in claim 15 wherein if the measured conduction period is not substantially equal to the reference conduction period, then the controller determines that the ed ter indicates dimmer instability, and then the controller increases the bypass current.

17. A bypass current control circuit as claimed in claim 15 wherein if the measured conduction period is ntially equal to the reference conduction period, then the controller determines that the measured parameter indicates dimmer stability, and then the controller reduces the bypass current.

18. A bypass current control circuit as claimed in claim 16 n the controller ses the bypass current by ramping up the bypass current at a first rate.

19. A bypass t control circuit as claimed in claim 18 n the ller increases the bypass current by ramping up the bypass current at the first rate until the bypass current reaches a maximum bypass current level.

20. A bypass current control circuit as claimed in claim 17 wherein the controller reduces the bypass current by ramping down the bypass current at a second rate.

21. A bypass current control circuit as claimed in claim 20 wherein if the bypass current is substantially equal to the maximum bypass current level and the measured conduction period is ntially equal to a us conduction period of the previous full cycle, then the controller updates the reference tion period to equal the measured conduction period and then the controller reduces the bypass current.

22. A bypass current controller as claimed in any one of claims 12 to 21 wherein the input signal is mains power.

23. A dimmer circuit comprising a bypass current control circuit as claimed in any one of claims 12 to 21.

24. A load driver comprising a bypass current control circuit as claimed in any one of claims 12 to

25. A load driver as claimed in claim 24 wherein the load driver is an LED driver.