NO995889L - Circuit and method for receiving data - Google Patents
Circuit and method for receiving dataInfo
- Publication number
- NO995889L NO995889L NO995889A NO995889A NO995889L NO 995889 L NO995889 L NO 995889L NO 995889 A NO995889 A NO 995889A NO 995889 A NO995889 A NO 995889A NO 995889 L NO995889 L NO 995889L
- Authority
- NO
- Norway
- Prior art keywords
- receiving
- data
- clock signal
- input
- circuit
- Prior art date
Links
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
En krets for mottak av data omfatter en første mottager- anordning (6) med en inngangsanordning (6a) for å motta dataene og en inngang (6b) for å motta et første klokkesignal (CLK2), hvorved dataene taktstyres inn i den første mottager-anordningen ved hjelp av det første klokke-signalet. Kretsen har også en andre mottager-anordning (8) med en inngangsanordning (8a) for å motta dataene og en inngang (8b) for å motta et andre klokke- signal (_CLK 2), hvor første og annet klokkesignal (CLK 2, _CLK 2) har samme frekvens og er faseforskjøvet i forhold til hverandre, hvorved dataene taktstyres inn i den annen mottageranordning (8) ved hjelp av det annet klokkesignal. Det er tilveiebrakt en bestemmelses-anordning (12, 14) for å bes' amme om minst en av mottageranordningene har mottatt dataene korrekt. Det er tilveiebrakt en anordning for selektivt å aktivere en første utgang på en av mottageranordningene i samsvar med bestemmelsen som foretas av bestemmelses-anordningen.A data receiving circuit comprises a first receiver device (6) with an input device (6a) for receiving the data and an input (6b) for receiving a first clock signal (CLK2), whereby the data is clocked into the first receiver. the device by the first clock signal. The circuit also has a second receiver device (8) with an input device (8a) for receiving the data and an input (8b) for receiving a second clock signal (_CLK 2), the first and second clock signals (CLK 2, _CLK 2) has the same frequency and is phase shifted relative to each other, whereby the data is clocked into the second receiver device (8) by the second clock signal. A determining device (12, 14) is provided to check if at least one of the receiving devices has received the data correctly. A device is provided for selectively activating a first output on one of the receiving devices in accordance with the determination made by the determining device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NO995889A NO995889L (en) | 1997-06-02 | 1999-12-01 | Circuit and method for receiving data |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP1997/002854 WO1998056137A1 (en) | 1997-06-02 | 1997-06-02 | A circuit and method for receiving data |
NO995889A NO995889L (en) | 1997-06-02 | 1999-12-01 | Circuit and method for receiving data |
Publications (2)
Publication Number | Publication Date |
---|---|
NO995889D0 NO995889D0 (en) | 1999-12-01 |
NO995889L true NO995889L (en) | 2000-02-01 |
Family
ID=19904043
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NO995889A NO995889L (en) | 1997-06-02 | 1999-12-01 | Circuit and method for receiving data |
Country Status (1)
Country | Link |
---|---|
NO (1) | NO995889L (en) |
-
1999
- 1999-12-01 NO NO995889A patent/NO995889L/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
NO995889D0 (en) | 1999-12-01 |
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Legal Events
Date | Code | Title | Description |
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FC2A | Withdrawal, rejection or dismissal of laid open patent application |