NO20055411L - Prosessor, fremgangsmate, transmitter og terminal for bruk ved kommunikasjon - Google Patents

Prosessor, fremgangsmate, transmitter og terminal for bruk ved kommunikasjon

Info

Publication number
NO20055411L
NO20055411L NO20055411A NO20055411A NO20055411L NO 20055411 L NO20055411 L NO 20055411L NO 20055411 A NO20055411 A NO 20055411A NO 20055411 A NO20055411 A NO 20055411A NO 20055411 L NO20055411 L NO 20055411L
Authority
NO
Norway
Prior art keywords
processor
transmitter
terminal
communication
encryption
Prior art date
Application number
NO20055411A
Other languages
English (en)
Other versions
NO20055411D0 (no
Inventor
David Chater-Lea
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of NO20055411D0 publication Critical patent/NO20055411D0/no
Publication of NO20055411L publication Critical patent/NO20055411L/no

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/14—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using a plurality of keys or algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/12—Transmitting and receiving encryption devices synchronised or initially set up in a particular manner
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Communication Control (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Storage Device Security (AREA)

Abstract

Prosessor (400) for kryptering eller dekryptering av informasjon som skal kommuniseres fra et første sted til et andre sted, hvilken prosessor kan drives i i det minste én av to moduser, omfattende (i) en første modus hvor informasjon blir kryptert av en krypteringsdel av en nøkkelstrimmel og en synkroniseringsindikator blir generert i tilknytning til hver krypteringsdel, og (ii) en andre modus hvor informasjon blir kryptert av et flertall krypteringsdeler og en enkel synkroniseringsindikator blir generert i tilknytning til hvert flertall av krypteringsdeler. Det er også beskrevet en krypterings- og dekrypteringsprosessor som benytter prosessoren og fremgangsmåter som benytter prosessoren og krypterings- og dekrypteringsprosessoren. En sender og mottaker som benytter krypterings-/dekrypteringsprosessoren og en telekommunika-sjonsterminal, og en fremgangsmåte ved bruk av terminalen er også beskrevet.
NO20055411A 2003-05-19 2005-11-16 Prosessor, fremgangsmate, transmitter og terminal for bruk ved kommunikasjon NO20055411L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0311571A GB2402024B (en) 2003-05-19 2003-05-19 Processor,method,transmitter and terminal for use in communications
PCT/EP2004/050551 WO2004102872A1 (en) 2003-05-19 2004-04-16 Processor and method for end-to-end encryption synchronisation

Publications (2)

Publication Number Publication Date
NO20055411D0 NO20055411D0 (no) 2005-11-16
NO20055411L true NO20055411L (no) 2006-02-08

Family

ID=9958423

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20055411A NO20055411L (no) 2003-05-19 2005-11-16 Prosessor, fremgangsmate, transmitter og terminal for bruk ved kommunikasjon

Country Status (7)

Country Link
EP (1) EP1627490B1 (no)
KR (1) KR20060003375A (no)
AT (1) ATE382219T1 (no)
DE (1) DE602004010903T2 (no)
GB (1) GB2402024B (no)
NO (1) NO20055411L (no)
WO (1) WO2004102872A1 (no)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2439613B (en) * 2006-06-30 2008-08-27 Motorola Inc Processor, method and terminal for use in communications
KR101991664B1 (ko) * 2017-03-15 2019-06-21 주식회사 카이 블록 암호화에 기초한 콘텐츠의 암호화 및 복호화 방법 및 장치

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5805705A (en) * 1996-01-29 1998-09-08 International Business Machines Corporation Synchronization of encryption/decryption keys in a data communication network
US5694473A (en) * 1996-05-17 1997-12-02 Motorola, Inc. Decryption of retransmitted data in an encrypted communication system
FI20002607A (fi) * 2000-11-28 2002-05-29 Nokia Corp Päästä-päähän -tahdistuksen ylläpitäminen tietoliikenneyhteydellä
FI20002608A (fi) * 2000-11-28 2002-05-29 Nokia Corp Päästä-päähän -tahdistksen ylläpitäminen tietoliikeneyhteydellä
GB0116016D0 (en) * 2001-06-29 2001-08-22 Simoco Digital Systems Ltd Communications systems

Also Published As

Publication number Publication date
EP1627490A1 (en) 2006-02-22
GB2402024A (en) 2004-11-24
WO2004102872A1 (en) 2004-11-25
NO20055411D0 (no) 2005-11-16
KR20060003375A (ko) 2006-01-10
GB0311571D0 (en) 2003-06-25
DE602004010903D1 (de) 2008-02-07
DE602004010903T2 (de) 2008-05-08
GB2402024B (en) 2005-07-13
ATE382219T1 (de) 2008-01-15
EP1627490B1 (en) 2007-12-26

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Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application